diff options
Diffstat (limited to 'arch/arm/mach-k3')
31 files changed, 344 insertions, 121 deletions
diff --git a/arch/arm/mach-k3/am62ax/am62a7_fdt.c b/arch/arm/mach-k3/am62ax/am62a7_fdt.c index 7f764ab36b5..c7c5d2f0885 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_fdt.c +++ b/arch/arm/mach-k3/am62ax/am62a7_fdt.c @@ -3,11 +3,10 @@ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <asm/hardware.h> #include <fdt_support.h> -#include "../common_fdt.h" - int ft_system_setup(void *blob, struct bd_info *bd) { fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c index edd43a1d78d..00173e6836b 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_init.c +++ b/arch/arm/mach-k3/am62ax/am62a7_init.c @@ -57,7 +57,6 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 1); mmr_unlock(CTRL_MMR0_BASE, 2); mmr_unlock(CTRL_MMR0_BASE, 4); - mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); /* Unlock all MCU_CTRL_MMR0 module registers */ @@ -172,6 +171,10 @@ void board_init_f(ulong dummy) /* Output System Firmware version info */ k3_sysfw_print_ver(); + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); + if (IS_ENABLED(CONFIG_ESM_K3)) { /* Probe/configure ESM0 */ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev); diff --git a/arch/arm/mach-k3/am62px/Kconfig b/arch/arm/mach-k3/am62px/Kconfig index 76ae86b6622..0f1fcfab5fc 100644 --- a/arch/arm/mach-k3/am62px/Kconfig +++ b/arch/arm/mach-k3/am62px/Kconfig @@ -29,5 +29,6 @@ config TARGET_AM62P5_R5_EVM endchoice source "board/ti/am62px/Kconfig" +source "board/toradex/verdin-am62p/Kconfig" endif diff --git a/arch/arm/mach-k3/am62px/am62p5_fdt.c b/arch/arm/mach-k3/am62px/am62p5_fdt.c index 2c40fa5a594..4a5ff594df6 100644 --- a/arch/arm/mach-k3/am62px/am62p5_fdt.c +++ b/arch/arm/mach-k3/am62px/am62p5_fdt.c @@ -3,9 +3,10 @@ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <asm/hardware.h> -#include "../common_fdt.h" #include <fdt_support.h> +#include <fdtdec.h> static void fdt_fixup_cores_wdt_nodes_am62p(void *blob, int core_nr) { @@ -38,50 +39,49 @@ static void fdt_fixup_canfd_nodes_am62p(void *blob, bool has_canfd) } } -static int fdt_fixup_trips_node(void *blob, int zoneoffset, int maxc) +static void fdt_fixup_cpu_freq_nodes_am62p(void *blob, int max_freq) { - int node, trip; - - node = fdt_subnode_offset(blob, zoneoffset, "trips"); - if (node < 0) - return -1; - - fdt_for_each_subnode(trip, blob, node) { - const char *type = fdt_getprop(blob, trip, "type", NULL); - - if (!type || (strncmp(type, "critical", 8) != 0)) - continue; + if (max_freq >= 1250000000) + return; - if (fdt_setprop_u32(blob, trip, "temperature", 1000 * maxc) < 0) - return -1; + if (max_freq <= 1000000000) { + fdt_del_node_path(blob, "/opp-table/opp-1250000000"); + fdt_del_node_path(blob, "/opp-table/opp-1400000000"); } - - return 0; } -static void fdt_fixup_thermal_zone_nodes_am62p(void *blob, int maxc) +static void fdt_fixup_thermal_cooling_device_cpus_am62p(void *blob, int core_nr) { - int node, zone; + static const char * const thermal_path[] = { + "/thermal-zones/main0-thermal/cooling-maps/map0", + "/thermal-zones/main1-thermal/cooling-maps/map0", + "/thermal-zones/main2-thermal/cooling-maps/map0" + }; - node = fdt_path_offset(blob, "/thermal-zones"); - if (node < 0) - return; + int node, cnt, i, ret; + u32 cooling_dev[12]; - fdt_for_each_subnode(zone, blob, node) { - if (fdt_fixup_trips_node(blob, zone, maxc) < 0) - printf("Failed to set temperature in %s critical trips\n", - fdt_get_name(blob, zone, NULL)); - } -} + for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { + int new_count = core_nr * 3; /* Each CPU has 3 entries */ + int j; -static void fdt_fixup_cpu_freq_nodes_am62p(void *blob, int max_freq) -{ - if (max_freq >= 1250000000) - return; + node = fdt_path_offset(blob, thermal_path[i]); + if (node < 0) + continue; - if (max_freq <= 1000000000) { - fdt_del_node_path(blob, "/opp-table/opp-1250000000"); - fdt_del_node_path(blob, "/opp-table/opp-1400000000"); + cnt = fdtdec_get_int_array_count(blob, node, "cooling-device", + cooling_dev, ARRAY_SIZE(cooling_dev)); + if (cnt < 0) + continue; + + for (j = 0; j < new_count; j++) + cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); + + ret = fdt_setprop(blob, node, "cooling-device", cooling_dev, + new_count * sizeof(u32)); + if (ret < 0) + printf("Error %s, cooling-device setprop failed %d\n", + thermal_path[i], ret); } } @@ -90,7 +90,8 @@ int ft_system_setup(void *blob, struct bd_info *bd) fdt_fixup_cores_wdt_nodes_am62p(blob, k3_get_core_nr()); fdt_fixup_video_codec_nodes_am62p(blob, k3_has_video_codec()); fdt_fixup_canfd_nodes_am62p(blob, k3_has_canfd()); - fdt_fixup_thermal_zone_nodes_am62p(blob, k3_get_max_temp()); + fdt_fixup_thermal_critical_trips_k3(blob, k3_get_max_temp()); + fdt_fixup_thermal_cooling_device_cpus_am62p(blob, k3_get_core_nr()); fdt_fixup_cpu_freq_nodes_am62p(blob, k3_get_a53_max_frequency()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); diff --git a/arch/arm/mach-k3/am62px/am62p5_init.c b/arch/arm/mach-k3/am62px/am62p5_init.c index 6e3c66e5107..44a2d445d24 100644 --- a/arch/arm/mach-k3/am62px/am62p5_init.c +++ b/arch/arm/mach-k3/am62px/am62p5_init.c @@ -224,6 +224,10 @@ void board_init_f(ulong dummy) /* Output System Firmware version info */ k3_sysfw_print_ver(); + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); + if (IS_ENABLED(CONFIG_K3_AM62A_DDRSS)) { ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) diff --git a/arch/arm/mach-k3/am62x/am625_fdt.c b/arch/arm/mach-k3/am62x/am625_fdt.c index ab9b573f3cf..e5d95ab7dd1 100644 --- a/arch/arm/mach-k3/am62x/am625_fdt.c +++ b/arch/arm/mach-k3/am62x/am625_fdt.c @@ -3,12 +3,11 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <asm/hardware.h> #include <fdt_support.h> #include <fdtdec.h> -#include "../common_fdt.h" - static void fdt_fixup_cores_nodes_am625(void *blob, int core_nr) { char node_path[32]; @@ -40,42 +39,6 @@ static void fdt_fixup_pru_node_am625(void *blob, int has_pru) fdt_del_node_path(blob, "/bus@f0000/pruss@30040000"); } -static int fdt_fixup_trips_node(void *blob, int zoneoffset, int maxc) -{ - int node, trip; - - node = fdt_subnode_offset(blob, zoneoffset, "trips"); - if (node < 0) - return -1; - - fdt_for_each_subnode(trip, blob, node) { - const char *type = fdt_getprop(blob, trip, "type", NULL); - - if (!type || (strncmp(type, "critical", 8) != 0)) - continue; - - if (fdt_setprop_u32(blob, trip, "temperature", 1000 * maxc) < 0) - return -1; - } - - return 0; -} - -static void fdt_fixup_thermal_zone_nodes_am625(void *blob, int maxc) -{ - int node, zone; - - node = fdt_path_offset(blob, "/thermal-zones"); - if (node < 0) - return; - - fdt_for_each_subnode(zone, blob, node) { - if (fdt_fixup_trips_node(blob, zone, maxc) < 0) - printf("Failed to set temperature in %s critical trips\n", - fdt_get_name(blob, zone, NULL)); - } -} - static void fdt_fixup_thermal_cooling_device_cpus_am625(void *blob, int core_nr) { static const char * const thermal_path[] = { @@ -115,7 +78,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); fdt_fixup_pru_node_am625(blob, k3_has_pru()); - fdt_fixup_thermal_zone_nodes_am625(blob, k3_get_max_temp()); + fdt_fixup_thermal_critical_trips_k3(blob, k3_get_max_temp()); fdt_fixup_thermal_cooling_device_cpus_am625(blob, k3_get_core_nr()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); diff --git a/arch/arm/mach-k3/am62x/boot.c b/arch/arm/mach-k3/am62x/boot.c index 132b42f7edb..a3a6cda6bdb 100644 --- a/arch/arm/mach-k3/am62x/boot.c +++ b/arch/arm/mach-k3/am62x/boot.c @@ -101,3 +101,43 @@ u32 get_boot_device(void) return bootmedia; } + +const char *get_reset_reason(void) +{ + u32 reset_reason = readl(CTRLMMR_MCU_RST_SRC); + + /* After reading reset source register, software must clear it */ + if (reset_reason) + writel(reset_reason, CTRLMMR_MCU_RST_SRC); + + if (reset_reason == 0 || + (reset_reason & (RST_SRC_SW_MAIN_POR_FROM_MAIN | + RST_SRC_SW_MAIN_POR_FROM_MCU | + RST_SRC_DS_MAIN_PORZ))) + return "POR"; + + if (reset_reason & (RST_SRC_SAFETY_ERR | RST_SRC_MAIN_ESM_ERR)) + return "ESM"; + + if (reset_reason & RST_SRC_DM_WDT_RST) + return "WDOG"; + + if (reset_reason & (RST_SRC_SW_MAIN_WARM_FROM_MAIN | + RST_SRC_SW_MAIN_WARM_FROM_MCU | + RST_SRC_SW_MCU_WARM_RST)) + return "RST"; + + if (reset_reason & (RST_SRC_SMS_WARM_RST | RST_SRC_SMS_COLD_RST)) + return "DMSC"; + + if (reset_reason & RST_SRC_DEBUG_RST) + return "JTAG"; + + if (reset_reason & RST_SRC_THERMAL_RST) + return "THERMAL"; + + if (reset_reason & (RST_SRC_MAIN_RESET_PIN | RST_SRC_MCU_RESET_PIN)) + return "PIN"; + + return "UNKNOWN"; +} diff --git a/arch/arm/mach-k3/am65x/am654_fdt.c b/arch/arm/mach-k3/am65x/am654_fdt.c index bcb15208be9..73bca424da3 100644 --- a/arch/arm/mach-k3/am65x/am654_fdt.c +++ b/arch/arm/mach-k3/am65x/am654_fdt.c @@ -3,10 +3,9 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <fdt_support.h> -#include "../common_fdt.h" - int ft_system_setup(void *blob, struct bd_info *bd) { return fdt_fixup_msmc_ram_k3(blob); diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index fc230f180d0..f8c53b286eb 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -31,6 +31,11 @@ #include <dm/uclass-internal.h> #include <dm/device-internal.h> +#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 +#define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 +#define PROC_ID_MCU_R5FSS0_CORE1 0x02 +#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 + #include <asm/arch/k3-qos.h> struct ti_sci_handle *get_ti_sci_handle(void) @@ -68,6 +73,35 @@ void k3_sysfw_print_ver(void) ti_sci->version.firmware_revision, fw_desc); } +void __maybe_unused k3_dm_print_ver(void) +{ + struct ti_sci_handle *ti_sci = get_ti_sci_handle(); + struct ti_sci_firmware_ops *fw_ops = &ti_sci->ops.fw_ops; + struct ti_sci_dm_version_info dm_info = {0}; + u64 fw_caps; + int ret; + + ret = fw_ops->query_dm_cap(ti_sci, &fw_caps); + if (ret) { + printf("Failed to query DM firmware capability %d\n", ret); + return; + } + + if (!(fw_caps & TI_SCI_MSG_FLAG_FW_CAP_DM)) + return; + + ret = fw_ops->get_dm_version(ti_sci, &dm_info); + if (ret) { + printf("Failed to fetch DM firmware version %d\n", ret); + return; + } + + printf("DM ABI: %d.%d (firmware ver 0x%04x '%s--%s' " + "patch_ver: %d)\n", dm_info.abi_major, dm_info.abi_minor, + dm_info.dm_ver, dm_info.sci_server_version, + dm_info.rm_pm_hal_version, dm_info.patch_ver); +} + void mmr_unlock(uintptr_t base, u32 partition) { /* Translate the base address */ @@ -175,11 +209,17 @@ static const char *get_device_type_name(void) } } +__weak const char *get_reset_reason(void) +{ + return NULL; +} + int print_cpuinfo(void) { struct udevice *soc; char name[64]; int ret; + const char *reset_reason; printf("SoC: "); @@ -201,6 +241,10 @@ int print_cpuinfo(void) printf("%s\n", get_device_type_name()); + reset_reason = get_reset_reason(); + if (reset_reason) + printf("Reset reason: %s\n", reset_reason); + return 0; } #endif @@ -328,3 +372,67 @@ void setup_qos(void) writel(qos_data[i].val, (uintptr_t)qos_data[i].reg); } #endif + +int __maybe_unused shutdown_mcu_r5_core1(void) +{ + struct ti_sci_handle *ti_sci = get_ti_sci_handle(); + struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops; + struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops; + u32 dev_id_mcu_r5_core1 = put_core_ids[0]; + u64 boot_vector; + u32 cfg, ctrl, sts, halted; + int cluster_mode_lockstep, ret; + bool r_state = false, c_state = false; + + ret = proc_ops->proc_request(ti_sci, PROC_ID_MCU_R5FSS0_CORE1); + if (ret) { + printf("Unable to request processor control for MCU1_1 core, %d\n", + ret); + return ret; + } + + ret = dev_ops->is_on(ti_sci, dev_id_mcu_r5_core1, &r_state, &c_state); + if (ret) { + printf("Unable to get device status for MCU1_1 core, %d\n", ret); + return ret; + } + + ret = proc_ops->get_proc_boot_status(ti_sci, PROC_ID_MCU_R5FSS0_CORE1, + &boot_vector, &cfg, &ctrl, &sts); + if (ret) { + printf("Unable to get Processor boot status for MCU1_1 core, %d\n", + ret); + goto release_proc_ctrl; + } + + halted = !!(sts & PROC_BOOT_STATUS_FLAG_R5_WFI); + cluster_mode_lockstep = !!(cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP); + + /* + * Shutdown MCU R5F Core 1 only if: + * - cluster is booted in SplitMode + * - core is powered on + * - core is in WFI (halted) + */ + if (cluster_mode_lockstep || !c_state || !halted) { + ret = -EINVAL; + goto release_proc_ctrl; + } + + ret = proc_ops->set_proc_boot_ctrl(ti_sci, PROC_ID_MCU_R5FSS0_CORE1, + PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0); + if (ret) { + printf("Unable to Halt MCU1_1 core, %d\n", ret); + goto release_proc_ctrl; + } + + ret = dev_ops->put_device(ti_sci, dev_id_mcu_r5_core1); + if (ret) { + printf("Unable to assert reset on MCU1_1 core, %d\n", ret); + return ret; + } + +release_proc_ctrl: + proc_ops->proc_release(ti_sci, PROC_ID_MCU_R5FSS0_CORE1); + return ret; +} diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 02c74731fea..52d3faaab5c 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -42,6 +42,7 @@ int remove_fwl_region(struct fwl_data *fwl); void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); +void k3_dm_print_ver(void); void spl_enable_cache(void); void mmr_unlock(uintptr_t base, u32 partition); bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data); @@ -49,6 +50,7 @@ enum k3_device_type get_device_type(void); struct ti_sci_handle *get_ti_sci_handle(void); void do_board_detect(void); void ti_secure_image_check_binary(void **p_image, size_t *p_size); +int shutdown_mcu_r5_core1(void); #if (IS_ENABLED(CONFIG_K3_QOS)) void setup_qos(void); diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c index 867ed173142..2777354c6ab 100644 --- a/arch/arm/mach-k3/common_fdt.c +++ b/arch/arm/mach-k3/common_fdt.c @@ -3,11 +3,11 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ +#include <asm/arch/k3-common-fdt.h> #include "common.h" #include <dm.h> #include <fdt_support.h> #include <linux/soc/ti/ti_sci_protocol.h> -#include "common_fdt.h" static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) { @@ -164,3 +164,39 @@ add_carveout: return 0; } + +static int fdt_fixup_critical_trips(void *blob, int zoneoffset, int maxc) +{ + int node, trip; + + node = fdt_subnode_offset(blob, zoneoffset, "trips"); + if (node < 0) + return -1; + + fdt_for_each_subnode(trip, blob, node) { + const char *type = fdt_getprop(blob, trip, "type", NULL); + + if (!type || (strncmp(type, "critical", 8) != 0)) + continue; + + if (fdt_setprop_u32(blob, trip, "temperature", 1000 * maxc) < 0) + return -1; + } + + return 0; +} + +void fdt_fixup_thermal_critical_trips_k3(void *blob, int maxc) +{ + int node, zone; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return; + + fdt_for_each_subnode(zone, blob, node) { + if (fdt_fixup_critical_trips(blob, zone, maxc) < 0) + printf("Failed to set temperature in %s critical trips\n", + fdt_get_name(blob, zone, NULL)); + } +} diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h index bcbc4821c82..2f5655bf24a 100644 --- a/arch/arm/mach-k3/include/mach/am62_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -79,6 +79,25 @@ #define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170) +/* Reset Reason Detection */ +#define CTRLMMR_MCU_RST_SRC (MCU_CTRL_MMR0_BASE + 0x18178) + +#define RST_SRC_SAFETY_ERR BIT(31) +#define RST_SRC_MAIN_ESM_ERR BIT(30) +#define RST_SRC_SW_MAIN_POR_FROM_MAIN BIT(25) +#define RST_SRC_SW_MAIN_POR_FROM_MCU BIT(24) +#define RST_SRC_DS_MAIN_PORZ BIT(23) +#define RST_SRC_DM_WDT_RST BIT(22) +#define RST_SRC_SW_MAIN_WARM_FROM_MAIN BIT(21) +#define RST_SRC_SW_MAIN_WARM_FROM_MCU BIT(20) +#define RST_SRC_SW_MCU_WARM_RST BIT(16) +#define RST_SRC_SMS_WARM_RST BIT(13) +#define RST_SRC_SMS_COLD_RST BIT(12) +#define RST_SRC_DEBUG_RST BIT(8) +#define RST_SRC_THERMAL_RST BIT(4) +#define RST_SRC_MAIN_RESET_PIN BIT(2) +#define RST_SRC_MCU_RESET_PIN BIT(0) + /* Debounce register configuration */ #define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4)) @@ -158,8 +177,8 @@ static inline int k3_has_gpu(void) static const u32 put_device_ids[] = {}; -static const u32 put_core_ids[] = {}; - #endif +static const u32 put_core_ids[] = {}; + #endif /* __ASM_ARCH_AM62_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h index cd61abe0185..f3fd736f31b 100644 --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h @@ -90,8 +90,8 @@ static const u32 put_device_ids[] = {}; -static const u32 put_core_ids[] = {}; - #endif +static const u32 put_core_ids[] = {}; + #endif /* __ASM_ARCH_AM62A_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h index 95af5c5c547..a310b52b45d 100644 --- a/arch/arm/mach-k3/include/mach/am62p_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h @@ -141,8 +141,8 @@ static inline int k3_get_a53_max_frequency(void) static const u32 put_device_ids[] = {}; -static const u32 put_core_ids[] = {}; - #endif +static const u32 put_core_ids[] = {}; + #endif /* __ASM_ARCH_AM62P_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h index 44df887d5df..105b42986de 100644 --- a/arch/arm/mach-k3/include/mach/am64_hardware.h +++ b/arch/arm/mach-k3/include/mach/am64_hardware.h @@ -50,19 +50,20 @@ #define AM64X_DEV_RTI8 127 #define AM64X_DEV_RTI9 128 -#define AM64X_DEV_R5FSS0_CORE0 121 -#define AM64X_DEV_R5FSS0_CORE1 122 static const u32 put_device_ids[] = { AM64X_DEV_RTI9, AM64X_DEV_RTI8, }; +#endif + +#define AM64X_DEV_R5FSS0_CORE0 121 +#define AM64X_DEV_R5FSS0_CORE1 122 + static const u32 put_core_ids[] = { AM64X_DEV_R5FSS0_CORE1, AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */ }; -#endif - #endif /* __ASM_ARCH_DRA8_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h index 9913964c46b..8169584a372 100644 --- a/arch/arm/mach-k3/include/mach/am6_hardware.h +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h @@ -43,19 +43,20 @@ #define AM6_DEV_MCU_RTI0 134 #define AM6_DEV_MCU_RTI1 135 -#define AM6_DEV_MCU_ARMSS0_CPU0 159 -#define AM6_DEV_MCU_ARMSS0_CPU1 245 static const u32 put_device_ids[] = { AM6_DEV_MCU_RTI0, AM6_DEV_MCU_RTI1, }; +#endif + +#define AM6_DEV_MCU_ARMSS0_CPU0 159 +#define AM6_DEV_MCU_ARMSS0_CPU1 245 + static const u32 put_core_ids[] = { AM6_DEV_MCU_ARMSS0_CPU1, AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */ }; -#endif - #endif /* __ASM_ARCH_AM6_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index fc7bee4d00b..81b5f1fa45e 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -125,4 +125,5 @@ struct rom_extended_boot_data { }; u32 get_boot_device(void); +const char *get_reset_reason(void); #endif /* _ASM_ARCH_HARDWARE_H_ */ diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h index 2b5ec771e18..5bef309af0a 100644 --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h @@ -41,19 +41,20 @@ #define J721E_DEV_MCU_RTI0 262 #define J721E_DEV_MCU_RTI1 263 -#define J721E_DEV_MCU_ARMSS0_CPU0 250 -#define J721E_DEV_MCU_ARMSS0_CPU1 251 static const u32 put_device_ids[] = { J721E_DEV_MCU_RTI0, J721E_DEV_MCU_RTI1, }; +#endif + +#define J721E_DEV_MCU_ARMSS0_CPU0 250 +#define J721E_DEV_MCU_ARMSS0_CPU1 251 + static const u32 put_core_ids[] = { J721E_DEV_MCU_ARMSS0_CPU1, J721E_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */ }; -#endif - #endif /* __ASM_ARCH_J721E_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h index 8daea82a77e..82f076a45e0 100644 --- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h +++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h @@ -41,19 +41,20 @@ #define J721S2_DEV_MCU_RTI0 295 #define J721S2_DEV_MCU_RTI1 296 -#define J721S2_DEV_MCU_ARMSS0_CPU0 284 -#define J721S2_DEV_MCU_ARMSS0_CPU1 285 static const u32 put_device_ids[] = { J721S2_DEV_MCU_RTI0, J721S2_DEV_MCU_RTI1, }; +#endif + +#define J721S2_DEV_MCU_ARMSS0_CPU0 284 +#define J721S2_DEV_MCU_ARMSS0_CPU1 285 + static const u32 put_core_ids[] = { J721S2_DEV_MCU_ARMSS0_CPU1, J721S2_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */ }; -#endif - #endif /* __ASM_ARCH_J721S2_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/j722s_hardware.h b/arch/arm/mach-k3/include/mach/j722s_hardware.h index 8d0bec22068..0c695134c28 100644 --- a/arch/arm/mach-k3/include/mach/j722s_hardware.h +++ b/arch/arm/mach-k3/include/mach/j722s_hardware.h @@ -76,8 +76,8 @@ static const u32 put_device_ids[] = {}; -static const u32 put_core_ids[] = {}; - #endif +static const u32 put_core_ids[] = {}; + #endif /* __ASM_ARCH_J722S_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h b/arch/arm/mach-k3/include/mach/j784s4_hardware.h index 0ffe238cdae..29a894baed3 100644 --- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h +++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h @@ -41,19 +41,20 @@ #define J784S4_DEV_MCU_RTI0 367 #define J784S4_DEV_MCU_RTI1 368 -#define J784S4_DEV_MCU_ARMSS0_CPU0 346 -#define J784S4_DEV_MCU_ARMSS0_CPU1 347 static const u32 put_device_ids[] = { J784S4_DEV_MCU_RTI0, J784S4_DEV_MCU_RTI1, }; +#endif + +#define J784S4_DEV_MCU_ARMSS0_CPU0 346 +#define J784S4_DEV_MCU_ARMSS0_CPU1 347 + static const u32 put_core_ids[] = { J784S4_DEV_MCU_ARMSS0_CPU1, J784S4_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */ }; -#endif - #endif /* __ASM_ARCH_J784S4_HARDWARE_H */ diff --git a/arch/arm/mach-k3/common_fdt.h b/arch/arm/mach-k3/include/mach/k3-common-fdt.h index 52c07957483..38a5bb82d95 100644 --- a/arch/arm/mach-k3/common_fdt.h +++ b/arch/arm/mach-k3/include/mach/k3-common-fdt.h @@ -3,12 +3,13 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ -#ifndef _COMMON_FDT_H -#define _COMMON_FDT_H +#ifndef _K3_COMMON_FDT_H +#define _K3_COMMON_FDT_H int fdt_fixup_msmc_ram_k3(void *blob); int fdt_del_node_path(void *blob, const char *path); int fdt_fixup_reserved(void *blob, const char *name, unsigned int new_address, unsigned int new_size); +void fdt_fixup_thermal_critical_trips_k3(void *blob, int maxc); -#endif /* _COMMON_FDT_H */ +#endif /* _K3_COMMON_FDT_H */ diff --git a/arch/arm/mach-k3/j721e/j721e_fdt.c b/arch/arm/mach-k3/j721e/j721e_fdt.c index bcb15208be9..73bca424da3 100644 --- a/arch/arm/mach-k3/j721e/j721e_fdt.c +++ b/arch/arm/mach-k3/j721e/j721e_fdt.c @@ -3,10 +3,9 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <fdt_support.h> -#include "../common_fdt.h" - int ft_system_setup(void *blob, struct bd_info *bd) { return fdt_fixup_msmc_ram_k3(blob); diff --git a/arch/arm/mach-k3/j721e/j721e_init.c b/arch/arm/mach-k3/j721e/j721e_init.c index f31c20f7ed6..f9af0288cf6 100644 --- a/arch/arm/mach-k3/j721e/j721e_init.c +++ b/arch/arm/mach-k3/j721e/j721e_init.c @@ -296,9 +296,9 @@ void do_dt_magic(void) void board_init_f(ulong dummy) { + int ret; #if defined(CONFIG_K3_J721E_DDRSS) || defined(CONFIG_K3_LOAD_SYSFW) struct udevice *dev; - int ret; #endif /* * Cannot delay this further as there is a chance that @@ -371,9 +371,20 @@ void board_init_f(ulong dummy) preloader_console_init(); #endif + /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */ + if (IS_ENABLED(CONFIG_ARM64)) { + ret = shutdown_mcu_r5_core1(); + if (ret) + printf("Unable to shutdown MCU R5 core 1, %d\n", ret); + } + /* Output System Firmware version info */ k3_sysfw_print_ver(); + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); + /* Perform board detection */ do_board_detect(); diff --git a/arch/arm/mach-k3/j721s2/j721s2_fdt.c b/arch/arm/mach-k3/j721s2/j721s2_fdt.c index bcb15208be9..73bca424da3 100644 --- a/arch/arm/mach-k3/j721s2/j721s2_fdt.c +++ b/arch/arm/mach-k3/j721s2/j721s2_fdt.c @@ -3,10 +3,9 @@ * Copyright 2023 Toradex - https://www.toradex.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <fdt_support.h> -#include "../common_fdt.h" - int ft_system_setup(void *blob, struct bd_info *bd) { return fdt_fixup_msmc_ram_k3(blob); diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c index 5941fa26a95..eee3d0440ac 100644 --- a/arch/arm/mach-k3/j721s2/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2/j721s2_init.c @@ -230,8 +230,19 @@ void k3_spl_init(void) remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls)); } + /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */ + if (IS_ENABLED(CONFIG_ARM64)) { + ret = shutdown_mcu_r5_core1(); + if (ret) + printf("Unable to shutdown MCU R5 core 1, %d\n", ret); + } + /* Output System Firmware version info */ k3_sysfw_print_ver(); + + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); } bool check_rom_loaded_sysfw(void) diff --git a/arch/arm/mach-k3/j722s/j722s_fdt.c b/arch/arm/mach-k3/j722s/j722s_fdt.c index 29c832d28ac..c7c5d2f0885 100644 --- a/arch/arm/mach-k3/j722s/j722s_fdt.c +++ b/arch/arm/mach-k3/j722s/j722s_fdt.c @@ -3,8 +3,8 @@ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <asm/arch/k3-common-fdt.h> #include <asm/hardware.h> -#include "../common_fdt.h" #include <fdt_support.h> int ft_system_setup(void *blob, struct bd_info *bd) diff --git a/arch/arm/mach-k3/j722s/j722s_init.c b/arch/arm/mach-k3/j722s/j722s_init.c index af211377e7c..1180c75f551 100644 --- a/arch/arm/mach-k3/j722s/j722s_init.c +++ b/arch/arm/mach-k3/j722s/j722s_init.c @@ -150,6 +150,10 @@ static void k3_spl_init(void) /* Output System Firmware version info */ k3_sysfw_print_ver(); + + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); } static void k3_mem_init(void) @@ -162,6 +166,8 @@ static void k3_mem_init(void) if (ret) panic("DRAM init failed: %d\n", ret); } + + spl_enable_cache(); } static __maybe_unused void enable_mcu_esm_reset(void) diff --git a/arch/arm/mach-k3/j784s4/j784s4_fdt.c b/arch/arm/mach-k3/j784s4/j784s4_fdt.c index e1275097051..9c9a1382b41 100644 --- a/arch/arm/mach-k3/j784s4/j784s4_fdt.c +++ b/arch/arm/mach-k3/j784s4/j784s4_fdt.c @@ -6,10 +6,9 @@ * Apurva Nandan <a-nandan@ti.com> */ +#include <asm/arch/k3-common-fdt.h> #include <fdt_support.h> -#include "../common_fdt.h" - int ft_system_setup(void *blob, struct bd_info *bd) { return fdt_fixup_msmc_ram_k3(blob); diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c index 787cf6261e4..0f11511bda0 100644 --- a/arch/arm/mach-k3/j784s4/j784s4_init.c +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c @@ -206,8 +206,19 @@ void k3_spl_init(void) writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL); + /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */ + if (IS_ENABLED(CONFIG_ARM64)) { + ret = shutdown_mcu_r5_core1(); + if (ret) + printf("Unable to shutdown MCU R5 core 1, %d\n", ret); + } + /* Output System Firmware version info */ k3_sysfw_print_ver(); + + /* Output DM Firmware version info */ + if (IS_ENABLED(CONFIG_ARM64)) + k3_dm_print_ver(); } void k3_mem_init(void) @@ -242,6 +253,10 @@ void board_init_f(ulong dummy) int ret; k3_spl_init(); + + /* Perform board detection */ + do_board_detect(); + k3_mem_init(); if (IS_ENABLED(CONFIG_CPU_V7R) && IS_ENABLED(CONFIG_K3_AVS0)) { diff --git a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c index 0b6604039f3..6ac2973bd67 100644 --- a/arch/arm/mach-k3/r5/common.c +++ b/arch/arm/mach-k3/r5/common.c @@ -5,6 +5,7 @@ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <env.h> #include <linux/printk.h> #include <linux/types.h> #include <asm/hardware.h> @@ -136,7 +137,7 @@ void release_resources_for_core_shutdown(void) } } -void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +void __noreturn jump_to_image(struct spl_image_info *spl_image) { typedef void __noreturn (*image_entry_noargs_t)(void); struct ti_sci_handle *ti_sci = get_ti_sci_handle(); |