diff options
Diffstat (limited to 'arch/arm/mach-meson')
| -rw-r--r-- | arch/arm/mach-meson/Kconfig | 132 | ||||
| -rw-r--r-- | arch/arm/mach-meson/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/mach-meson/board-axg.c | 118 | ||||
| -rw-r--r-- | arch/arm/mach-meson/board-common.c | 117 | ||||
| -rw-r--r-- | arch/arm/mach-meson/board-gx.c (renamed from arch/arm/mach-meson/board.c) | 106 | ||||
| -rw-r--r-- | arch/arm/mach-meson/eth.c | 53 | ||||
| -rw-r--r-- | arch/arm/mach-meson/sm.c | 1 |
7 files changed, 349 insertions, 182 deletions
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index cc943443b3a..11077bc6cc2 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -1,89 +1,49 @@ if ARCH_MESON -config MESON_GXBB - bool "Support Meson GXBaby" - select ARM64 - select CLK - select DM - select DM_SERIAL - imply CMD_DM - help - The Amlogic Meson GXBaby (S905) is an ARM SoC with a - quad-core Cortex-A53 CPU and a Mali-450 GPU. - -config MESON_GXL - bool "Support Meson GXL" +config MESON64_COMMON + bool select ARM64 select CLK select DM select DM_SERIAL + select SYSCON + select REGMAP + select BOARD_LATE_INIT imply CMD_DM - help - The Amlogic Meson GXL (S905X and S905D) is an ARM SoC with a - quad-core Cortex-A53 CPU and a Mali-450 GPU. - -config MESON_GXM - bool "Support Meson GXM" - select ARM64 - select CLK - select DM - select DM_SERIAL - help - The Amlogic Meson GXM (S912) is an ARM SoC with an - octo-core Cortex-A53 CPU and a Mali-T860 GPU. - -if MESON_GXBB -config TARGET_ODROID_C2 - bool "ODROID-C2" - help - ODROID-C2 is a single board computer based on Meson GXBaby - with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD - slot, eMMC, IR receiver and a 40-pin GPIO header. +config MESON_GX + bool + select MESON64_COMMON -config TARGET_NANOPI_K2 - bool "NANOPI_K2" - help - NANOPI_K2 is a single board computer based on Meson GXBaby - with 2 GiB of RAM, Gigabit Ethernet,AP6212 Wifi, HDMI, 4 USB, - micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. -endif +choice + prompt "Platform select" + default MESON_GXBB -if MESON_GXL - -config TARGET_P212 - bool "P212" +config MESON_GXBB + bool "GXBB" + select MESON_GX help - P212 is a reference dessign board based on Meson GXL S905X SoC - with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot, - eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module. + Select this if your SoC is an S905 -config TARGET_LIBRETECH_CC - bool "LIBRETECH-CC" +config MESON_GXL + bool "GXL" + select MESON_GX help - LibreTech CC is a single board computer based on Meson GXL - with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver and a 40-pin GPIO header. + Select this if your SoC is an S905X/D or S805X -config TARGET_KHADAS_VIM - bool "KHADAS-VIM" +config MESON_GXM + bool "GXM" + select MESON_GX help - Khadas VIM is a single board computer based on Meson GXL - with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver and a 40-pin GPIO header. - -endif + Select this if your SoC is an S912 -if MESON_GXM - -config TARGET_KHADAS_VIM2 - bool "KHADAS-VIM2" +config MESON_AXG + bool "AXG" + select MESON64_COMMON help - Khadas VIM2 is a single board computer based on Meson GXM - with 2/3 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver and a 40-pin GPIO header. + Select this if your SoC is an A113X/D -endif +endchoice config SYS_SOC default "meson" @@ -91,16 +51,32 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x1000 -source "board/amlogic/odroid-c2/Kconfig" - -source "board/amlogic/nanopi-k2/Kconfig" - -source "board/amlogic/p212/Kconfig" - -source "board/amlogic/libretech-cc/Kconfig" - -source "board/amlogic/khadas-vim/Kconfig" +config SYS_VENDOR + string "Vendor name" + default "amlogic" + help + This option contains information about board name. + Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> will + be used. + +config SYS_BOARD + string "Board name" + default "odroid-c2" if MESON_GXBB + default "p212" if MESON_GXL + default "q200" if MESON_GXM + default "s400" if MESON_AXG + default "" + help + This option contains information about board name. + Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> will + be used. -source "board/amlogic/khadas-vim2/Kconfig" +config SYS_CONFIG_NAME + string "Board configuration name" + default "meson64" + help + This option contains information about board configuration name. + Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header + will be used for board configuration. endif diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile index 8ad9b3e575e..b716e1a1529 100644 --- a/arch/arm/mach-meson/Makefile +++ b/arch/arm/mach-meson/Makefile @@ -2,4 +2,6 @@ # # Copyright (c) 2016 Beniamino Galvani <b.galvani@gmail.com> -obj-y += board.o sm.o eth.o +obj-y += board-common.o sm.o +obj-$(CONFIG_MESON_GX) += board-gx.o +obj-$(CONFIG_MESON_AXG) += board-axg.o diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c new file mode 100644 index 00000000000..173905e762d --- /dev/null +++ b/arch/arm/mach-meson/board-axg.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com> + */ + +#include <common.h> +#include <asm/arch/boot.h> +#include <asm/arch/eth.h> +#include <asm/arch/axg.h> +#include <asm/arch/mem.h> +#include <asm/io.h> +#include <asm/armv8/mmu.h> +#include <linux/sizes.h> +#include <phy.h> + +DECLARE_GLOBAL_DATA_PTR; + +int meson_get_boot_device(void) +{ + return readl(AXG_AO_SEC_GP_CFG0) & AXG_AO_BOOT_DEVICE; +} + +/* Configure the reserved memory zones exported by the secure registers + * into EFI and DTB reserved memory entries. + */ +void meson_init_reserved_memory(void *fdt) +{ + u64 bl31_size, bl31_start; + u64 bl32_size, bl32_start; + u32 reg; + + /* + * Get ARM Trusted Firmware reserved memory zones in : + * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0 + * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL + * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL + */ + reg = readl(AXG_AO_SEC_GP_CFG3); + + bl31_size = ((reg & AXG_AO_BL31_RSVMEM_SIZE_MASK) + >> AXG_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K; + bl32_size = (reg & AXG_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K; + + bl31_start = readl(AXG_AO_SEC_GP_CFG5); + bl32_start = readl(AXG_AO_SEC_GP_CFG4); + + /* Add BL31 reserved zone */ + if (bl31_start && bl31_size) + meson_board_add_reserved_memory(fdt, bl31_start, bl31_size); + + /* Add BL32 reserved zone */ + if (bl32_start && bl32_size) + meson_board_add_reserved_memory(fdt, bl32_start, bl32_size); +} + +phys_size_t get_effective_memsize(void) +{ + /* Size is reported in MiB, convert it in bytes */ + return ((readl(AXG_AO_SEC_GP_CFG0) & AXG_AO_MEM_SIZE_MASK) + >> AXG_AO_MEM_SIZE_SHIFT) * SZ_1M; +} + +static struct mm_region axg_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xf0000000UL, + .phys = 0xf0000000UL, + .size = 0x10000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = axg_mem_map; + +/* Configure the Ethernet MAC with the requested interface mode + * with some optional flags. + */ +void meson_eth_init(phy_interface_t mode, unsigned int flags) +{ + switch (mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* Set RGMII mode */ + setbits_le32(AXG_ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RGMII | + AXG_ETH_REG_0_TX_PHASE(1) | + AXG_ETH_REG_0_TX_RATIO(4) | + AXG_ETH_REG_0_PHY_CLK_EN | + AXG_ETH_REG_0_CLK_EN); + break; + + case PHY_INTERFACE_MODE_RMII: + /* Set RMII mode */ + out_le32(AXG_ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RMII | + AXG_ETH_REG_0_INVERT_RMII_CLK | + AXG_ETH_REG_0_CLK_EN); + break; + + default: + printf("Invalid Ethernet interface mode\n"); + return; + } + + /* Enable power gate */ + clrbits_le32(AXG_MEM_PD_REG_0, AXG_MEM_PD_REG_0_ETH_MASK); +} diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c new file mode 100644 index 00000000000..8c41301674e --- /dev/null +++ b/arch/arm/mach-meson/board-common.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + */ + +#include <common.h> +#include <asm/arch/boot.h> +#include <linux/libfdt.h> +#include <linux/err.h> +#include <asm/arch/mem.h> +#include <asm/arch/sm.h> +#include <asm/armv8/mmu.h> +#include <asm/unaligned.h> +#include <efi_loader.h> + +DECLARE_GLOBAL_DATA_PTR; + +__weak int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + const fdt64_t *val; + int offset; + int len; + + offset = fdt_path_offset(gd->fdt_blob, "/memory"); + if (offset < 0) + return -EINVAL; + + val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); + if (len < sizeof(*val) * 2) + return -EINVAL; + + /* Use unaligned access since cache is still disabled */ + gd->ram_size = get_unaligned_be64(&val[1]); + + return 0; +} + +__weak int meson_ft_board_setup(void *blob, bd_t *bd) +{ + return 0; +} + +int ft_board_setup(void *blob, bd_t *bd) +{ + meson_init_reserved_memory(blob); + + return meson_ft_board_setup(blob, bd); +} + +void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) +{ + int ret; + + ret = fdt_add_mem_rsv(fdt, start, size); + if (ret) + printf("Could not reserve zone @ 0x%llx\n", start); + + if (IS_ENABLED(CONFIG_EFI_LOADER)) { + efi_add_memory_map(start, + ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, + EFI_RESERVED_MEMORY_TYPE, false); + } +} + +static void meson_set_boot_source(void) +{ + const char *source; + + switch (meson_get_boot_device()) { + case BOOT_DEVICE_EMMC: + source = "emmc"; + break; + + case BOOT_DEVICE_NAND: + source = "nand"; + break; + + case BOOT_DEVICE_SPI: + source = "spi"; + break; + + case BOOT_DEVICE_SD: + source = "sd"; + break; + + case BOOT_DEVICE_USB: + source = "usb"; + break; + + default: + source = "unknown"; + } + + env_set("boot_source", source); +} + +__weak int meson_board_late_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + meson_set_boot_source(); + + return meson_board_late_init(); +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board-gx.c index d6c62531521..e41552db523 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board-gx.c @@ -1,64 +1,30 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com> */ #include <common.h> -#include <linux/libfdt.h> -#include <linux/err.h> +#include <asm/arch/boot.h> +#include <asm/arch/eth.h> #include <asm/arch/gx.h> -#include <asm/arch/sm.h> +#include <asm/arch/mem.h> +#include <asm/io.h> #include <asm/armv8/mmu.h> -#include <asm/unaligned.h> #include <linux/sizes.h> -#include <efi_loader.h> -#include <asm/io.h> +#include <phy.h> DECLARE_GLOBAL_DATA_PTR; -int dram_init(void) -{ - const fdt64_t *val; - int offset; - int len; - - offset = fdt_path_offset(gd->fdt_blob, "/memory"); - if (offset < 0) - return -EINVAL; - - val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); - if (len < sizeof(*val) * 2) - return -EINVAL; - - /* Use unaligned access since cache is still disabled */ - gd->ram_size = get_unaligned_be64(&val[1]); - - return 0; -} - -phys_size_t get_effective_memsize(void) +int meson_get_boot_device(void) { - /* Size is reported in MiB, convert it in bytes */ - return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK) - >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M; + return readl(GX_AO_SEC_GP_CFG0) & GX_AO_BOOT_DEVICE; } -static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) -{ - int ret; - - ret = fdt_add_mem_rsv(fdt, start, size); - if (ret) - printf("Could not reserve zone @ 0x%llx\n", start); - - if (IS_ENABLED(CONFIG_EFI_LOADER)) { - efi_add_memory_map(start, - ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, - EFI_RESERVED_MEMORY_TYPE, false); - } -} - -void meson_gx_init_reserved_memory(void *fdt) +/* Configure the reserved memory zones exported by the secure registers + * into EFI and DTB reserved memory entries. + */ +void meson_init_reserved_memory(void *fdt) { u64 bl31_size, bl31_start; u64 bl32_size, bl32_start; @@ -70,7 +36,6 @@ void meson_gx_init_reserved_memory(void *fdt) * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL */ - reg = readl(GX_AO_SEC_GP_CFG3); bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK) @@ -102,9 +67,11 @@ void meson_gx_init_reserved_memory(void *fdt) meson_board_add_reserved_memory(fdt, bl32_start, bl32_size); } -void reset_cpu(ulong addr) +phys_size_t get_effective_memsize(void) { - psci_system_reset(); + /* Size is reported in MiB, convert it in bytes */ + return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK) + >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M; } static struct mm_region gx_mem_map[] = { @@ -128,3 +95,44 @@ static struct mm_region gx_mem_map[] = { }; struct mm_region *mem_map = gx_mem_map; + +/* Configure the Ethernet MAC with the requested interface mode + * with some optional flags. + */ +void meson_eth_init(phy_interface_t mode, unsigned int flags) +{ + switch (mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* Set RGMII mode */ + setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF | + GX_ETH_REG_0_TX_PHASE(1) | + GX_ETH_REG_0_TX_RATIO(4) | + GX_ETH_REG_0_PHY_CLK_EN | + GX_ETH_REG_0_CLK_EN); + break; + + case PHY_INTERFACE_MODE_RMII: + /* Set RMII mode */ + out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK | + GX_ETH_REG_0_CLK_EN); + + /* Use GXL RMII Internal PHY */ + if (IS_ENABLED(CONFIG_MESON_GXL) && + (flags & MESON_USE_INTERNAL_RMII_PHY)) { + writel(0x10110181, GX_ETH_REG_2); + writel(0xe40908ff, GX_ETH_REG_3); + } + + break; + + default: + printf("Invalid Ethernet interface mode\n"); + return; + } + + /* Enable power gate */ + clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); +} diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c deleted file mode 100644 index 8b28bc85311..00000000000 --- a/arch/arm/mach-meson/eth.c +++ /dev/null @@ -1,53 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#include <common.h> -#include <dm.h> -#include <asm/io.h> -#include <asm/arch/gx.h> -#include <asm/arch/eth.h> -#include <phy.h> - -/* Configure the Ethernet MAC with the requested interface mode - * with some optional flags. - */ -void meson_gx_eth_init(phy_interface_t mode, unsigned int flags) -{ - switch (mode) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_TXID: - /* Set RGMII mode */ - setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF | - GX_ETH_REG_0_TX_PHASE(1) | - GX_ETH_REG_0_TX_RATIO(4) | - GX_ETH_REG_0_PHY_CLK_EN | - GX_ETH_REG_0_CLK_EN); - break; - - case PHY_INTERFACE_MODE_RMII: - /* Set RMII mode */ - out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK | - GX_ETH_REG_0_CLK_EN); - - /* Use GXL RMII Internal PHY */ - if (IS_ENABLED(CONFIG_MESON_GXL) && - (flags & MESON_GXL_USE_INTERNAL_RMII_PHY)) { - writel(0x10110181, GX_ETH_REG_2); - writel(0xe40908ff, GX_ETH_REG_3); - } - - break; - - default: - printf("Invalid Ethernet interface mode\n"); - return; - } - - /* Enable power gate */ - clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); -} diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 0bba5e4a073..a07b46895d8 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -6,7 +6,6 @@ */ #include <common.h> -#include <asm/arch/gx.h> #include <linux/kernel.h> #define FN_GET_SHARE_MEM_INPUT_BASE 0x82000020 |