summaryrefslogtreecommitdiff
path: root/arch/arm/mach-stm32mp/stm32mp1/cpu.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-stm32mp/stm32mp1/cpu.c')
-rw-r--r--arch/arm/mach-stm32mp/stm32mp1/cpu.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 62cc98910a7..cb1b84c9af9 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -53,6 +53,7 @@ void dram_bank_mmu_setup(int bank)
struct bd_info *bd = gd->bd;
int i;
phys_addr_t start;
+ phys_addr_t addr;
phys_size_t size;
bool use_lmb = false;
enum dcache_option option;
@@ -77,8 +78,12 @@ void dram_bank_mmu_setup(int bank)
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
+ addr = i << MMU_SECTION_SHIFT;
option = DCACHE_DEFAULT_OPTION;
- if (use_lmb && lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP))
+ if (use_lmb &&
+ (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
+ addr >= gd->ram_top)
+ )
option = 0; /* INVALID ENTRY in TLB */
set_section_dcache(i, option);
}