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-rw-r--r--arch/arm/mach-stm32mp/Kconfig2
-rw-r--r--arch/arm/mach-stm32mp/dram_init.c30
-rw-r--r--arch/arm/mach-stm32mp/stm32mp1/cpu.c7
3 files changed, 23 insertions, 16 deletions
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index d5934a92771..25663a99464 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -39,6 +39,7 @@ choice
config STM32MP13X
bool "Support STMicroelectronics STM32MP13x Soc"
+ select ARCH_EARLY_INIT_R
select ARM_SMCCC
select CPU_V7A
select CPU_V7_HAS_NONSEC
@@ -57,6 +58,7 @@ config STM32MP13X
config STM32MP15X
bool "Support STMicroelectronics STM32MP15x Soc"
+ select ARCH_EARLY_INIT_R
select ARCH_SUPPORT_PSCI
select BINMAN
select CPU_V7A
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index 198785353f1..b06105768b3 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -25,8 +25,11 @@ int optee_get_reserved_memory(u32 *start, u32 *size)
ofnode node;
node = ofnode_path("/reserved-memory/optee");
- if (!ofnode_valid(node))
- return -ENOENT;
+ if (!ofnode_valid(node)) {
+ node = ofnode_path("/reserved-memory/optee_core");
+ if (!ofnode_valid(node))
+ return -ENOENT;
+ }
fdt_start = ofnode_get_addr_size(node, "reg", &fdt_mem_size);
*start = fdt_start;
@@ -62,7 +65,6 @@ int dram_init(void)
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
- int ret;
phys_size_t size;
phys_addr_t reg;
u32 optee_start, optee_size;
@@ -75,10 +77,17 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
* if the effective available memory is bigger
*/
gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1);
+
+ /* add 8M for U-Boot reserved memory: display, fdt, gd,... */
size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE);
- ret = optee_get_reserved_memory(&optee_start, &optee_size);
- reg = (!ret ? optee_start : gd->ram_top) - size;
+ reg = gd->ram_top - size;
+
+ /* Reserved memory for OP-TEE at END of DDR for STM32MP1 SoC */
+ if (IS_ENABLED(CONFIG_STM32MP13X) || IS_ENABLED(CONFIG_STM32MP15X)) {
+ if (!optee_get_reserved_memory(&optee_start, &optee_size))
+ reg = ALIGN(optee_start - size, MMU_SECTION_SIZE);
+ }
/* before relocation, mark the U-Boot memory as cacheable by default */
if (!(gd->flags & GD_FLG_RELOC))
@@ -86,14 +95,3 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
return reg + size;
}
-
-void efi_add_known_memory(void)
-{
- if (IS_ENABLED(CONFIG_EFI_LOADER))
- /*
- * Memory over ram_top is reserved to OPTEE.
- * Declare to EFI only memory area below ram_top
- */
- efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base,
- EFI_CONVENTIONAL_MEMORY);
-}
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 26c073f06a0..62cc98910a7 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -143,6 +143,11 @@ void enable_caches(void)
{
/* I-cache is already enabled in start.S: icache_enable() not needed */
+ /* keep D-cache configuration done before relocation, wait arch_early_init_r*/
+}
+
+int arch_early_init_r(void)
+{
/* deactivate the data cache, early enabled in arch_cpu_init() */
dcache_disable();
/*
@@ -150,6 +155,8 @@ void enable_caches(void)
* warning: the TLB location udpated in board_f.c::reserve_mmu
*/
dcache_enable();
+
+ return 0;
}
static void setup_boot_mode(void)