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-rw-r--r--arch/arm/mach-stm32mp/Kconfig27
-rw-r--r--arch/arm/mach-stm32mp/Kconfig.23x37
-rw-r--r--arch/arm/mach-stm32mp/Makefile1
-rw-r--r--arch/arm/mach-stm32mp/cmd_stm32key.c8
-rw-r--r--arch/arm/mach-stm32mp/include/mach/stm32.h8
-rw-r--r--arch/arm/mach-stm32mp/include/mach/sys_proto.h21
-rw-r--r--arch/arm/mach-stm32mp/stm32mp2/Makefile1
-rw-r--r--arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c191
8 files changed, 286 insertions, 8 deletions
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index c658ac19b41..ba4694f2964 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -84,6 +84,32 @@ config STM32MP15X
STMicroelectronics MPU with core ARMv7
dual core A7 for STM32MP157/3, monocore for STM32MP151
+config STM32MP23X
+ bool "Support STMicroelectronics STM32MP23x Soc"
+ select ARM64
+ select CLK_STM32MP25
+ select OF_BOARD
+ select PINCTRL_STM32
+ select STM32_RCC
+ select STM32_RESET
+ select STM32_SERIAL
+ select STM32MP_TAMP_NVMEM
+ select SYS_ARCH_TIMER
+ select TFABOOT
+ imply CLK_SCMI
+ imply CMD_NVEDIT_INFO
+ imply DM_REGULATOR
+ imply DM_REGULATOR_SCMI
+ imply OF_UPSTREAM
+ imply OPTEE
+ imply RESET_SCMI
+ imply SYSRESET_PSCI
+ imply TEE
+ imply VERSION_VARIABLE
+ help
+ Support of STMicroelectronics SOC STM32MP23x family
+ STMicroelectronics MPU with 2 * A53 core and 1 M33 core
+
config STM32MP25X
bool "Support STMicroelectronics STM32MP25x Soc"
select ARM64
@@ -168,6 +194,7 @@ config MFD_STM32_TIMERS
source "arch/arm/mach-stm32mp/Kconfig.13x"
source "arch/arm/mach-stm32mp/Kconfig.15x"
+source "arch/arm/mach-stm32mp/Kconfig.23x"
source "arch/arm/mach-stm32mp/Kconfig.25x"
source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
diff --git a/arch/arm/mach-stm32mp/Kconfig.23x b/arch/arm/mach-stm32mp/Kconfig.23x
new file mode 100644
index 00000000000..2859210c77c
--- /dev/null
+++ b/arch/arm/mach-stm32mp/Kconfig.23x
@@ -0,0 +1,37 @@
+if STM32MP23X
+
+choice
+ prompt "STM32MP23x board select"
+ optional
+
+config TARGET_ST_STM32MP23X
+ bool "STMicroelectronics STM32MP23x boards"
+ imply BOOTSTAGE
+ imply CMD_BOOTSTAGE
+ help
+ target the STMicroelectronics board with SOC STM32MP23x
+ managed by board/st/stm32mp2
+ The difference between board are managed with devicetree
+
+endchoice
+
+config TEXT_BASE
+ default 0x84000000
+
+config PRE_CON_BUF_ADDR
+ default 0x84800000
+
+config PRE_CON_BUF_SZ
+ default 4096
+
+if DEBUG_UART
+
+# debug on USART2 by default
+config DEBUG_UART_BASE
+ default 0x400e0000
+
+endif
+
+source "board/st/stm32mp2/Kconfig"
+
+endif
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index ecd49fe668d..eeb5fdd7b45 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -10,6 +10,7 @@ obj-y += soc.o
obj-$(CONFIG_STM32MP15X) += stm32mp1/
obj-$(CONFIG_STM32MP13X) += stm32mp1/
+obj-$(CONFIG_STM32MP23X) += stm32mp2/
obj-$(CONFIG_STM32MP25X) += stm32mp2/
obj-$(CONFIG_MFD_STM32_TIMERS) += timers.o
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index 6bfa67859e1..f5def4cd2dc 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
@@ -171,7 +171,7 @@ static u8 get_key_nb(void)
if (IS_ENABLED(CONFIG_STM32MP15X))
return ARRAY_SIZE(stm32mp15_list);
- if (IS_ENABLED(CONFIG_STM32MP25X))
+ if (IS_ENABLED(CONFIG_STM32MP23X) || IS_ENABLED(CONFIG_STM32MP25X))
return ARRAY_SIZE(stm32mp25_list);
}
@@ -183,7 +183,7 @@ static const struct stm32key *get_key(u8 index)
if (IS_ENABLED(CONFIG_STM32MP15X))
return &stm32mp15_list[index];
- if (IS_ENABLED(CONFIG_STM32MP25X))
+ if (IS_ENABLED(CONFIG_STM32MP23X) || IS_ENABLED(CONFIG_STM32MP25X))
return &stm32mp25_list[index];
}
@@ -195,7 +195,7 @@ static u8 get_otp_close_state_nb(void)
if (IS_ENABLED(CONFIG_STM32MP15X))
return ARRAY_SIZE(stm32mp15_close_state_otp);
- if (IS_ENABLED(CONFIG_STM32MP25X))
+ if (IS_ENABLED(CONFIG_STM32MP23X) || IS_ENABLED(CONFIG_STM32MP25X))
return ARRAY_SIZE(stm32mp25_close_state_otp);
}
@@ -207,7 +207,7 @@ static const struct otp_close *get_otp_close_state(u8 index)
if (IS_ENABLED(CONFIG_STM32MP15X))
return &stm32mp15_close_state_otp[index];
- if (IS_ENABLED(CONFIG_STM32MP25X))
+ if (IS_ENABLED(CONFIG_STM32MP23X) || IS_ENABLED(CONFIG_STM32MP25X))
return &stm32mp25_close_state_otp[index];
}
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 37f3e8595b2..2bf50c755cb 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -165,7 +165,7 @@ enum forced_boot_mode {
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32MP15X || CONFIG_STM32MP13X */
-#ifdef CONFIG_STM32MP25X
+#if defined(CONFIG_STM32MP23X) || defined(CONFIG_STM32MP25X)
#define STM32_USART2_BASE 0x400E0000
#define STM32_USART3_BASE 0x400F0000
#define STM32_UART4_BASE 0x40100000
@@ -190,7 +190,7 @@ enum forced_boot_mode {
/* TAMP registers zone 3 RIF 1 (RW) at 96*/
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(96)
-#endif /* STM32MP25X */
+#endif /* defined(CONFIG_STM32MP23X) || defined(CONFIG_STM32MP25X) */
/* offset used for BSEC driver: misc_read and misc_write */
#define STM32_BSEC_SHADOW_OFFSET 0x0
@@ -214,14 +214,14 @@ enum forced_boot_mode {
#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 60
#endif
-#ifdef CONFIG_STM32MP25X
+#if defined(CONFIG_STM32MP23X) || defined(CONFIG_STM32MP25X)
#define BSEC_OTP_SERIAL 5
#define BSEC_OTP_RPN 9
#define BSEC_OTP_REVID 102
#define BSEC_OTP_PKG 122
#define BSEC_OTP_BOARD 246
#define BSEC_OTP_MAC 247
-#endif
+#endif /* defined(CONFIG_STM32MP23X) || defined(CONFIG_STM32MP25X) */
#ifndef __ASSEMBLY__
#include <asm/types.h>
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 19073668497..733ac3b595f 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -30,6 +30,20 @@
#define CPU_STM32MP131Fxx 0x05010EC8
#define CPU_STM32MP131Dxx 0x05010EC9
+/* ID for STM32MP23x = Device Part Number (RPN) (bit31:0) */
+#define CPU_STM32MP235Cxx 0x00082182
+#define CPU_STM32MP233Cxx 0x000B318E
+#define CPU_STM32MP231Cxx 0x000B31EF
+#define CPU_STM32MP235Axx 0x40082F82
+#define CPU_STM32MP233Axx 0x400B3F8E
+#define CPU_STM32MP231Axx 0x400B3FEF
+#define CPU_STM32MP235Fxx 0x80082182
+#define CPU_STM32MP233Fxx 0x800B318E
+#define CPU_STM32MP231Fxx 0x800B31EF
+#define CPU_STM32MP235Dxx 0xC0082F82
+#define CPU_STM32MP233Dxx 0xC00B3F8E
+#define CPU_STM32MP231Dxx 0xC00B3FEF
+
/* ID for STM32MP25x = Device Part Number (RPN) (bit31:0) */
#define CPU_STM32MP257Cxx 0x00002000
#define CPU_STM32MP255Cxx 0x00082000
@@ -53,6 +67,7 @@ u32 get_cpu_type(void);
#define CPU_DEV_STM32MP15 0x500
#define CPU_DEV_STM32MP13 0x501
+#define CPU_DEV_STM32MP23 0x505
#define CPU_DEV_STM32MP25 0x505
/* return CPU_DEV constants */
@@ -87,6 +102,12 @@ u32 get_cpu_package(void);
#define STM32MP15_PKG_AD_TFBGA257 1
#define STM32MP15_PKG_UNKNOWN 0
+/* package used for STM32MP23x */
+#define STM32MP23_PKG_CUSTOM 0
+#define STM32MP23_PKG_AL_VFBGA361 1
+#define STM32MP23_PKG_AK_VFBGA424 3
+#define STM32MP23_PKG_AJ_TFBGA361 7
+
/* package used for STM32MP25x */
#define STM32MP25_PKG_CUSTOM 0
#define STM32MP25_PKG_AL_VFBGA361 1
diff --git a/arch/arm/mach-stm32mp/stm32mp2/Makefile b/arch/arm/mach-stm32mp/stm32mp2/Makefile
index 5dbf75daa76..27fbf3ae728 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/Makefile
+++ b/arch/arm/mach-stm32mp/stm32mp2/Makefile
@@ -7,4 +7,5 @@ obj-y += cpu.o
obj-y += arm64-mmu.o
obj-y += rifsc.o
obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
+obj-$(CONFIG_STM32MP23X) += stm32mp23x.o
obj-$(CONFIG_STM32MP25X) += stm32mp25x.o
diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c b/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c
new file mode 100644
index 00000000000..022db60811a
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <log.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+
+/* SYSCFG register */
+#define SYSCFG_DEVICEID_OFFSET 0x6400
+#define SYSCFG_DEVICEID_DEV_ID_MASK GENMASK(11, 0)
+#define SYSCFG_DEVICEID_DEV_ID_SHIFT 0
+
+/* Revision ID = OTP102[5:0] 6 bits : 3 for Major / 3 for Minor*/
+#define REVID_SHIFT 0
+#define REVID_MASK GENMASK(5, 0)
+
+/* Device Part Number (RPN) = OTP9 */
+#define RPN_SHIFT 0
+#define RPN_MASK GENMASK(31, 0)
+
+/* Package = bit 0:2 of OTP122 => STM32MP23_PKG defines
+ * - 000: Custom package
+ * - 011: TFBGA361 => AL = 10x10, 361 balls pith 0.5mm
+ * - 100: TFBGA424 => AK = 14x14, 424 balls pith 0.5mm
+ * - 101: TFBGA436 => AI = 18x18, 436 balls pith 0.5mm
+ * - others: Reserved
+ */
+#define PKG_SHIFT 0
+#define PKG_MASK GENMASK(2, 0)
+
+static u32 read_deviceid(void)
+{
+ void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+ return readl(syscfg + SYSCFG_DEVICEID_OFFSET);
+}
+
+u32 get_cpu_dev(void)
+{
+ return (read_deviceid() & SYSCFG_DEVICEID_DEV_ID_MASK) >> SYSCFG_DEVICEID_DEV_ID_SHIFT;
+}
+
+u32 get_cpu_rev(void)
+{
+ return get_otp(BSEC_OTP_REVID, REVID_SHIFT, REVID_MASK);
+}
+
+/* Get Device Part Number (RPN) from OTP */
+u32 get_cpu_type(void)
+{
+ return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
+}
+
+/* Get Package options from OTP */
+u32 get_cpu_package(void)
+{
+ return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
+}
+
+int get_eth_nb(void)
+{
+ int nb_eth;
+
+ switch (get_cpu_type()) {
+ case CPU_STM32MP235Fxx:
+ fallthrough;
+ case CPU_STM32MP235Dxx:
+ fallthrough;
+ case CPU_STM32MP235Cxx:
+ fallthrough;
+ case CPU_STM32MP235Axx:
+ fallthrough;
+ case CPU_STM32MP233Fxx:
+ fallthrough;
+ case CPU_STM32MP233Dxx:
+ fallthrough;
+ case CPU_STM32MP233Cxx:
+ fallthrough;
+ case CPU_STM32MP233Axx:
+ nb_eth = 2; /* dual ETH */
+ break;
+ case CPU_STM32MP231Fxx:
+ fallthrough;
+ case CPU_STM32MP231Dxx:
+ fallthrough;
+ case CPU_STM32MP231Cxx:
+ fallthrough;
+ case CPU_STM32MP231Axx:
+ nb_eth = 1; /* single ETH */
+ break;
+ default:
+ nb_eth = 0;
+ break;
+ }
+
+ return nb_eth;
+}
+
+void get_soc_name(char name[SOC_NAME_SIZE])
+{
+ char *cpu_s, *cpu_r, *package;
+
+ cpu_s = "????";
+ cpu_r = "?";
+ package = "??";
+ if (get_cpu_dev() == CPU_DEV_STM32MP23) {
+ switch (get_cpu_type()) {
+ case CPU_STM32MP235Fxx:
+ cpu_s = "235F";
+ break;
+ case CPU_STM32MP235Dxx:
+ cpu_s = "235D";
+ break;
+ case CPU_STM32MP235Cxx:
+ cpu_s = "235C";
+ break;
+ case CPU_STM32MP235Axx:
+ cpu_s = "235A";
+ break;
+ case CPU_STM32MP233Fxx:
+ cpu_s = "233F";
+ break;
+ case CPU_STM32MP233Dxx:
+ cpu_s = "233D";
+ break;
+ case CPU_STM32MP233Cxx:
+ cpu_s = "233C";
+ break;
+ case CPU_STM32MP233Axx:
+ cpu_s = "233A";
+ break;
+ case CPU_STM32MP231Fxx:
+ cpu_s = "231F";
+ break;
+ case CPU_STM32MP231Dxx:
+ cpu_s = "231D";
+ break;
+ case CPU_STM32MP231Cxx:
+ cpu_s = "231C";
+ break;
+ case CPU_STM32MP231Axx:
+ cpu_s = "231A";
+ break;
+ default:
+ cpu_s = "23??";
+ break;
+ }
+ /* REVISION */
+ switch (get_cpu_rev()) {
+ case OTP_REVID_1:
+ cpu_r = "A";
+ break;
+ case OTP_REVID_2:
+ cpu_r = "B";
+ break;
+ case OTP_REVID_2_1:
+ cpu_r = "Y";
+ break;
+ case OTP_REVID_2_2:
+ cpu_r = "X";
+ break;
+ default:
+ break;
+ }
+ /* PACKAGE */
+ switch (get_cpu_package()) {
+ case STM32MP23_PKG_CUSTOM:
+ package = "XX";
+ break;
+ case STM32MP23_PKG_AL_VFBGA361:
+ package = "AL";
+ break;
+ case STM32MP23_PKG_AK_VFBGA424:
+ package = "AK";
+ break;
+ case STM32MP23_PKG_AJ_TFBGA361:
+ package = "AJ";
+ break;
+ default:
+ break;
+ }
+ }
+
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, package, cpu_r);
+}
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-26 16:28:44 +0000