summaryrefslogtreecommitdiff
path: root/arch/arm/mach-sunxi/pinmux.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-sunxi/pinmux.c')
-rw-r--r--arch/arm/mach-sunxi/pinmux.c32
1 files changed, 20 insertions, 12 deletions
diff --git a/arch/arm/mach-sunxi/pinmux.c b/arch/arm/mach-sunxi/pinmux.c
index 642483f06c5..c95fcee9f6c 100644
--- a/arch/arm/mach-sunxi/pinmux.c
+++ b/arch/arm/mach-sunxi/pinmux.c
@@ -14,7 +14,7 @@ void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
u32 index = GPIO_CFG_INDEX(bank_offset);
u32 offset = GPIO_CFG_OFFSET(bank_offset);
- clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
+ clrsetbits_le32(&pio->cfg[index], 0xf << offset, val << offset);
}
void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
@@ -31,7 +31,7 @@ int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
u32 offset = GPIO_CFG_OFFSET(bank_offset);
u32 cfg;
- cfg = readl(&pio->cfg[0] + index);
+ cfg = readl(&pio->cfg[index]);
cfg >>= offset;
return cfg & 0xf;
@@ -45,26 +45,34 @@ int sunxi_gpio_get_cfgpin(u32 pin)
return sunxi_gpio_get_cfgbank(pio, pin);
}
-int sunxi_gpio_set_drv(u32 pin, u32 val)
+void sunxi_gpio_set_drv(u32 pin, u32 val)
{
u32 bank = GPIO_BANK(pin);
- u32 index = GPIO_DRV_INDEX(pin);
- u32 offset = GPIO_DRV_OFFSET(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
- clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
+ sunxi_gpio_set_drv_bank(pio, pin, val);
+}
+
+void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val)
+{
+ u32 index = GPIO_DRV_INDEX(bank_offset);
+ u32 offset = GPIO_DRV_OFFSET(bank_offset);
- return 0;
+ clrsetbits_le32(&pio->drv[index], 0x3 << offset, val << offset);
}
-int sunxi_gpio_set_pull(u32 pin, u32 val)
+void sunxi_gpio_set_pull(u32 pin, u32 val)
{
u32 bank = GPIO_BANK(pin);
- u32 index = GPIO_PULL_INDEX(pin);
- u32 offset = GPIO_PULL_OFFSET(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
- clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);
+ sunxi_gpio_set_pull_bank(pio, pin, val);
+}
+
+void sunxi_gpio_set_pull_bank(struct sunxi_gpio *pio, int bank_offset, u32 val)
+{
+ u32 index = GPIO_PULL_INDEX(bank_offset);
+ u32 offset = GPIO_PULL_OFFSET(bank_offset);
- return 0;
+ clrsetbits_le32(&pio->pull[index], 0x3 << offset, val << offset);
}