summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Makefile6
-rw-r--r--arch/arm/mach-tegra/ap.c11
-rw-r--r--arch/arm/mach-tegra/board.c4
-rw-r--r--arch/arm/mach-tegra/board2.c18
-rw-r--r--arch/arm/mach-tegra/tegra114/Makefile2
-rw-r--r--arch/arm/mach-tegra/tegra124/Kconfig4
-rw-r--r--arch/arm/mach-tegra/tegra124/Makefile4
-rw-r--r--arch/arm/mach-tegra/tegra20/Makefile4
-rw-r--r--arch/arm/mach-tegra/tegra30/Makefile4
9 files changed, 37 insertions, 20 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 1d22dc3942f..ebac3473a1f 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -5,7 +5,7 @@
# (C) Copyright 2000-2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-y += cpu.o
else
@@ -16,7 +16,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o
obj-y += board.o board2.o
obj-y += cache.o
obj-$(CONFIG_TEGRA_CLKRST) += clock.o
-obj-$(CONFIG_$(SPL_)TEGRA_CRYPTO) += crypto.o
+obj-$(CONFIG_$(XPL_)TEGRA_CRYPTO) += crypto.o
obj-$(CONFIG_TEGRA_PMC) += powergate.o
obj-y += xusb-padctl-dummy.o
@@ -25,7 +25,7 @@ obj-y += dt-setup.o
obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
obj-$(CONFIG_TEGRA_GPU) += gpu.o
obj-$(CONFIG_TEGRA_IVC) += ivc.o
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_ARMV7_PSCI) += psci.o
endif
obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 1ea620e4ab5..f35bdba4d48 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -32,7 +32,7 @@ int tegra_get_chip(void)
* Tegra30, 0x35 for T114, and 0x40 for Tegra124.
*/
rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
- debug("%s: CHIPID is 0x%02X\n", __func__, rev);
+ debug("%s: CHIPID is 0x%02x\n", __func__, rev);
return rev;
}
@@ -43,7 +43,7 @@ int tegra_get_sku_info(void)
struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
sku_id = readl(&fuse->sku_info) & 0xff;
- debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id);
+ debug("%s: SKU info byte is 0x%02x\n", __func__, sku_id);
return sku_id;
}
@@ -58,8 +58,9 @@ int tegra_get_chip_sku(void)
switch (chip_id) {
case CHIPID_TEGRA20:
switch (sku_id) {
- case SKU_ID_T20_7:
+ case SKU_ID_AP20:
case SKU_ID_T20:
+ case SKU_ID_AP20H:
return TEGRA_SOC_T20;
case SKU_ID_T25SE:
case SKU_ID_AP25:
@@ -103,8 +104,8 @@ int tegra_get_chip_sku(void)
}
/* unknown chip/sku id */
- printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n",
- __func__, chip_id, sku_id);
+ printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02x/0x%02x)\n",
+ __func__, chip_id, sku_id);
return TEGRA_SOC_UNKNOWN;
}
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index c382e042860..7ca56a3b081 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -47,7 +47,7 @@ enum {
static bool from_spl __section(".data");
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
unsigned long r3)
{
@@ -181,7 +181,7 @@ static int uart_configs[] = {
-1,
-1,
-1,
- -1,
+ FUNCMUX_UART5_SDMMC1, /* UARTE */
#elif defined(CONFIG_TEGRA114)
-1,
-1,
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 5c5838629b2..6e9ef68caf9 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -6,6 +6,7 @@
#include <config.h>
#include <dm.h>
+#include <dm/root.h>
#include <env.h>
#include <errno.h>
#include <init.h>
@@ -46,7 +47,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
/* TODO(sjg@chromium.org): Remove once SPL supports device tree */
U_BOOT_DRVINFO(tegra_gpios) = {
"gpio_tegra"
@@ -457,3 +458,18 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
return CFG_SYS_SDRAM_BASE + usable_ram_size_below_4g();
}
+
+#if IS_ENABLED(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+ int ret, rescan;
+
+ ret = fdtdec_resetup(&rescan);
+ if (!ret && rescan) {
+ dm_uninit();
+ dm_init_and_scan(true);
+ }
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/mach-tegra/tegra114/Makefile b/arch/arm/mach-tegra/tegra114/Makefile
index 346d6cb5696..f1c1042b4e2 100644
--- a/arch/arm/mach-tegra/tegra114/Makefile
+++ b/arch/arm/mach-tegra/tegra114/Makefile
@@ -2,6 +2,6 @@
#
# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
-obj-$(CONFIG_SPL_BUILD) += cpu.o
+obj-$(CONFIG_XPL_BUILD) += cpu.o
obj-y += clock.o
diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig
index fb016aa46c9..84c8f86bad0 100644
--- a/arch/arm/mach-tegra/tegra124/Kconfig
+++ b/arch/arm/mach-tegra/tegra124/Kconfig
@@ -21,8 +21,8 @@ config TARGET_CEI_TK1_SOM
bool "Colorado Engineering Inc Tegra124 TK1-som board"
select ARCH_SUPPORT_PSCI
select BOARD_LATE_INIT
- select CPU_V7_HAS_NONSEC if !SPL_BUILD
- select CPU_V7_HAS_VIRT if !SPL_BUILD
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
help
The Colorado Engineering Tegra TK1-SOM is a very compact
(51mmx58mm) board that is functionally almost the same as
diff --git a/arch/arm/mach-tegra/tegra124/Makefile b/arch/arm/mach-tegra/tegra124/Makefile
index 6ea511e7b25..dee790015a3 100644
--- a/arch/arm/mach-tegra/tegra124/Makefile
+++ b/arch/arm/mach-tegra/tegra124/Makefile
@@ -5,13 +5,13 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_SPL_BUILD) += cpu.o
+obj-$(CONFIG_XPL_BUILD) += cpu.o
obj-y += clock.o
obj-y += pmc.o
obj-y += xusb-padctl.o
obj-y += ../xusb-padctl-common.o
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_ARMV7_NONSEC) += psci.o
endif
diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile
index c2ae98eb376..32c1866b099 100644
--- a/arch/arm/mach-tegra/tegra20/Makefile
+++ b/arch/arm/mach-tegra/tegra20/Makefile
@@ -2,8 +2,8 @@
#
# (C) Copyright 2010,2011 Nvidia Corporation.
-obj-$(CONFIG_SPL_BUILD) += cpu.o
-obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
+obj-$(CONFIG_XPL_BUILD) += cpu.o
+obj-$(CONFIG_$(XPL_)CMD_EBTUPDATE) += bct.o
# The AVP is ARMv4T architecture so we must use special compiler
# flags for any startup files it might use.
diff --git a/arch/arm/mach-tegra/tegra30/Makefile b/arch/arm/mach-tegra/tegra30/Makefile
index ee0e6f5b948..b36657a432f 100644
--- a/arch/arm/mach-tegra/tegra30/Makefile
+++ b/arch/arm/mach-tegra/tegra30/Makefile
@@ -2,7 +2,7 @@
#
# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
-obj-$(CONFIG_SPL_BUILD) += cpu.o
-obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
+obj-$(CONFIG_XPL_BUILD) += cpu.o
+obj-$(CONFIG_$(XPL_)CMD_EBTUPDATE) += bct.o
obj-y += clock.o