3 files changed, 23 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 1ea620e4ab5..f35bdba4d48 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -32,7 +32,7 @@ int tegra_get_chip(void)
 	 * Tegra30, 0x35 for T114, and 0x40 for Tegra124.
 	 */
 	rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
-	debug("%s: CHIPID is 0x%02X\n", __func__, rev);
+	debug("%s: CHIPID is 0x%02x\n", __func__, rev);
 
 	return rev;
 }
@@ -43,7 +43,7 @@ int tegra_get_sku_info(void)
 	struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
 
 	sku_id = readl(&fuse->sku_info) & 0xff;
-	debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id);
+	debug("%s: SKU info byte is 0x%02x\n", __func__, sku_id);
 
 	return sku_id;
 }
@@ -58,8 +58,9 @@ int tegra_get_chip_sku(void)
 	switch (chip_id) {
 	case CHIPID_TEGRA20:
 		switch (sku_id) {
-		case SKU_ID_T20_7:
+		case SKU_ID_AP20:
 		case SKU_ID_T20:
+		case SKU_ID_AP20H:
 			return TEGRA_SOC_T20;
 		case SKU_ID_T25SE:
 		case SKU_ID_AP25:
@@ -103,8 +104,8 @@ int tegra_get_chip_sku(void)
 	}
 
 	/* unknown chip/sku id */
-	printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n",
-		__func__, chip_id, sku_id);
+	printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02x/0x%02x)\n",
+	       __func__, chip_id, sku_id);
 	return TEGRA_SOC_UNKNOWN;
 }
 
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index cc37878b8d1..7ca56a3b081 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -181,7 +181,7 @@ static int uart_configs[] = {
 	-1,
 	-1,
 	-1,
-	-1,
+	FUNCMUX_UART5_SDMMC1,  /* UARTE */
 #elif defined(CONFIG_TEGRA114)
 	-1,
 	-1,
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 8e7fd7efc7b..6e9ef68caf9 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <dm.h>
+#include <dm/root.h>
 #include <env.h>
 #include <errno.h>
 #include <init.h>
@@ -457,3 +458,18 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 
 	return CFG_SYS_SDRAM_BASE + usable_ram_size_below_4g();
 }
+
+#if IS_ENABLED(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+	int ret, rescan;
+
+	ret = fdtdec_resetup(&rescan);
+	if (!ret && rescan) {
+		dm_uninit();
+		dm_init_and_scan(true);
+	}
+
+	return 0;
+}
+#endif