diff options
Diffstat (limited to 'arch/arm')
46 files changed, 2325 insertions, 105 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 582e84cf401..dde422bc5d5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1258,9 +1258,7 @@ config ARCH_ROCKCHIP select DM_REGULATOR select ENABLE_ARM_SOC_BOOT0_HOOK select SPI - imply CMD_FASTBOOT imply DISTRO_DEFAULTS - imply FASTBOOT imply FAT_WRITE imply USB_FUNCTION_FASTBOOT imply SPL_SYSRESET diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 13e1977bfa1..0593b6310fd 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -16,10 +16,6 @@ unsigned long zynqmp_get_system_timer_freq(void) u32 ver = zynqmp_get_silicon_version(); switch (ver) { - case ZYNQMP_CSU_VERSION_VELOCE: - return 10000; - case ZYNQMP_CSU_VERSION_EP108: - return 4000000; case ZYNQMP_CSU_VERSION_QEMU: return 50000000; } @@ -40,11 +36,7 @@ int set_cpu_clk_info(void) { gd->cpu_clk = get_tbclk(); - /* Support Veloce to show at least 1MHz via bdi */ - if (gd->cpu_clk > 1000000) - gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; - else - gd->bd->bi_arm_freq = 1; + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; gd->bd->bi_dsp_freq = 0; diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 2748d65d14b..e122be59c74 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -135,12 +135,8 @@ unsigned int zynqmp_get_silicon_version(void) gd->cpu_clk = get_tbclk(); switch (gd->cpu_clk) { - case 0 ... 1000000: - return ZYNQMP_CSU_VERSION_VELOCE; case 50000000: return ZYNQMP_CSU_VERSION_QEMU; - case 4000000: - return ZYNQMP_CSU_VERSION_EP108; } return ZYNQMP_CSU_VERSION_SILICON; @@ -177,8 +173,8 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, #define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001 -#define ZYNQMP_PM_VERSION_MAJOR 0 -#define ZYNQMP_PM_VERSION_MINOR 3 +#define ZYNQMP_PM_VERSION_MAJOR 1 +#define ZYNQMP_PM_VERSION_MINOR 0 #define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16 #define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6df8bc2fd66..69f852012e0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -130,6 +130,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-cc108.dtb \ zynq-cse-qspi-single.dtb \ zynq-microzed.dtb \ + zynq-minized.dtb \ zynq-picozed.dtb \ zynq-syzygy-hub.dtb \ zynq-topic-miami.dtb \ diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts index fa589956ad7..65b30bbc648 100644 --- a/arch/arm/dts/armada-8040-db.dts +++ b/arch/arm/dts/armada-8040-db.dts @@ -81,6 +81,13 @@ 1 3 0 0 0 0 0 0 0 3 >; }; +&ap_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&ap_emmc_pins>; + bus-width = <8>; + status = "okay"; +}; + &cpm_pinctl { /* MPP Bus: * [0-31] = 0xff: Keep default CP0_shared_pins @@ -182,6 +189,13 @@ status = "okay"; }; +&cpm_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; + bus-width = <4>; + status = "okay"; +}; + &cps_pinctl { /* MPP Bus: * [0-11] RGMII0 diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts index f912596c2cd..08f1d7df69a 100644 --- a/arch/arm/dts/armada-8040-mcbin.dts +++ b/arch/arm/dts/armada-8040-mcbin.dts @@ -154,6 +154,14 @@ status = "okay"; }; +/* uSD slot */ +&cpm_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; + bus-width = <4>; + status = "okay"; +}; + &cpm_comphy { /* * CP0 Serdes Configuration: diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index e0d301682b9..ebdee514c09 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -141,7 +141,7 @@ }; ap_pinctl: ap-pinctl@6F4000 { - compatible = "marvell,armada-ap806-pinctrl"; + compatible = "marvell,ap806-pinctrl"; bank-name ="apn-806"; reg = <0x6F4000 0x10>; pin-count = <20>; diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index 8c336f2c38f..551d00d7746 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -120,8 +120,8 @@ cpm_pinctl: cpm-pinctl@440000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a70x0-pinctrl", - "marvell,a80x0-cp0-pinctrl"; + "marvell,armada-7k-pinctrl", + "marvell,armada-8k-cpm-pinctrl"; bank-name ="cp0-110"; reg = <0x440000 0x20>; pin-count = <63>; diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index 0cdb3d3ae3d..2ea9004f1d4 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -120,7 +120,7 @@ cps_pinctl: cps-pinctl@440000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a80x0-cp1-pinctrl"; + "marvell,armada-8k-cps-pinctrl"; bank-name ="cp1-110"; reg = <0x440000 0x20>; pin-count = <63>; diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts new file mode 100644 index 00000000000..7362ad4e8f9 --- /dev/null +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Bitmain Antminer S9 board DTS + * + * Copyright (C) 2018 Michal Simek + * Copyright (C) 2018 VanguardiaSur + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Bitmain Antminer S9 Board"; + compatible = "bitmain,antminer-s9", "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + mmc0 = &sdhci0; + gpio0 = &gpio0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + bootcount@efffff0 { + reg = <0xefffff0 0x10>; + no-map; + }; + + fpga_space@f000000 { + reg = <0xf000000 0x1000000>; + no-map; + }; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + /* 0362/5e62 */ + ethernet_phy: ethernet-phy@1 { + reg = <1>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; + disable-wp; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&watchdog0 { + reset-on-timeout; + timeout-sec = <200>; +}; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 7bfae1c4266..7457d7b7e3f 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -50,6 +50,7 @@ blsp2_uart1: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; + clock = <&gcc 4>; }; sdhc2: sdhci@74a4900 { diff --git a/arch/arm/dts/kirkwood-d2net.dts b/arch/arm/dts/kirkwood-d2net.dts new file mode 100644 index 00000000000..bd3b266dd76 --- /dev/null +++ b/arch/arm/dts/kirkwood-d2net.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for d2 Network v2 + * + * Copyright (C) 2014 Simon Guinot <simon.guinot@sequanux.org> + * +*/ + +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-netxbig.dtsi" + +/ { + model = "LaCie d2 Network v2"; + compatible = "lacie,d2net_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "d2net_v2:blue:sata"; + slow-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + cmd-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red-fail { + label = "d2net_v2:red:fail"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-dreamplug.dts b/arch/arm/dts/kirkwood-dreamplug.dts new file mode 100644 index 00000000000..a647a65c20a --- /dev/null +++ b/arch/arm/dts/kirkwood-dreamplug.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Globalscale Technologies Dreamplug"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_led_bluetooth: pmx-led-bluetooth { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_led_wifi: pmx-led-wifi { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + pmx_led_wifi_ap: pmx-led-wifi-ap { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "ok"; + }; + + spi@10600 { + status = "okay"; + + m25p40@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l1606e", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + + partition@100000 { + reg = <0x100000 0x10000>; + label = "u-boot env"; + }; + + partition@180000 { + reg = <0x180000 0x10000>; + label = "dtb"; + }; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <1>; + }; + + mvsdio@90000 { + pinctrl-0 = <&pmx_sdio>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + broken-cd; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_bluetooth &pmx_led_wifi + &pmx_led_wifi_ap >; + pinctrl-names = "default"; + + bluetooth { + label = "dreamplug:blue:bluetooth"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + wifi { + label = "dreamplug:green:wifi"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + wifi-ap { + label = "dreamplug:green:wifi_ap"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ds109.dts b/arch/arm/dts/kirkwood-ds109.dts new file mode 100644 index 00000000000..29982e7acb7 --- /dev/null +++ b/arch/arm/dts/kirkwood-ds109.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Andrew Lunn <andrew@lunn.ch> + * Ben Peddell <klightspeed@killerwolves.net> + * + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include "kirkwood-synology.dtsi" + +/ { + model = "Synology DS109, DS110, DS110jv20"; + compatible = "synology,ds109", "synology,ds110jv20", + "synology,ds110", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio-fan-150-32-35 { + status = "okay"; + }; + + gpio-leds-hdd-21-1 { + status = "okay"; + }; +}; + +&rs5c372 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-is2.dts b/arch/arm/dts/kirkwood-is2.dts new file mode 100644 index 00000000000..1bc16a5cdba --- /dev/null +++ b/arch/arm/dts/kirkwood-is2.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Internet Space v2"; + compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-km_common.dtsi b/arch/arm/dts/kirkwood-km_common.dtsi new file mode 100644 index 00000000000..75dc83914f5 --- /dev/null +++ b/arch/arm/dts/kirkwood-km_common.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >; + pinctrl-names = "default"; + + pmx_i2c_gpio_sda: pmx-gpio-sda { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + pmx_i2c_gpio_scl: pmx-gpio-scl { + marvell,pins = "mpp9"; + marvell,function = "gpio"; + }; + }; + + serial@12000 { + status = "okay"; + }; + }; + + i2c { + compatible = "i2c-gpio"; + gpios = < &gpio0 8 GPIO_ACTIVE_HIGH /* sda */ + &gpio0 9 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + }; +}; + +&nand { + status = "okay"; + chip-delay = <25>; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-km_kirkwood.dts b/arch/arm/dts/kirkwood-km_kirkwood.dts new file mode 100644 index 00000000000..f035eff1c11 --- /dev/null +++ b/arch/arm/dts/kirkwood-km_kirkwood.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-98dx4122.dtsi" +#include "kirkwood-km_common.dtsi" + +/ { + model = "Keymile Kirkwood Reference Design"; + compatible = "keymile,km_kirkwood", "marvell,kirkwood-98DX4122", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-lschlv2.dts b/arch/arm/dts/kirkwood-lschlv2.dts new file mode 100644 index 00000000000..1d737d903f5 --- /dev/null +++ b/arch/arm/dts/kirkwood-lschlv2.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-lsxl.dtsi" + +/ { + model = "Buffalo Linkstation LS-CHLv2"; + compatible = "buffalo,lschlv2", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x4000000>; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-lsxhl.dts b/arch/arm/dts/kirkwood-lsxhl.dts new file mode 100644 index 00000000000..a56e0d79777 --- /dev/null +++ b/arch/arm/dts/kirkwood-lsxhl.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-lsxl.dtsi" + +/ { + model = "Buffalo Linkstation LS-XHL"; + compatible = "buffalo,lsxhl", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-lsxl.dtsi b/arch/arm/dts/kirkwood-lsxl.dtsi new file mode 100644 index 00000000000..92b11c75b8f --- /dev/null +++ b/arch/arm/dts/kirkwood-lsxl.dtsi @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_power_hdd: pmx-power-hdd { + marvell,pins = "mpp10"; + marvell,function = "gpo"; + }; + pmx_usb_vbus: pmx-usb-vbus { + marvell,pins = "mpp11"; + marvell,function = "gpio"; + }; + pmx_fan_high: pmx-fan-high { + marvell,pins = "mpp18"; + marvell,function = "gpo"; + }; + pmx_fan_low: pmx-fan-low { + marvell,pins = "mpp19"; + marvell,function = "gpo"; + }; + pmx_led_function_blue: pmx-led-function-blue { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + pmx_led_alarm: pmx-led-alarm { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + pmx_led_info: pmx-led-info { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + pmx_led_power: pmx-led-power { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + pmx_fan_lock: pmx-fan-lock { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + pmx_button_function: pmx-button-function { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + pmx_power_switch: pmx-power-switch { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_power_auto_switch: pmx-power-auto-switch { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_led_function_red: pmx-led-function_red { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + + }; + sata@80000 { + status = "okay"; + nr-ports = <1>; + }; + + spi@10600 { + status = "okay"; + + m25p40@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p40", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <25000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x60000>; + label = "uboot"; + read-only; + }; + + partition@60000 { + reg = <0x60000 0x10000>; + label = "dtb"; + read-only; + }; + + partition@70000 { + reg = <0x70000 0x10000>; + label = "uboot_env"; + }; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_button_function &pmx_power_switch + &pmx_power_auto_switch>; + pinctrl-names = "default"; + + option { + label = "Function Button"; + linux,code = <KEY_OPTION>; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + reserved { + label = "Power-on Switch"; + linux,code = <KEY_RESERVED>; + linux,input-type = <5>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + power { + label = "Power-auto Switch"; + linux,code = <KEY_ESC>; + linux,input-type = <5>; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm + &pmx_led_info &pmx_led_power + &pmx_led_function_blue>; + pinctrl-names = "default"; + + func_blue { + label = "lsxl:blue:func"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + alarm { + label = "lsxl:red:alarm"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + + info { + label = "lsxl:amber:info"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + power { + label = "lsxl:blue:power"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + func_red { + label = "lsxl:red:func"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; + pinctrl-names = "default"; + gpios = <&gpio0 19 GPIO_ACTIVE_LOW + &gpio0 18 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = <0 3 + 1500 2 + 3250 1 + 5000 0>; + alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + + restart_poweroff { + compatible = "restart-poweroff"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_hdd &pmx_usb_vbus>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 11 0>; + }; + hdd_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "HDD Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 10 0>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-net2big.dts b/arch/arm/dts/kirkwood-net2big.dts new file mode 100644 index 00000000000..3e3ac289e5b --- /dev/null +++ b/arch/arm/dts/kirkwood-net2big.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for LaCie 2Big Network v2 + * + * Copyright (C) 2014 + * + * Andrew Lunn <andrew@lunn.ch> + * + * Based on netxbig_v2-setup.c, + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * +*/ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include "kirkwood-netxbig.dtsi" + +/ { + model = "LaCie 2Big Network v2"; + compatible = "lacie,net2big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + fan { + compatible = "gpio-fan"; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; +}; + +®ulators { + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; + }; + + clocks { + g762_clk: g762-oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; + +&i2c0 { + g762@3e { + compatible = "gmt,g762"; + reg = <0x3e>; + clocks = <&g762_clk>; + }; +}; diff --git a/arch/arm/dts/kirkwood-netxbig.dtsi b/arch/arm/dts/kirkwood-netxbig.dtsi new file mode 100644 index 00000000000..135ac8021c8 --- /dev/null +++ b/arch/arm/dts/kirkwood-netxbig.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree common file for LaCie 2Big and 5Big Network v2 + * + * Copyright (C) 2014 + * + * Andrew Lunn <andrew@lunn.ch> + * + * Based on netxbig_v2-setup.c, + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * +*/ + +#include <dt-bindings/leds/leds-netxbig.h> +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + + spi@10600 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l4005a", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + /* + * esc and power represent a three position rocker + * switch. Thus the conventional KEY_POWER does not fit + */ + exc { + label = "Back power switch (on|auto)"; + linux,code = <KEY_ESC>; + linux,input-type = <5>; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + }; + power { + label = "Back power switch (auto|off)"; + linux,code = <KEY_1>; + linux,input-type = <5>; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + option { + label = "Function button"; + linux,code = <KEY_OPTION>; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; + + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + regulators: regulators { + status = "okay"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd0power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; + }; + }; + + netxbig_gpio_ext: netxbig-gpio-ext { + compatible = "lacie,netxbig-gpio-ext"; + + addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH + &gpio1 16 GPIO_ACTIVE_HIGH + &gpio1 17 GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH + &gpio1 13 GPIO_ACTIVE_HIGH + &gpio1 14 GPIO_ACTIVE_HIGH>; + enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + netxbig-leds { + compatible = "lacie,netxbig-leds"; + + gpio-ext = <&netxbig_gpio_ext>; + + timers = <NETXBIG_LED_TIMER1 500 500 + NETXBIG_LED_TIMER2 500 1000>; + + blue-power { + label = "netxbig:blue:power"; + mode-addr = <0>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 1 + NETXBIG_LED_TIMER1 3 + NETXBIG_LED_TIMER2 7>; + bright-addr = <1>; + max-brightness = <7>; + }; + red-power { + label = "netxbig:red:power"; + mode-addr = <0>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <1>; + max-brightness = <7>; + }; + blue-sata0 { + label = "netxbig:blue:sata0"; + mode-addr = <3>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 7 + NETXBIG_LED_SATA 1 + NETXBIG_LED_TIMER1 3>; + bright-addr = <2>; + max-brightness = <7>; + }; + red-sata0 { + label = "netxbig:red:sata0"; + mode-addr = <3>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <2>; + max-brightness = <7>; + }; + blue-sata1 { + label = "netxbig:blue:sata1"; + mode-addr = <4>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 7 + NETXBIG_LED_SATA 1 + NETXBIG_LED_TIMER1 3>; + bright-addr = <2>; + max-brightness = <7>; + }; + red-sata1 { + label = "netxbig:red:sata1"; + mode-addr = <4>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <2>; + max-brightness = <7>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <8>; + }; + + ethphy1: ethernet-phy@1 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +&pinctrl { + pinctrl-names = "default"; + + pmx_button_function: pmx-button-function { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + pmx_button_power_off: pmx-button-power-off { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + pmx_button_power_on: pmx-button-power-on { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; +}; + +&i2c0 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c04"; + pagesize = <16>; + reg = <0x50>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ns2-common.dtsi b/arch/arm/dts/kirkwood-ns2-common.dtsi new file mode 100644 index 00000000000..f997bb4df20 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2-common.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_ns2_sata0: pmx-ns2-sata0 { + marvell,pins = "mpp21"; + marvell,function = "sata0"; + }; + pmx_ns2_sata1: pmx-ns2-sata1 { + marvell,pins = "mpp20"; + marvell,function = "sata1"; + }; + }; + + serial@12000 { + status = "okay"; + }; + + spi@10600 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l4005a", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + }; + }; + + i2c@11000 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c04"; + pagesize = <16>; + reg = <0x50>; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + power { + label = "Power push button"; + linux,code = <KEY_POWER>; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red-fail { + label = "ns2:red:fail"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@X { + /* overwrite reg property in board file */ + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ns2.dts b/arch/arm/dts/kirkwood-ns2.dts new file mode 100644 index 00000000000..7b67083e1ec --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space v2"; + compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-ns2lite.dts b/arch/arm/dts/kirkwood-ns2lite.dts new file mode 100644 index 00000000000..b0cb5907ed6 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2lite.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space Lite v2"; + compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + blue-sata { + label = "ns2:blue:sata"; + gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + }; + }; +}; + +ðphy0 { reg = <0>; }; diff --git a/arch/arm/dts/kirkwood-ns2max.dts b/arch/arm/dts/kirkwood-ns2max.dts new file mode 100644 index 00000000000..c0a087e7740 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2max.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space Max v2"; + compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0 &pmx_ns2_sata1>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW + &gpio0 7 GPIO_ACTIVE_LOW + &gpio1 1 GPIO_ACTIVE_LOW + &gpio0 23 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = + < 0 0 + 1500 15 + 1700 14 + 1800 13 + 2100 12 + 3100 11 + 3300 10 + 4300 9 + 5500 8>; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-ns2mini.dts b/arch/arm/dts/kirkwood-ns2mini.dts new file mode 100644 index 00000000000..5b9fa14b642 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2mini.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + /* This machine is embedded in the first LaCie CloudBox product. */ + model = "LaCie Network Space Mini v2"; + compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW + &gpio0 7 GPIO_ACTIVE_LOW + &gpio1 1 GPIO_ACTIVE_LOW + &gpio0 23 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = + < 0 0 + 3000 15 + 3180 14 + 4140 13 + 4570 12 + 6760 11 + 7140 10 + 7980 9 + 9200 8>; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <0>; }; diff --git a/arch/arm/dts/kirkwood-synology.dtsi b/arch/arm/dts/kirkwood-synology.dtsi new file mode 100644 index 00000000000..b80d8ee3709 --- /dev/null +++ b/arch/arm/dts/kirkwood-synology.dtsi @@ -0,0 +1,855 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Nodes for Marvell 628x Synology devices + * + * Andrew Lunn <andrew@lunn.ch> + * Ben Peddell <klightspeed@killerwolves.net> + * + */ + +/ { + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_alarmled_12: pmx-alarmled-12 { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_15: pmx-fanctrl-15 { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_16: pmx-fanctrl-16 { + marvell,pins = "mpp16"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_17: pmx-fanctrl-17 { + marvell,pins = "mpp17"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_18: pmx-fanalarm-18 { + marvell,pins = "mpp18"; + marvell,function = "gpo"; + }; + + pmx_hddled_20: pmx-hddled-20 { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + + pmx_hddled_21: pmx-hddled-21 { + marvell,pins = "mpp21"; + marvell,function = "gpio"; + }; + + pmx_hddled_22: pmx-hddled-22 { + marvell,pins = "mpp22"; + marvell,function = "gpio"; + }; + + pmx_hddled_23: pmx-hddled-23 { + marvell,pins = "mpp23"; + marvell,function = "gpio"; + }; + + pmx_hddled_24: pmx-hddled-24 { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + pmx_hddled_25: pmx-hddled-25 { + marvell,pins = "mpp25"; + marvell,function = "gpio"; + }; + + pmx_hddled_26: pmx-hddled-26 { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; + + pmx_hddled_27: pmx-hddled-27 { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + + pmx_hddled_28: pmx-hddled-28 { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_hdd1_pwr_30: pmx-hdd-pwr-30 { + marvell,pins = "mpp30"; + marvell,function = "gpio"; + }; + + pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 { + marvell,pins = "mpp31"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_32: pmx-fanctrl-32 { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_33: pmx-fanctrl-33 { + marvell,pins = "mpp33"; + marvell,function = "gpo"; + }; + + pmx_fanctrl_34: pmx-fanctrl-34 { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_35: pmx-fanalarm-35 { + marvell,pins = "mpp35"; + marvell,function = "gpio"; + }; + + pmx_hddled_36: pmx-hddled-36 { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + + pmx_hddled_37: pmx-hddled-37 { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + + pmx_hddled_38: pmx-hddled-38 { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + + pmx_hddled_39: pmx-hddled-39 { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + + pmx_hddled_40: pmx-hddled-40 { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + + pmx_hddled_41: pmx-hddled-41 { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + pmx_hddled_42: pmx-hddled-42 { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + pmx_hddled_43: pmx-hddled-43 { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + + pmx_hddled_44: pmx-hddled-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_hddled_45: pmx-hddled-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_44: pmx-fanalarm-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_45: pmx-fanalarm-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + }; + + rtc@10300 { + status = "disabled"; + }; + + spi@10600 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p80", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x00000000 0x00080000>; + label = "RedBoot"; + }; + + partition@80000 { + reg = <0x00080000 0x00200000>; + label = "zImage"; + }; + + partition@280000 { + reg = <0x00280000 0x00140000>; + label = "rd.gz"; + }; + + partition@3c0000 { + reg = <0x003c0000 0x00010000>; + label = "vendor"; + }; + + partition@3d0000 { + reg = <0x003d0000 0x00020000>; + label = "RedBoot config"; + }; + + partition@3f0000 { + reg = <0x003f0000 0x00010000>; + label = "FIS directory"; + }; + }; + }; + + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + + rs5c372: rs5c372@32 { + status = "disabled"; + compatible = "ricoh,rs5c372"; + reg = <0x32>; + }; + + s35390a: s35390a@30 { + status = "disabled"; + compatible = "sii,s35390a"; + reg = <0x30>; + }; + }; + + serial@12000 { + status = "okay"; + }; + + serial@12100 { + status = "okay"; + }; + + poweroff@12100 { + compatible = "synology,power-off"; + reg = <0x12100 0x100>; + clocks = <&gate_clk 7>; + }; + + sata@80000 { + pinctrl-0 = <&pmx_sata0 &pmx_sata1>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio-fan-150-32-35 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 1 GPIO_ACTIVE_HIGH + &gpio1 2 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2200 1 + 2500 2 + 3000 4 + 3300 3 + 3700 5 + 3800 6 + 4200 7 >; + }; + + gpio-fan-150-15-18 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_18>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2200 1 + 2500 2 + 3000 4 + 3300 3 + 3700 5 + 3800 6 + 4200 7 >; + }; + + gpio-fan-100-32-35 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 1 GPIO_ACTIVE_HIGH + &gpio1 2 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-18 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_18>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-35-1 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-35-3 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH + &gpio1 12 GPIO_ACTIVE_HIGH + &gpio1 13 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-leds-alarm-12 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_alarmled_12>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:alarm"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-20 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22 + &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25 + &pmx_hddled_26 &pmx_hddled_27>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + + hdd3-green { + label = "synology:green:hdd3"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + + hdd3-amber { + label = "synology:amber:hdd3"; + gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + hdd4-green { + label = "synology:green:hdd4"; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + + hdd4-amber { + label = "synology:amber:hdd4"; + gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-21-1 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-21-2 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-36 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38 + &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41 + &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44 + &pmx_hddled_45>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + hdd3-green { + label = "synology:green:hdd3"; + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + hdd3-amber { + label = "synology:amber:hdd3"; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + + hdd4-green { + label = "synology:green:hdd4"; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + + hdd4-amber { + label = "synology:amber:hdd4"; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; + + hdd5-green { + label = "synology:green:hdd5"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + + hdd5-amber { + label = "synology:amber:hdd5"; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-38 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + }; + + regulators-hdd-29 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-1 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-2 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-4 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34 + &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "hdd3power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "hdd4power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-31 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd2_pwr_31>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-34 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44 + &pmx_hdd4_pwr_45>; + pinctrl-names = "default"; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "hdd3power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "hdd4power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + device_type = "ethernet-phy"; + reg = <8>; + }; + + ethphy1: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <9>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "disabled"; + + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts index 28bc4970461..8d4ea88a91f 100644 --- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts +++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts @@ -1,9 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source extras for U-Boot for the Ebisu board * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0 */ #include "r8a77990-ebisu.dts" diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi index 30a9f0b8ea7..564c258e924 100644 --- a/arch/arm/dts/r8a77990-u-boot.dtsi +++ b/arch/arm/dts/r8a77990-u-boot.dtsi @@ -1,9 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source extras for U-Boot on RCar R8A77990 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0 */ #include "r8a779x-u-boot.dtsi" diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 8581df9a277..afa7832f893 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -88,10 +88,11 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; - reg-names = "QuadSPI", "QuadSPI-memory"; + reg-names = "qspi", "qspi_mm"; interrupts = <92>; spi-max-frequency = <108000000>; clocks = <&rcc 0 STM32F7_AHB3_CLOCK(QSPI)>; + resets = <&rcc STM32F7_AHB3_RESET(QSPI)>; status = "disabled"; }; usart1: serial@40011000 { diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts new file mode 100644 index 00000000000..525921ee7ba --- /dev/null +++ b/arch/arm/dts/zynq-minized.dts @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Avnet MiniZed board + * + * (C) Copyright 2017 - 2018, Xilinx, Inc. + * + * Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> + */ + +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Avnet Zynq MiniZed Development Board"; + compatible = "avnet,minized", "xlnx,zynq-7000"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + spi0 = &qspi; + mmc0 = &sdhci0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x20000000>; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&qspi { + status = "okay"; + is-dual = <0>; + num-cs = <1>; + flash@0 { + compatible = "micron,m25p128"; + reg = <0x0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "boot"; + reg = <0x0 0xff0000>; + }; + + partition@270000 { + label = "kernel"; + reg = <0x270000 0xd80000>; + }; + + partition@ff0000 { + label = "bootenv"; + reg = <0xff0000 0x10000>; + }; + + partition@1000000 { + label = "spare"; + reg = <0x1000000 0x0>; + }; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; + usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */ +}; + +&sdhci1 { + status = "okay"; + non-removable; + bus-width = <4>; + max-frequency = <12000000>; + + #address-cells = <1>; + #size-cells = <0>; + mmccard: mmccard@0 { + compatible = "mmc-card"; + reg = <0>; + broken-hpi; + }; +}; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index b18d8d19c30..247a35f9219 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -248,6 +248,22 @@ clocks = <&clkc 59>, <&clkc 31>; }; +&ttc0 { + clocks = <&clkc 31>; +}; + +&ttc1 { + clocks = <&clkc 31>; +}; + +&ttc2 { + clocks = <&clkc 31>; +}; + +&ttc3 { + clocks = <&clkc 31>; +}; + &uart0 { clocks = <&clkc 56>, <&clkc 31>; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index bcd9c3958ff..c6aaa08a004 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -252,7 +252,6 @@ &sdhci0 { status = "okay"; no-1-8-v; - broken-cd; /* CD has to be enabled by default */ disable-wp; xlnx,mio_bank = <0>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index a0e13d8dc5b..6a4b701ab81 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -130,9 +130,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - tca6416_u97: gpio@21 { + tca6416_u97: gpio@20 { compatible = "ti,tca6416"; - reg = <0x21>; + reg = <0x20>; gpio-controller; #gpio-cells = <2>; /* diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 6e3cf5a97f3..fe742b894b8 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -74,9 +74,9 @@ status = "okay"; clock-frequency = <400000>; - tca6416_u97: gpio@21 { + tca6416_u97: gpio@20 { compatible = "ti,tca6416"; - reg = <0x21>; + reg = <0x20>; gpio-controller; #gpio-cells = <2>; /* @@ -145,10 +145,15 @@ }; }; - i2c@4 { + i2c@3 { #address-cells = <1>; #size-cells = <0>; - reg = <4>; + reg = <3>; + ina226@40 { /* u183 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; }; i2c@5 { @@ -163,7 +168,7 @@ reg = <7>; }; - /* 3, 6 not connected */ + /* 4, 6 not connected */ }; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 4002d788061..aa9055b7152 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -500,6 +500,7 @@ &sdhci1 { status = "okay"; no-1-8-v; + disable-wp; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index acc68251be9..8a505edab3c 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -30,6 +30,14 @@ #define PS_MODE2 BIT(2) #define PS_MODE3 BIT(3) +#define RESET_REASON_DEBUG_SYS BIT(6) +#define RESET_REASON_SOFT BIT(5) +#define RESET_REASON_SRST BIT(4) +#define RESET_REASON_PSONLY BIT(3) +#define RESET_REASON_PMU BIT(2) +#define RESET_REASON_INTERNAL BIT(1) +#define RESET_REASON_EXTERNAL BIT(0) + struct crlapb_regs { u32 reserved0[36]; u32 cpu_r5_ctrl; /* 0x90 */ @@ -37,7 +45,9 @@ struct crlapb_regs { u32 timestamp_ref_ctrl; /* 0x128 */ u32 reserved2[53]; u32 boot_mode; /* 0x200 */ - u32 reserved3[14]; + u32 reserved3_0[7]; + u32 reset_reason; /* 0x220 */ + u32 reserved3_1[6]; u32 rst_lpd_top; /* 0x23C */ u32 reserved4[4]; u32 boot_pin_ctrl; /* 0x250 */ @@ -120,8 +130,6 @@ struct apu_regs { /* Board version value */ #define ZYNQMP_CSU_BASEADDR 0xFFCA0000 #define ZYNQMP_CSU_VERSION_SILICON 0x0 -#define ZYNQMP_CSU_VERSION_EP108 0x1 -#define ZYNQMP_CSU_VERSION_VELOCE 0x2 #define ZYNQMP_CSU_VERSION_QEMU 0x3 #define ZYNQMP_CSU_VERSION_EMPTY_SHIFT 20 diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 6056bc6c0c5..773b930512b 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -13,8 +13,14 @@ #define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D #define KEY_PTR_LEN 32 +#define ZYNQMP_FPGA_BIT_AUTH_DDR 1 +#define ZYNQMP_FPGA_BIT_AUTH_OCM 2 +#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3 +#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4 #define ZYNQMP_FPGA_BIT_NS 5 +#define ZYNQMP_FPGA_AUTH_DDR 1 + enum { IDCODE, VERSION, diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 3b9a8116d8e..ade7b870646 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -7,7 +7,6 @@ ifdef CONFIG_ARM64 obj-$(CONFIG_ARMADA_3700) += armada3700/ obj-$(CONFIG_ARMADA_8K) += armada8k/ obj-y += arm64-common.o -obj-$(CONFIG_AHCI) += sata.o else # CONFIG_ARM64 diff --git a/arch/arm/mach-mvebu/sata.c b/arch/arm/mach-mvebu/sata.c deleted file mode 100644 index 3ae8dae4ddc..00000000000 --- a/arch/arm/mach-mvebu/sata.c +++ /dev/null @@ -1,51 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016 Stefan Roese <sr@denx.de> - */ - -#include <common.h> -#include <ahci.h> -#include <dm.h> - -/* - * Dummy implementation that can be overwritten by a board - * specific function - */ -__weak int board_ahci_enable(void) -{ - return 0; -} - -#ifdef CONFIG_ARMADA_8K -/* CP110 has different AHCI port addresses */ -void __iomem *ahci_port_base(void __iomem *base, u32 port) -{ - return base + 0x10000 + (port * 0x10000); -} -#endif - -static int mvebu_ahci_probe(struct udevice *dev) -{ - /* - * Board specific SATA / AHCI enable code, e.g. enable the - * AHCI power or deassert reset - */ - board_ahci_enable(); - - ahci_init(devfdt_get_addr_ptr(dev)); - - return 0; -} - -static const struct udevice_id mvebu_ahci_ids[] = { - { .compatible = "marvell,armada-3700-ahci" }, - { .compatible = "marvell,armada-8k-ahci" }, - { } -}; - -U_BOOT_DRIVER(ahci_mvebu_drv) = { - .name = "ahci_mvebu", - .id = UCLASS_AHCI, - .of_match = mvebu_ahci_ids, - .probe = mvebu_ahci_probe, -}; diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 0e9fd03fefb..d4a1e2e42c4 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -236,13 +236,3 @@ void arch_preboot_os(void) ahci_reset((void __iomem *)DWC_AHSATA_BASE); } #endif - -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE) -int fb_set_reboot_flag(void) -{ - printf("Setting reboot to fastboot flag ...\n"); - env_set("dofastboot", "1"); - env_save(); - return 0; -} -#endif diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index dc7b37f1643..edf5edcb680 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -85,7 +85,7 @@ static void omap_set_fastboot_board_rev(void) env_set("fastboot.board_rev", board_rev); } -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV +#ifdef CONFIG_FASTBOOT_FLASH_MMC static u32 omap_mmc_get_part_size(const char *part) { int res; @@ -128,7 +128,7 @@ static void omap_set_fastboot_userdata_size(void) static inline void omap_set_fastboot_userdata_size(void) { } -#endif /* CONFIG_FASTBOOT_FLASH_MMC_DEV */ +#endif /* CONFIG_FASTBOOT_FLASH_MMC */ void omap_set_fastboot_vars(void) { omap_set_fastboot_cpu(); diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index 48cd8ba81e0..7fd667a0b8e 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -111,8 +111,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) } #endif -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) -int fb_set_reboot_flag(void) +#if CONFIG_IS_ENABLED(FASTBOOT) +int fastboot_set_reboot_flag(void) { struct rk3128_grf *grf; diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 99a60c4e2ee..7366d45ab6c 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -139,8 +139,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) } #endif -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) -int fb_set_reboot_flag(void) +#if CONFIG_IS_ENABLED(FASTBOOT) +int fastboot_set_reboot_flag(void) { struct rk322x_grf *grf; diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index d55dc1aaa1d..bfd99db6e27 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -3,6 +3,12 @@ if ARCH_SNAPDRAGON config SYS_SOC default "snapdragon" +config SYS_MALLOC_F_LEN + default 0x2000 + +config SPL_SYS_MALLOC_F_LEN + default 0x2000 + choice prompt "Snapdragon board select" |