diff options
Diffstat (limited to 'arch/arm')
27 files changed, 663 insertions, 132 deletions
diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c index 5f3609aec3c..49bf49bbd36 100644 --- a/arch/arm/cpu/arm920t/ep93xx/timer.c +++ b/arch/arm/cpu/arm920t/ep93xx/timer.c @@ -66,14 +66,9 @@ unsigned long long get_ticks(void) return sys_ticks; } -unsigned long get_timer_masked(void) -{ - return get_ticks(); -} - unsigned long get_timer(unsigned long base) { - return get_timer_masked() - base; + return get_ticks() - base; } void __udelay(unsigned long usec) diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c index cd9b5465373..96fff3f683f 100644 --- a/arch/arm/cpu/arm920t/imx/timer.c +++ b/arch/arm/cpu/arm920t/imx/timer.c @@ -36,17 +36,17 @@ int timer_init (void) /* * timer without interrupts */ -ulong get_timer (ulong base) +static ulong get_timer_masked (void) { - return get_timer_masked() - base; + return TCN1; } -ulong get_timer_masked (void) +ulong get_timer (ulong base) { - return TCN1; + return get_timer_masked() - base; } -void udelay_masked (unsigned long usec) +void __udelay (unsigned long usec) { ulong endtime = get_timer_masked() + usec; signed long diff; @@ -57,11 +57,6 @@ void udelay_masked (unsigned long usec) } while (diff >= 0); } -void __udelay (unsigned long usec) -{ - udelay_masked(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c index f10f678720d..d2ecbd07e2f 100644 --- a/arch/arm/cpu/arm926ejs/armada100/timer.c +++ b/arch/arm/cpu/arm926ejs/armada100/timer.c @@ -61,7 +61,7 @@ ulong read_timer(void) return(readl(&armd1timers->cvwr)); } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = read_timer(); diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index 9399320f6d2..94b5d454e92 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -126,7 +126,7 @@ unsigned long long get_ticks(void) return timestamp; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c index 517cadb20f4..7492ba46dc7 100644 --- a/arch/arm/cpu/arm926ejs/mxs/timer.c +++ b/arch/arm/cpu/arm926ejs/mxs/timer.c @@ -110,14 +110,9 @@ unsigned long long get_ticks(void) return timestamp; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */ diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index e9ba87a4606..e7b5bda1bc9 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -21,6 +21,8 @@ static struct misc_regs *const misc_regs_p = DECLARE_GLOBAL_DATA_PTR; +static ulong get_timer_masked(void); + #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc @@ -82,7 +84,7 @@ void __udelay(unsigned long usec) ; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = READ_TIMER(); @@ -98,11 +100,6 @@ ulong get_timer_masked(void) return timestamp; } -void udelay_masked(unsigned long usec) -{ - return udelay(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 35a557b95c4..e79360ada88 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -90,14 +90,9 @@ unsigned long long get_ticks(void) return now; } -unsigned long get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - unsigned long get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* delay x useconds and preserve advance timstamp value */ diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index b37892c0a21..0048cd8067c 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; unsigned long get_current_tick(void); +static void reset_timer_masked(void); /* macro to read the 16 bit timer */ static inline struct s5p_timer *s5p_get_base_timer(void) @@ -106,7 +107,7 @@ void __udelay(unsigned long usec) ; } -void reset_timer_masked(void) +static void reset_timer_masked(void) { struct s5p_timer *const timer = s5p_get_base_timer(); diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c index 5784b0614b6..d1b763df8e3 100644 --- a/arch/arm/cpu/armv7/stv0991/timer.c +++ b/arch/arm/cpu/armv7/stv0991/timer.c @@ -21,6 +21,8 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc +static ulong get_timer_masked(void); + int timer_init(void) { /* Timer1 clock configuration */ @@ -73,7 +75,7 @@ void __udelay(unsigned long usec) ; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = READ_TIMER(); @@ -89,11 +91,6 @@ ulong get_timer_masked(void) return timestamp; } -void udelay_masked(unsigned long usec) -{ - return udelay(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c index 0f8ab0e235a..304c1ac5f9e 100644 --- a/arch/arm/cpu/armv7/sunxi/timer.c +++ b/arch/arm/cpu/armv7/sunxi/timer.c @@ -55,12 +55,7 @@ int timer_init(void) } /* timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* current tick value */ ulong now = TICKS_TO_HZ(read_timer()); @@ -77,6 +72,11 @@ ulong get_timer_masked(void) return gd->arch.tbl; } +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + /* delay x useconds */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c index 6e1308eae06..821a279b630 100644 --- a/arch/arm/cpu/armv7/vf610/timer.c +++ b/arch/arm/cpu/armv7/vf610/timer.c @@ -57,14 +57,9 @@ unsigned long long get_ticks(void) return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* delay x useconds AND preserve advance timstamp value */ diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c index 12514e4dbc9..0fac5c1707f 100644 --- a/arch/arm/cpu/sa1100/timer.c +++ b/arch/arm/cpu/sa1100/timer.c @@ -12,22 +12,17 @@ #include <common.h> #include <SA-1100.h> -ulong get_timer (ulong base) -{ - return get_timer_masked (); -} - -void __udelay (unsigned long usec) +static ulong get_timer_masked (void) { - udelay_masked (usec); + return OSCR; } -ulong get_timer_masked (void) +ulong get_timer (ulong base) { - return OSCR; + return get_timer_masked (); } -void udelay_masked (unsigned long usec) +void __udelay (unsigned long usec) { ulong tmo; ulong endtime; diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 44ebc50bfab..dfe9335a045 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -58,7 +58,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-nanopi-k2.dtb \ meson-gxl-s905x-p212.dtb \ meson-gxl-s905x-libretech-cc.dtb \ - meson-gxl-s905x-khadas-vim.dtb + meson-gxl-s905x-khadas-vim.dtb \ + meson-gxm-khadas-vim2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts new file mode 100644 index 00000000000..0868da476e4 --- /dev/null +++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts @@ -0,0 +1,412 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. + * Copyright (c) 2017 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/thermal/thermal.h> + +#include "meson-gxm.dtsi" + +/ { + compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; + model = "Khadas VIM2"; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + serial2 = &uart_AO_B; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1710000>; + + button-function { + label = "Function"; + linux,code = <KEY_FN>; + press-threshold-microvolt = <10000>; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + gpio_fan: gpio-fan { + compatible = "gpio-fan"; + gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH + &gpio GPIODV_15 GPIO_ACTIVE_HIGH>; + /* Dummy RPM values since fan is optional */ + gpio-fan,speed-map = <0 0 + 1 1 + 2 2 + 3 3>; + #cooling-cells = <2>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + button@0 { + label = "power"; + linux,code = <KEY_POWER>; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + power { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&scpi_sensors 0>; + + trips { + cpu_alert0: cpu-alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "active"; + }; + + cpu_alert1: cpu-alert1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; + }; + + map1 { + trip = <&cpu_alert1>; + cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>; + }; + + map2 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map3 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + hdmi_5v: regulator-hdmi-5v { + compatible = "regulator-fixed"; + + regulator-name = "HDMI_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cpu0 { + #cooling-cells = <2>; +}; + +&cpu4 { + #cooling-cells = <2>; +}; + +ðmac { + pinctrl-0 = <ð_pins>; + pinctrl-names = "default"; + + /* Select external PHY by default */ + phy-handle = <&external_phy>; + + amlogic,tx-delay-ns = <2>; + + /* External PHY reset is shared with internal PHY Led signals */ + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + /* External PHY is in RGMII */ + phy-mode = "rgmii"; + + status = "okay"; +}; + +&external_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; + pinctrl-names = "default"; +}; + +&i2c_B { + status = "okay"; + pinctrl-0 = <&i2c_b_pins>; + pinctrl-names = "default"; + + rtc: rtc@51 { + /* has to be enabled manually when a battery is connected: */ + status = "disabled"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; + linux,rc-map-name = "rc-geekbox"; +}; + +&pwm_AO_ab { + status = "okay"; + pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* + * EMMC_DS pin is shared between SPI NOR CS and eMMC Data Strobe + * Remove emmc_ds_pins from sd_emmc_c pinctrl-0 then spifc can be enabled + */ +&spifc { + status = "disabled"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + w25q32: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q16", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <3000000>; + }; +}; + +/* This one is connected to the Bluetooth module */ +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>; + pinctrl-names = "default"; +}; + +/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */ +&uart_AO_B { + status = "okay"; + pinctrl-0 = <&uart_ao_b_pins>; + pinctrl-names = "default"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi new file mode 100644 index 00000000000..247888d68a3 --- /dev/null +++ b/arch/arm/dts/meson-gxm.dtsi @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Endless Computers, Inc. + * Author: Carlo Caione <carlo@endlessm.com> + */ + +#include "meson-gxl.dtsi" + +/ { + compatible = "amlogic,meson-gxm"; + + cpus { + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + }; +}; + +&apb { + usb2_phy2: phy@78040 { + compatible = "amlogic,meson-gxl-usb2-phy"; + #phy-cells = <0>; + reg = <0x0 0x78040 0x0 0x20>; + clocks = <&clkc CLKID_USB>; + clock-names = "phy"; + resets = <&reset RESET_USB_OTG>; + reset-names = "phy"; + status = "okay"; + }; +}; + +&clkc_AO { + compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; +}; + +&saradc { + compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; +}; + +&scpi_dvfs { + clock-indices = <0 1>; + clock-output-names = "vbig", "vlittle"; +}; + +&vpu { + compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; +}; + +&hdmi_tx { + compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; +}; + +&dwc3 { + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; +}; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 898deaf4109..f8b77011671 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -361,6 +361,10 @@ status = "okay"; }; +&usbotg_hs { + usb33d-supply = <&usb33>; +}; + &usbphyc_port0 { phy-supply = <&vdd_usb>; vdda1v1-supply = <®11>; diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index f66727ca8e6..ab886650cd4 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -24,6 +24,15 @@ stdout-path = "serial0:115200n8"; }; + cpld { + compatible = "renesas,ulcb-cpld"; + status = "okay"; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + gpio-sstbz = <&gpio2 3 0>; + }; + audio_clkout: audio-clkout { /* * This is same as <&rcar_sound 0> diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index cc828c45045..2e8c8e53d79 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -24,26 +24,17 @@ extern ulong _datarelro_start_ofs; extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */ /* cpu/.../cpu.c */ -int cpu_init(void); int cleanup_before_linux(void); /* Set up ARMv7 MMU, caches and TLBs */ void cpu_init_cp15(void); /* cpu/.../arch/cpu.c */ -int arch_cpu_init(void); int arch_misc_init(void); -int arch_early_init_r(void); /* board/.../... */ int board_init(void); -/* cpu/.../interrupt.c */ -int arch_interrupt_init (void); -void reset_timer_masked (void); -ulong get_timer_masked (void); -void udelay_masked (unsigned long usec); - /* calls to c from vectors.S */ struct pt_regs; diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c index bbe90ae7bae..6db541a7b3b 100644 --- a/arch/arm/mach-at91/arm920t/timer.c +++ b/arch/arm/mach-at91/arm920t/timer.c @@ -53,16 +53,6 @@ int timer_init(void) /* * timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -void __udelay(unsigned long usec) -{ - udelay_masked(usec); -} - ulong get_timer_raw(void) { at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; @@ -82,12 +72,17 @@ ulong get_timer_raw(void) return gd->arch.tbl; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { return get_timer_raw()/TIMER_LOAD_VAL; } -void udelay_masked(unsigned long usec) +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void __udelay(unsigned long usec) { u32 tmo; u32 endtime; diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index d4b25c3d60e..39819788a1f 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -21,27 +21,6 @@ #define DAVINCI_GPIO_BANK8 0x01E260B0 #endif /* CONFIG_SOC_DA8XX */ -struct davinci_gpio { - unsigned int dir; - unsigned int out_data; - unsigned int set_data; - unsigned int clr_data; - unsigned int in_data; - unsigned int set_rising; - unsigned int clr_rising; - unsigned int set_falling; - unsigned int clr_falling; - unsigned int intstat; -}; - -struct davinci_gpio_bank { - int num_gpio; - unsigned int irq_num; - unsigned int irq_mask; - unsigned long *in_use; - struct davinci_gpio *base; -}; - #define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01) #define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23) #define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) @@ -61,18 +40,7 @@ struct davinci_gpio_bank { #define MAX_NUM_GPIOS 144 #endif #define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5)) -#define GPIO_BIT(gp) ((gp) & 0x1F) void gpio_info(void); -#ifdef CONFIG_DM_GPIO - -/* Information about a GPIO bank */ -struct davinci_gpio_platdata { - int bank_index; - ulong base; /* address of registers in physical memory */ - const char *port_name; -}; -#endif - #endif diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 676bb3caa93..34bdb9597e4 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -89,14 +89,9 @@ unsigned long long get_ticks(void) return now; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } void __udelay(unsigned long usec) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 8a3a99f23a7..68f0b8c011f 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -72,6 +72,29 @@ void board_init_f(ulong dummy) preloader_console_init(); } +u32 spl_boot_mode(const u32 boot_device) +{ +#if defined(CONFIG_SUPPORT_EMMC_BOOT) + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL); + + u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT; + + /* eMMC boot0 mode is only supported for primary boot */ + if (bootindex == K3_PRIMARY_BOOTMODE && + bootmode == BOOT_DEVICE_MMC1) + return MMCSD_MODE_EMMCBOOT; +#endif + + /* Everything else use filesystem if available */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) + return MMCSD_MODE_FS; +#else + return MMCSD_MODE_RAW; +#endif +} + static u32 __get_backup_bootmedia(u32 devstat) { u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >> @@ -85,7 +108,13 @@ static u32 __get_backup_bootmedia(u32 devstat) case BACKUP_BOOT_DEVICE_ETHERNET: return BOOT_DEVICE_ETHERNET; case BACKUP_BOOT_DEVICE_MMC2: + { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT; + if (port == 0x0) + return BOOT_DEVICE_MMC1; return BOOT_DEVICE_MMC2; + } case BACKUP_BOOT_DEVICE_SPI: return BOOT_DEVICE_SPI; case BACKUP_BOOT_DEVICE_HYPERFLASH: @@ -99,11 +128,24 @@ static u32 __get_backup_bootmedia(u32 devstat) static u32 __get_primary_bootmedia(u32 devstat) { - u32 bootmode = devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK; + u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT; if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI) bootmode = BOOT_DEVICE_SPI; + if (bootmode == BOOT_DEVICE_MMC2) { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT; + if (port == 0x0) + bootmode = BOOT_DEVICE_MMC1; + } else if (bootmode == BOOT_DEVICE_MMC1) { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT; + if (port == 0x1) + bootmode = BOOT_DEVICE_MMC2; + } + return bootmode; } diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h index e4b78f86171..b5244609afa 100644 --- a/arch/arm/mach-k3/include/mach/am6_hardware.h +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h @@ -16,6 +16,12 @@ #define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT 0 #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK GENMASK(6, 4) #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 4 +#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK GENMASK(12, 12) +#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT 12 +#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK GENMASK(14, 14) +#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT 14 +#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK GENMASK(17, 17) +#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT 12 #define WKUP_CTRL_MMR0_BASE 0x43000000 #define MCU_CTRL_MMR0_BASE 0x40f00000 diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index ee8b1cdcf67..cc943443b3a 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -22,6 +22,16 @@ config MESON_GXL The Amlogic Meson GXL (S905X and S905D) is an ARM SoC with a quad-core Cortex-A53 CPU and a Mali-450 GPU. +config MESON_GXM + bool "Support Meson GXM" + select ARM64 + select CLK + select DM + select DM_SERIAL + help + The Amlogic Meson GXM (S912) is an ARM SoC with an + octo-core Cortex-A53 CPU and a Mali-T860 GPU. + if MESON_GXBB config TARGET_ODROID_C2 @@ -64,6 +74,17 @@ config TARGET_KHADAS_VIM endif +if MESON_GXM + +config TARGET_KHADAS_VIM2 + bool "KHADAS-VIM2" + help + Khadas VIM2 is a single board computer based on Meson GXM + with 2/3 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, + eMMC, IR receiver and a 40-pin GPIO header. + +endif + config SYS_SOC default "meson" @@ -80,4 +101,6 @@ source "board/amlogic/libretech-cc/Kconfig" source "board/amlogic/khadas-vim/Kconfig" +source "board/amlogic/khadas-vim2/Kconfig" + endif diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c index 1ef7e5a6d1a..d6c62531521 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board.c @@ -111,13 +111,13 @@ static struct mm_region gx_mem_map[] = { { .virt = 0x0UL, .phys = 0x0UL, - .size = 0x80000000UL, + .size = 0xc0000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { - .virt = 0x80000000UL, - .phys = 0x80000000UL, - .size = 0x80000000UL, + .virt = 0xc0000000UL, + .phys = 0xc0000000UL, + .size = 0x30000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 847f33d47d4..87b674e6948 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR; static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; +static ulong get_timer_masked(void); /* * Nothing really to do with interrupts, just starts up a counter. @@ -67,7 +68,7 @@ void __udelay(unsigned long usec) } } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c index 92725d30f37..6aaf94ae087 100644 --- a/arch/arm/mach-orion5x/timer.c +++ b/arch/arm/mach-orion5x/timer.c @@ -78,7 +78,7 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = read_timer(); |