diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/zynq-dlc20-rev1.0.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-microzed.dts | 44 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sm-k26-revA.dts | 2 | ||||
| -rw-r--r-- | arch/arm/mach-zynqmp/mp.c | 28 |
4 files changed, 56 insertions, 20 deletions
diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts index cbf52c88b9a..cfe07102297 100644 --- a/arch/arm/dts/zynq-dlc20-rev1.0.dts +++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts @@ -26,7 +26,7 @@ }; chosen { - bootargs = "earlyprintk"; + bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts index 875ee080df2..5f280f4d8ec 100644 --- a/arch/arm/dts/zynq-microzed.dts +++ b/arch/arm/dts/zynq-microzed.dts @@ -8,7 +8,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq MicroZED Board"; + model = "Avnet MicroZed board"; compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000"; aliases { @@ -19,11 +19,11 @@ memory@0 { device_type = "memory"; - reg = <0 0x40000000>; + reg = <0x0 0x40000000>; }; chosen { - bootargs = "earlyprintk"; + bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; @@ -42,11 +42,6 @@ status = "okay"; }; -&uart1 { - bootph-all; - status = "okay"; -}; - &gem0 { status = "okay"; phy-mode = "rgmii-id"; @@ -62,8 +57,41 @@ status = "okay"; }; +&uart1 { + bootph-all; + status = "okay"; +}; + &usb0 { status = "okay"; dr_mode = "host"; usb-phy = <&usb_phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; +}; + +&pinctrl0 { + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO29", "MIO31", "MIO36"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", + "MIO35", "MIO37", "MIO38", "MIO39"; + bias-disable; + }; + }; }; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index ed750497419..f6ed047f3d9 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -224,7 +224,7 @@ }; partition@22A0000 { label = "User"; - reg = <0x22A0000 0x1db0000>; /* 29.5 MB */ + reg = <0x22A0000 0x1d60000>; /* 29.375 MB */ }; }; }; diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 2891878973e..7a12f4b2b6c 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -32,7 +32,8 @@ #define ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK 0x02 #define ZYNQMP_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000 -#define ZYNQMP_TCM_START_ADDRESS 0xFFE00000 +#define ZYNQMP_R5_0_TCM_START_ADDR 0xFFE00000 +#define ZYNQMP_R5_1_TCM_START_ADDR 0xFFE90000 #define ZYNQMP_TCM_BOTH_SIZE 0x40000 #define ZYNQMP_CORE_APU0 0 @@ -215,9 +216,14 @@ static void set_r5_start(u8 high) writel(tmp, &rpu_base->rpu1_cfg); } -static void write_tcm_boot_trampoline(u32 boot_addr) +static void write_tcm_boot_trampoline(u32 nr, u32 boot_addr) { if (boot_addr) { + u64 tcm_start_addr = ZYNQMP_R5_0_TCM_START_ADDR; + + if (nr == ZYNQMP_CORE_RPU1) + tcm_start_addr = ZYNQMP_R5_1_TCM_START_ADDR; + /* * Boot trampoline is simple ASM code below. * @@ -229,12 +235,12 @@ static void write_tcm_boot_trampoline(u32 boot_addr) * bx r1 */ debug("Write boot trampoline for %x\n", boot_addr); - writel(0xea000000, ZYNQMP_TCM_START_ADDRESS); - writel(boot_addr, ZYNQMP_TCM_START_ADDRESS + 0x4); - writel(0xe59f0004, ZYNQMP_TCM_START_ADDRESS + 0x8); - writel(0xe5901000, ZYNQMP_TCM_START_ADDRESS + 0xc); - writel(0xe12fff11, ZYNQMP_TCM_START_ADDRESS + 0x10); - writel(0x00000004, ZYNQMP_TCM_START_ADDRESS + 0x14); // address for + writel(0xea000000, tcm_start_addr); + writel(boot_addr, tcm_start_addr + 0x4); + writel(0xe59f0004, tcm_start_addr + 0x8); + writel(0xe5901000, tcm_start_addr + 0xc); + writel(0xe12fff11, tcm_start_addr + 0x10); + writel(0x00000004, tcm_start_addr + 0x14); } } @@ -247,8 +253,10 @@ void initialize_tcm(bool mode) release_r5_reset(ZYNQMP_CORE_RPU0, LOCK); } else { set_r5_tcm_mode(SPLIT); + set_r5_halt_mode(ZYNQMP_CORE_RPU0, HALT, SPLIT); set_r5_halt_mode(ZYNQMP_CORE_RPU1, HALT, SPLIT); enable_clock_r5(); + release_r5_reset(ZYNQMP_CORE_RPU0, SPLIT); release_r5_reset(ZYNQMP_CORE_RPU1, SPLIT); } } @@ -326,7 +334,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) enable_clock_r5(); release_r5_reset(nr, LOCK); dcache_disable(); - write_tcm_boot_trampoline(boot_addr_uniq); + write_tcm_boot_trampoline(nr, boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, LOCK); mark_r5_used(nr, LOCK); @@ -339,7 +347,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) enable_clock_r5(); release_r5_reset(nr, SPLIT); dcache_disable(); - write_tcm_boot_trampoline(boot_addr_uniq); + write_tcm_boot_trampoline(nr, boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, SPLIT); mark_r5_used(nr, SPLIT); |