diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/meson-a1.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-meson/clock-a1.h | 23 | ||||
| -rw-r--r-- | arch/arm/mach-meson/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-meson/sm.c | 116 |
4 files changed, 95 insertions, 56 deletions
diff --git a/arch/arm/dts/meson-a1.dtsi b/arch/arm/dts/meson-a1.dtsi index 6509329b85b..e3a42c5b248 100644 --- a/arch/arm/dts/meson-a1.dtsi +++ b/arch/arm/dts/meson-a1.dtsi @@ -124,6 +124,17 @@ clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; + + hwrng: rng@5118 { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x5118 0x0 0x4>; + }; + + sec_AO: ao-secure@5a20 { + compatible = "amlogic,meson-gx-ao-secure", "syscon"; + reg = <0x0 0x5a20 0x0 0x140>; + amlogic,has-chip-id; + }; }; gic: interrupt-controller@ff901000 { diff --git a/arch/arm/include/asm/arch-meson/clock-a1.h b/arch/arm/include/asm/arch-meson/clock-a1.h new file mode 100644 index 00000000000..f6795f5e0c3 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/clock-a1.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 - AmLogic, Inc. + * Copyright 2023 (C) SberDevices, Inc. + */ + +#ifndef _ARCH_MESON_CLOCK_A1_H_ +#define _ARCH_MESON_CLOCK_A1_H_ + +/* + * Clock controller register offsets + */ +#define A1_SYS_OSCIN_CTRL 0x0 +#define A1_SYS_CLK_CTRL0 0x10 +#define A1_SYS_CLK_EN0 0x1c +#define A1_SAR_ADC_CLK_CTR 0xc0 +#define A1_SPIFC_CLK_CTRL 0xd8 +#define A1_USB_BUSCLK_CTRL 0xdc +#define A1_SD_EMMC_CLK_CTRL 0xe0 + +#define A1_ANACTRL_FIXPLL_CTRL0 0x0 + +#endif /* _ARCH_MESON_CLOCK_A1_H_ */ diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index 669ca09a00a..d6c89058061 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -11,6 +11,7 @@ config MESON64_COMMON select PWRSEQ select MMC_PWRSEQ select BOARD_LATE_INIT + select MESON_SM imply CMD_DM config MESON_GX diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index d600c64d0be..914fd11c989 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -6,7 +6,11 @@ */ #include <common.h> +#include <dm.h> #include <log.h> +#include <regmap.h> +#include <sm.h> +#include <syscon.h> #include <asm/arch/sm.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -14,74 +18,63 @@ #include <linux/bitops.h> #include <linux/err.h> #include <linux/kernel.h> -#include <dm.h> #include <linux/bitfield.h> -#include <regmap.h> -#include <syscon.h> - -#define FN_GET_SHARE_MEM_INPUT_BASE 0x82000020 -#define FN_GET_SHARE_MEM_OUTPUT_BASE 0x82000021 -#define FN_EFUSE_READ 0x82000030 -#define FN_EFUSE_WRITE 0x82000031 -#define FN_CHIP_ID 0x82000044 -#define FN_PWRDM_SET 0x82000093 - -static void *shmem_input; -static void *shmem_output; +#include <meson/sm.h> -static void meson_init_shmem(void) +static inline struct udevice *meson_get_sm_device(void) { - struct pt_regs regs; + struct udevice *dev; + int err; - if (shmem_input && shmem_output) - return; - - regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE; - smc_call(®s); - shmem_input = (void *)regs.regs[0]; - - regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE; - smc_call(®s); - shmem_output = (void *)regs.regs[0]; + err = uclass_first_device_err(UCLASS_SM, &dev); + if (err) { + pr_err("Mesom SM device not found\n"); + return ERR_PTR(err); + } - debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output); + return dev; } ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size) { - struct pt_regs regs; + struct udevice *dev; + struct pt_regs regs = { 0 }; + int err; - meson_init_shmem(); + dev = meson_get_sm_device(); + if (IS_ERR(dev)) + return PTR_ERR(dev); - regs.regs[0] = FN_EFUSE_READ; regs.regs[1] = offset; regs.regs[2] = size; - smc_call(®s); - - if (regs.regs[0] == 0) - return -1; + err = sm_call_read(dev, buffer, size, + MESON_SMC_CMD_EFUSE_READ, ®s); + if (err < 0) + pr_err("Failed to read efuse memory (%d)\n", err); - memcpy(buffer, shmem_output, min(size, regs.regs[0])); - - return regs.regs[0]; + return err; } ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size) { - struct pt_regs regs; - - meson_init_shmem(); + struct udevice *dev; + struct pt_regs regs = { 0 }; + int err; - memcpy(shmem_input, buffer, size); + dev = meson_get_sm_device(); + if (IS_ERR(dev)) + return PTR_ERR(dev); - regs.regs[0] = FN_EFUSE_WRITE; regs.regs[1] = offset; regs.regs[2] = size; - smc_call(®s); + err = sm_call_write(dev, buffer, size, + MESON_SMC_CMD_EFUSE_WRITE, ®s); + if (err < 0) + pr_err("Failed to write efuse memory (%d)\n", err); - return regs.regs[0]; + return err; } #define SM_CHIP_ID_LENGTH 119 @@ -90,18 +83,21 @@ ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size) int meson_sm_get_serial(void *buffer, size_t size) { - struct pt_regs regs; + struct udevice *dev; + struct pt_regs regs = { 0 }; + u8 id_buffer[SM_CHIP_ID_LENGTH]; + int err; - meson_init_shmem(); + dev = meson_get_sm_device(); + if (IS_ERR(dev)) + return PTR_ERR(dev); - regs.regs[0] = FN_CHIP_ID; - regs.regs[1] = 0; - regs.regs[2] = 0; + err = sm_call_read(dev, id_buffer, SM_CHIP_ID_LENGTH, + MESON_SMC_CMD_CHIP_ID_GET, ®s); + if (err < 0) + pr_err("Failed to read serial number (%d)\n", err); - smc_call(®s); - - memcpy(buffer, shmem_output + SM_CHIP_ID_OFFSET, - min_t(size_t, size, SM_CHIP_ID_SIZE)); + memcpy(buffer, id_buffer + SM_CHIP_ID_OFFSET, size); return 0; } @@ -141,13 +137,21 @@ int meson_sm_get_reboot_reason(void) int meson_sm_pwrdm_set(size_t index, int cmd) { - struct pt_regs regs; + struct udevice *dev; + struct pt_regs regs = { 0 }; + int err; + + dev = meson_get_sm_device(); + if (IS_ERR(dev)) + return PTR_ERR(dev); - regs.regs[0] = FN_PWRDM_SET; regs.regs[1] = index; regs.regs[2] = cmd; - smc_call(®s); + err = sm_call(dev, MESON_SMC_CMD_PWRDM_SET, NULL, ®s); + if (err) + pr_err("Failed to %s power domain ind=%zu (%d)\n", cmd == PWRDM_ON ? + "enable" : "disable", index, err); - return regs.regs[0]; + return err; } |