diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/Kconfig | 14 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 12 |
4 files changed, 25 insertions, 5 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ded7c11a4c2..f42eccef80d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1005,6 +1005,7 @@ config TARGET_LS2080A_EMU select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select FSL_DDR_SYNC_REFRESH help Support for Freescale LS2080A_EMU platform The LS2080A Development System (EMULATOR) is a pre silicon @@ -1031,6 +1032,7 @@ config TARGET_LS1088AQDS select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088AQDS platform The LS1088A Development System (QDS) is a high-performance @@ -1047,6 +1049,8 @@ config TARGET_LS2080AQDS select SUPPORT_SPL imply SCSI imply SCSI_AHCI + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL help Support for Freescale LS2080AQDS platform The LS2080A Development System (QDS) is a high-performance @@ -1061,6 +1065,8 @@ config TARGET_LS2080ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI imply SCSI_AHCI help @@ -1205,6 +1211,7 @@ config TARGET_LS1088ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088ARDB platform. The LS1088A Reference design board (RDB) is a high-performance @@ -1223,6 +1230,7 @@ config TARGET_LS1021AQDS select LS1_DEEP_SLEEP select SUPPORT_SPL select SYS_FSL_DDR + select FSL_DDR_INTERACTIVE imply SCSI config TARGET_LS1021ATWR @@ -1262,6 +1270,7 @@ config TARGET_LS1043AQDS select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI imply SCSI_AHCI help @@ -1287,6 +1296,9 @@ config TARGET_LS1046AQDS select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI select SUPPORT_SPL + select FSL_DDR_BIST if !SPL + select FSL_DDR_INTERACTIVE if !SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046AQDS platform. @@ -1304,6 +1316,8 @@ config TARGET_LS1046ARDB select DM_SPI_FLASH if DM_SPI select POWER_MC34VR500 select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046ARDB platform. diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c index 0e8649427e9..3bd993bebfb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c @@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = { SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID), SET_QE_ICID(FSL_QE_STREAM_ID), #ifdef CONFIG_FSL_CAAM - SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2), + SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END), SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3), SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4), SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c index 2da9adab5b9..abd847b5be0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c @@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = { SET_ETR_ICID(FSL_ETR_STREAM_ID), SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID), #ifdef CONFIG_FSL_CAAM - SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2), + SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END), SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3), SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4), SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5), diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h index f375fe7115c..f971af8d269 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -9,6 +9,7 @@ #include <asm/types.h> #include <fsl_qbman.h> #include <fsl_sec.h> +#include <asm/armv8/sec_firmware.h> struct icid_id_table { const char *compat; @@ -93,13 +94,18 @@ void fdt_fixup_icid(void *blob); #define SET_SEC_QI_ICID(streamid) \ SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ - (((streamid) << 16) | (streamid)), \ - offsetof(ccsr_sec_t, qilcr_ls) + \ + 0, offsetof(ccsr_sec_t, qilcr_ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \ CONFIG_SYS_FSL_SEC_ADDR) #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \ - SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \ + SET_ICID_ENTRY( \ + (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \ + (FSL_SEC_JR##jr_num##_OFFSET == \ + SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \ + ? NULL \ + : "fsl,sec-v4.0-job-ring"), \ + streamid, \ (((streamid) << 16) | (streamid)), \ offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \ |