diff options
Diffstat (limited to 'arch/m68k/cpu/mcf523x')
| -rw-r--r-- | arch/m68k/cpu/mcf523x/cpu.c | 2 | ||||
| -rw-r--r-- | arch/m68k/cpu/mcf523x/cpu_init.c | 38 | ||||
| -rw-r--r-- | arch/m68k/cpu/mcf523x/speed.c | 2 | ||||
| -rw-r--r-- | arch/m68k/cpu/mcf523x/start.S | 6 |
4 files changed, 24 insertions, 24 deletions
diff --git a/arch/m68k/cpu/mcf523x/cpu.c b/arch/m68k/cpu/mcf523x/cpu.c index e44656db5f2..ba2c2289119 100644 --- a/arch/m68k/cpu/mcf523x/cpu.c +++ b/arch/m68k/cpu/mcf523x/cpu.c @@ -92,7 +92,7 @@ int watchdog_init(void) u32 wdog_module = 0; /* set timeout and enable watchdog */ - wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT); + wdog_module = ((CFG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT_MSECS); wdog_module |= (wdog_module / 8192); out_be16(&wdp->mr, wdog_module); diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c index 87effa71dc3..10be73822fa 100644 --- a/arch/m68k/cpu/mcf523x/cpu_init.c +++ b/arch/m68k/cpu/mcf523x/cpu_init.c @@ -47,36 +47,36 @@ void cpu_init_f(void) out_be16(&wdog->cr, 0); #endif - out_be32(&scm->rambar, CONFIG_SYS_INIT_RAM_ADDR | SCM_RAMBAR_BDE); + out_be32(&scm->rambar, CFG_SYS_INIT_RAM_ADDR | SCM_RAMBAR_BDE); /* Port configuration */ out_8(&gpio->par_cs, 0); -#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL)) - out_be_fbcs_reg(&fbcs->csar0, CONFIG_SYS_CS0_BASE); - out_be_fbcs_reg(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL); - out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK); +#if (defined(CFG_SYS_CS0_BASE) && defined(CFG_SYS_CS0_MASK) && defined(CFG_SYS_CS0_CTRL)) + out_be_fbcs_reg(&fbcs->csar0, CFG_SYS_CS0_BASE); + out_be_fbcs_reg(&fbcs->cscr0, CFG_SYS_CS0_CTRL); + out_be32(&fbcs->csmr0, CFG_SYS_CS0_MASK); #endif -#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL)) +#if (defined(CFG_SYS_CS1_BASE) && defined(CFG_SYS_CS1_MASK) && defined(CFG_SYS_CS1_CTRL)) setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS1); - out_be_fbcs_reg(&fbcs->csar1, CONFIG_SYS_CS1_BASE); - out_be_fbcs_reg(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL); - out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK); + out_be_fbcs_reg(&fbcs->csar1, CFG_SYS_CS1_BASE); + out_be_fbcs_reg(&fbcs->cscr1, CFG_SYS_CS1_CTRL); + out_be32(&fbcs->csmr1, CFG_SYS_CS1_MASK); #endif -#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL)) +#if (defined(CFG_SYS_CS2_BASE) && defined(CFG_SYS_CS2_MASK) && defined(CFG_SYS_CS2_CTRL)) setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS2); - out_be_fbcs_reg(&fbcs->csar2, CONFIG_SYS_CS2_BASE); - out_be_fbcs_reg(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL); - out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK); + out_be_fbcs_reg(&fbcs->csar2, CFG_SYS_CS2_BASE); + out_be_fbcs_reg(&fbcs->cscr2, CFG_SYS_CS2_CTRL); + out_be32(&fbcs->csmr2, CFG_SYS_CS2_MASK); #endif -#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL)) +#if (defined(CFG_SYS_CS3_BASE) && defined(CFG_SYS_CS3_MASK) && defined(CFG_SYS_CS3_CTRL)) setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS3); - out_be_fbcs_reg(&fbcs->csar3, CONFIG_SYS_CS3_BASE); - out_be_fbcs_reg(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL); - out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK); + out_be_fbcs_reg(&fbcs->csar3, CFG_SYS_CS3_BASE); + out_be_fbcs_reg(&fbcs->cscr3, CFG_SYS_CS3_CTRL); + out_be32(&fbcs->csmr3, CFG_SYS_CS3_MASK); #endif #if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL)) @@ -108,8 +108,8 @@ void cpu_init_f(void) #endif #ifdef CONFIG_SYS_I2C_FSL - CONFIG_SYS_I2C_PINMUX_REG &= CONFIG_SYS_I2C_PINMUX_CLR; - CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET; + CFG_SYS_I2C_PINMUX_REG &= CFG_SYS_I2C_PINMUX_CLR; + CFG_SYS_I2C_PINMUX_REG |= CFG_SYS_I2C_PINMUX_SET; #endif icache_enable(); diff --git a/arch/m68k/cpu/mcf523x/speed.c b/arch/m68k/cpu/mcf523x/speed.c index f41f977d7f5..6b08a12af0b 100644 --- a/arch/m68k/cpu/mcf523x/speed.c +++ b/arch/m68k/cpu/mcf523x/speed.c @@ -29,7 +29,7 @@ int get_clocks(void) while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK)) ; - gd->bus_clk = CONFIG_SYS_CLK; + gd->bus_clk = CFG_SYS_CLK; gd->cpu_clk = (gd->bus_clk * 2); #ifdef CONFIG_SYS_I2C_FSL diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index 4c9c96d7831..d2a21c3279b 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -91,10 +91,10 @@ _start: move.w #0x2700,%sr /* Mask off Interrupt */ /* Set vector base register at the beginning of the Flash */ - move.l #CONFIG_SYS_FLASH_BASE, %d0 + move.l #CFG_SYS_FLASH_BASE, %d0 movec %d0, %VBR - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 + move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0 movec %d0, %RAMBAR1 /* invalidate and disable cache */ @@ -116,7 +116,7 @@ _start: move.l #__got_start, %a5 /* setup stack initially on top of internal static ram */ - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp + move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp /* * if configured, malloc_f arena will be reserved first, |