diff options
Diffstat (limited to 'arch/microblaze/cpu')
| -rw-r--r-- | arch/microblaze/cpu/cache.c | 5 | ||||
| -rw-r--r-- | arch/microblaze/cpu/start.S | 6 |
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index d258a693822..ce066b96e99 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -61,12 +61,7 @@ void dcache_enable (void) { void dcache_disable(void) { #ifdef XILINX_USE_DCACHE -#ifdef XILINX_DCACHE_BYTE_SIZE flush_cache(0, XILINX_DCACHE_BYTE_SIZE); -#else -#warning please rebuild BSPs and update configuration - flush_cache(0, 32768); -#endif #endif MSRCLR(0x80); } diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 8564c4e30ab..3da711d4d50 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -132,6 +132,12 @@ _start: rsubi r8, r10, 0x26 sh r6, r0, r8 + /* Flush cache before enable cache */ + addik r5, r0, 0 + addik r6, r0, XILINX_DCACHE_BYTE_SIZE +flush: bralid r15, flush_cache + nop + /* enable instruction and data cache */ mfs r12, rmsr ori r12, r12, 0xa0 |