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-rw-r--r--arch/mips/Kconfig29
-rw-r--r--arch/mips/dts/Makefile1
-rw-r--r--arch/mips/dts/boston-u-boot.dtsi10
-rw-r--r--arch/mips/dts/img,boston.dts222
-rw-r--r--arch/mips/include/asm/acpi_table.h10
5 files changed, 49 insertions, 223 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7ea439e857c..a0317011de7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -146,7 +146,35 @@ config TARGET_BOSTON
select SUPPORTS_CPU_MIPS64_R6
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
+ imply OF_UPSTREAM
+ imply BOOTSTD_FULL
+ imply CLK
+ imply CLK_BOSTON
imply CMD_DM
+ imply AHCI
+ imply AHCI_PCI
+ imply CFI_FLASH
+ imply MTD_NOR_FLASH
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply PCH_GBE
+ imply PCI
+ imply PCI_XILINX
+ imply PCI_INIT_R
+ imply SCSI
+ imply SCSI_AHCI
+ imply SYS_NS16550
+ imply SYSRESET
+ imply SYSRESET_CMD_POWEROFF
+ imply SYSRESET_SYSCON
+ imply USB
+ imply USB_EHCI_HCD
+ imply USB_EHCI_PCI
+ imply USB_XHCI_HCD
+ imply USB_XHCI_PCI
+ imply CMD_USB
config TARGET_XILFPGA
bool "Support Imagination Xilfpga"
@@ -322,6 +350,7 @@ config MIPS_CACHE_DISABLE
config MIPS_RELOCATION_TABLE_SIZE
hex "Relocation table size"
range 0x100 0x10000
+ default "0xc000" if TARGET_MALTA
default "0x8000"
---help---
A table of relocation data will be appended to the U-Boot binary
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 752e771514f..7c4ee8b668b 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -3,7 +3,6 @@
dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
-dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
diff --git a/arch/mips/dts/boston-u-boot.dtsi b/arch/mips/dts/boston-u-boot.dtsi
new file mode 100644
index 00000000000..1b0c0a28961
--- /dev/null
+++ b/arch/mips/dts/boston-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&plat_regs {
+ compatible = "img,boston-platform-regs", "syscon", "simple-mfd";
+ bootph-all;
+};
+
+&clk_boston {
+ bootph-all;
+};
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
deleted file mode 100644
index c1a73963037..00000000000
--- a/arch/mips/dts/img,boston.dts
+++ /dev/null
@@ -1,222 +0,0 @@
-/dts-v1/;
-
-#include <dt-bindings/clock/boston-clock.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/mips-gic.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "img,boston";
-
- chosen {
- stdout-path = &uart0;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "img,mips";
- reg = <0>;
- clocks = <&clk_boston BOSTON_CLK_CPU>;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- gic: interrupt-controller {
- compatible = "mti,gic";
-
- interrupt-controller;
- #interrupt-cells = <3>;
-
- timer {
- compatible = "mti,gic-timer";
- interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
- clocks = <&clk_boston BOSTON_CLK_CPU>;
- };
- };
-
- pci0: pci@10000000 {
- status = "disabled";
- compatible = "xlnx,axi-pcie-host-1.00.a";
- device_type = "pci";
- reg = <0x10000000 0x2000000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
-
- ranges = <0x02000000 0 0x40000000
- 0x40000000 0 0x40000000>;
-
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pci0_intc 0>,
- <0 0 0 2 &pci0_intc 1>,
- <0 0 0 3 &pci0_intc 2>,
- <0 0 0 4 &pci0_intc 3>;
-
- pci0_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
-
- pci1: pci@12000000 {
- status = "disabled";
- compatible = "xlnx,axi-pcie-host-1.00.a";
- device_type = "pci";
- reg = <0x12000000 0x2000000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
-
- ranges = <0x02000000 0 0x20000000
- 0x20000000 0 0x20000000>;
-
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pci1_intc 0>,
- <0 0 0 2 &pci1_intc 1>,
- <0 0 0 3 &pci1_intc 2>,
- <0 0 0 4 &pci1_intc 3>;
-
- pci1_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
-
- pci2: pci@14000000 {
- compatible = "xlnx,axi-pcie-host-1.00.a";
- device_type = "pci";
- reg = <0x14000000 0x2000000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
-
- ranges = <0x02000000 0 0x16000000
- 0x16000000 0 0x100000>;
-
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pci2_intc 0>,
- <0 0 0 2 &pci2_intc 1>,
- <0 0 0 3 &pci2_intc 2>,
- <0 0 0 4 &pci2_intc 3>;
-
- pci2_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
-
- pci2_root@0,0,0 {
- compatible = "pci10ee,7021";
- reg = <0x00000000 0 0 0 0>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- eg20t_bridge@1,0,0 {
- compatible = "pci8086,8800";
- reg = <0x00010000 0 0 0 0>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- eg20t_mac@2,0,1 {
- compatible = "pci8086,8802";
- reg = <0x00020100 0 0 0 0>;
- phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
- };
-
- eg20t_gpio: eg20t_gpio@2,0,2 {
- compatible = "pci8086,8803";
- reg = <0x00020200 0 0 0 0>;
-
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- eg20t_i2c@2,12,2 {
- compatible = "pci8086,8817";
- reg = <0x00026200 0 0 0 0>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtc@0x68 {
- compatible = "st,m41t81s";
- reg = <0x68>;
- };
- };
- };
- };
- };
-
- plat_regs: system-controller@17ffd000 {
- compatible = "img,boston-platform-regs", "syscon";
- reg = <0x17ffd000 0x1000>;
- bootph-all;
- };
-
- clk_boston: clock {
- compatible = "img,boston-clock";
- #clock-cells = <1>;
- regmap = <&plat_regs>;
- bootph-all;
- };
-
- reboot: syscon-reboot {
- compatible = "syscon-reboot";
- regmap = <&plat_regs>;
- offset = <0x10>;
- mask = <0x10>;
- };
-
- uart0: uart@17ffe000 {
- compatible = "ns16550a";
- reg = <0x17ffe000 0x1000>;
- reg-shift = <2>;
- reg-io-width = <4>;
-
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&clk_boston BOSTON_CLK_SYS>;
-
- bootph-all;
- };
-
- lcd: lcd@17fff000 {
- compatible = "img,boston-lcd";
- reg = <0x17fff000 0x8>;
- };
-
- flash@18000000 {
- compatible = "cfi-flash";
- reg = <0x18000000 0x8000000>;
- bank-width = <2>;
- };
-};
diff --git a/arch/mips/include/asm/acpi_table.h b/arch/mips/include/asm/acpi_table.h
new file mode 100644
index 00000000000..b4139d0ba32
--- /dev/null
+++ b/arch/mips/include/asm/acpi_table.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __ASM_ACPI_TABLE_H__
+#define __ASM_ACPI_TABLE_H__
+
+/*
+ * This file is needed by some drivers.
+ */
+
+#endif /* __ASM_ACPI_TABLE_H__ */
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-04 05:34:46 +0000