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-rw-r--r--arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c17
-rw-r--r--arch/powerpc/include/asm/ppc4xx-sdram.h5
2 files changed, 10 insertions, 12 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index aed0ed7569a..0f69ef97eeb 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -83,11 +83,6 @@ struct ddrautocal {
u32 flags;
};
-struct sdram_timing {
- u32 wrdtr;
- u32 clktr;
-};
-
struct sdram_timing_clks {
u32 wrdtr;
u32 clktr;
@@ -145,11 +140,12 @@ void
spd_ddr_init_hang(void) __attribute__((weak, alias("__spd_ddr_init_hang")));
#endif /* defined(CONFIG_SPD_EEPROM) */
-ulong __ddr_scan_option(ulong default_val)
+struct sdram_timing *__ddr_scan_option(struct sdram_timing *default_val)
{
return default_val;
}
-ulong ddr_scan_option(ulong) __attribute__((weak, alias("__ddr_scan_option")));
+struct sdram_timing *ddr_scan_option(struct sdram_timing *)
+ __attribute__((weak, alias("__ddr_scan_option")));
u32 __ddr_rdss_opt(u32 default_val)
{
@@ -931,7 +927,7 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal)
* known working {SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR]} value
* pairs via a board defined ddr_scan_option() function.
*/
-struct sdram_timing full_scan_options[] = {
+static struct sdram_timing full_scan_options[] = {
{0, 0}, {0, 1}, {0, 2}, {0, 3},
{1, 0}, {1, 1}, {1, 2}, {1, 3},
{2, 0}, {2, 1}, {2, 2}, {2, 3},
@@ -970,10 +966,7 @@ u32 DQS_autocalibration(void)
memset(&tcal, 0, sizeof(tcal));
- ddr_scan_option((ulong)full_scan_options);
-
- scan_list =
- (struct sdram_timing *)ddr_scan_option((ulong)full_scan_options);
+ scan_list = ddr_scan_option(full_scan_options);
mfsdram(SDRAM_MCOPT1, val);
if ((val & SDRAM_MCOPT1_MCHK_CHK_REP) == SDRAM_MCOPT1_MCHK_CHK_REP)
diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h
index 92be514b404..66cf50902d0 100644
--- a/arch/powerpc/include/asm/ppc4xx-sdram.h
+++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
@@ -1394,6 +1394,11 @@
#endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */
#ifndef __ASSEMBLY__
+struct sdram_timing {
+ u32 wrdtr;
+ u32 clktr;
+};
+
/*
* Prototypes
*/