3 files changed, 2 insertions, 94 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 10ac5b06d3c..12c14f20198 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -13,7 +13,6 @@ obj-y	+= cache.o
 ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y)
 obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
 obj-$(CONFIG_ANDES_PLIC) += andes_plic.o
-obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o
 else
 obj-$(CONFIG_SBI) += sbi.o
 obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
diff --git a/arch/riscv/lib/andes_plmt.c b/arch/riscv/lib/andes_plmt.c
deleted file mode 100644
index a28c14c1ebf..00000000000
--- a/arch/riscv/lib/andes_plmt.c
+++ /dev/null
@@ -1,52 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2019, Rick Chen <rick@andestech.com>
- * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
- *
- * U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT).
- * The PLMT block holds memory-mapped mtime register
- * associated with timer tick.
- */
-
-#include <common.h>
-#include <dm.h>
-#include <timer.h>
-#include <asm/io.h>
-#include <linux/err.h>
-
-/* mtime register */
-#define MTIME_REG(base)			((ulong)(base))
-
-static int andes_plmt_get_count(struct udevice *dev, u64 *count)
-{
-	*count = readq((void __iomem *)MTIME_REG(dev->priv));
-
-	return 0;
-}
-
-static const struct timer_ops andes_plmt_ops = {
-	.get_count = andes_plmt_get_count,
-};
-
-static int andes_plmt_probe(struct udevice *dev)
-{
-	dev->priv = dev_read_addr_ptr(dev);
-	if (!dev->priv)
-		return -EINVAL;
-
-	return timer_timebase_fallback(dev);
-}
-
-static const struct udevice_id andes_plmt_ids[] = {
-	{ .compatible = "riscv,plmt0" },
-	{ }
-};
-
-U_BOOT_DRIVER(andes_plmt) = {
-	.name		= "andes_plmt",
-	.id		= UCLASS_TIMER,
-	.of_match	= andes_plmt_ids,
-	.ops		= &andes_plmt_ops,
-	.probe		= andes_plmt_probe,
-	.flags		= DM_FLAG_PRE_RELOC,
-};
diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/sifive_clint.c
index c9704c596fa..c8079dc510c 100644
--- a/arch/riscv/lib/sifive_clint.c
+++ b/arch/riscv/lib/sifive_clint.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
+ * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
  * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
  *
  * U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT).
@@ -8,19 +9,13 @@
  */
 
 #include <common.h>
-#include <clk.h>
 #include <dm.h>
-#include <timer.h>
 #include <asm/io.h>
-#include <asm/syscon.h>
+#include <asm/smp.h>
 #include <linux/err.h>
 
 /* MSIP registers */
 #define MSIP_REG(base, hart)		((ulong)(base) + (hart) * 4)
-/* mtime compare register */
-#define MTIMECMP_REG(base, hart)	((ulong)(base) + 0x4000 + (hart) * 8)
-/* mtime register */
-#define MTIME_REG(base)			((ulong)(base) + 0xbff8)
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -61,37 +56,3 @@ int riscv_get_ipi(int hart, int *pending)
 
 	return 0;
 }
-
-static int sifive_clint_get_count(struct udevice *dev, u64 *count)
-{
-	*count = readq((void __iomem *)MTIME_REG(dev->priv));
-
-	return 0;
-}
-
-static const struct timer_ops sifive_clint_ops = {
-	.get_count = sifive_clint_get_count,
-};
-
-static int sifive_clint_probe(struct udevice *dev)
-{
-	dev->priv = dev_read_addr_ptr(dev);
-	if (!dev->priv)
-		return -EINVAL;
-
-	return timer_timebase_fallback(dev);
-}
-
-static const struct udevice_id sifive_clint_ids[] = {
-	{ .compatible = "riscv,clint0" },
-	{ }
-};
-
-U_BOOT_DRIVER(sifive_clint) = {
-	.name		= "sifive_clint",
-	.id		= UCLASS_TIMER,
-	.of_match	= sifive_clint_ids,
-	.probe		= sifive_clint_probe,
-	.ops		= &sifive_clint_ops,
-	.flags		= DM_FLAG_PRE_RELOC,
-};