diff options
Diffstat (limited to 'arch/x86/cpu/intel_common')
-rw-r--r-- | arch/x86/cpu/intel_common/Makefile | 20 | ||||
-rw-r--r-- | arch/x86/cpu/intel_common/mrc.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/intel_common/p2sb.c | 6 |
3 files changed, 14 insertions, 14 deletions
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile index 1dc17b45879..a28e6c77c9c 100644 --- a/arch/x86/cpu/intel_common/Makefile +++ b/arch/x86/cpu/intel_common/Makefile @@ -5,19 +5,19 @@ obj-$(CONFIG_INTEL_ACPIGEN) += acpi.o ifdef CONFIG_HAVE_MRC -obj-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += car.o -obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += me_status.o -obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += report_platform.o -obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += mrc.o +obj-$(CONFIG_$(PHASE_)X86_16BIT_INIT) += car.o +obj-$(CONFIG_$(PHASE_)X86_32BIT_INIT) += me_status.o +obj-$(CONFIG_$(PHASE_)X86_32BIT_INIT) += report_platform.o +obj-$(CONFIG_$(PHASE_)X86_32BIT_INIT) += mrc.o endif -ifndef CONFIG_SPL_BUILD +ifndef CONFIG_XPL_BUILD obj-$(CONFIG_INTEL_GMA_ACPI) += intel_opregion.o endif ifdef CONFIG_INTEL_CAR_CQOS obj-$(CONFIG_TPL_BUILD) += car2.o -ifndef CONFIG_SPL_BUILD +ifndef CONFIG_XPL_BUILD obj-y += car2_uninit.o endif endif @@ -26,10 +26,10 @@ obj-y += cpu.o obj-y += fast_spi.o obj-y += lpc.o obj-y += lpss.o -obj-$(CONFIG_$(SPL_)INTEL_GENERIC_WIFI) += generic_wifi.o +obj-$(CONFIG_$(XPL_)INTEL_GENERIC_WIFI) += generic_wifi.o ifndef CONFIG_EFI_APP -obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += microcode.o -ifndef CONFIG_$(SPL_)X86_64 +obj-$(CONFIG_$(PHASE_)X86_32BIT_INIT) += microcode.o +ifndef CONFIG_$(XPL_)X86_64 obj-y += microcode.o endif endif @@ -38,7 +38,7 @@ obj-$(CONFIG_HAVE_ITSS) += itss.o obj-$(CONFIG_HAVE_P2SB) += p2sb.o ifdef CONFIG_SPL -ifndef CONFIG_SPL_BUILD +ifndef CONFIG_XPL_BUILD ifndef CONFIG_SYS_COREBOOT obj-y += cpu_from_spl.o endif diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index c834c05d130..baa1f0e32d6 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -259,7 +259,7 @@ int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage) return ret; delay = dev_read_u32_default(dev, "fspm,training-delay", 0); - if (spl_phase() == PHASE_SPL) { + if (xpl_phase() == PHASE_SPL) { if (delay) printf("SDRAM training (%d seconds)...", delay); else diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index 7aad8f8ca56..406c41013fc 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -96,7 +96,7 @@ int p2sb_of_to_plat(struct udevice *dev) return log_msg_ret("Missing/short early-regs", ret); plat->mmio_base = base[0]; /* TPL sets up the initial BAR */ - if (spl_phase() == PHASE_TPL) { + if (xpl_phase() == PHASE_TPL) { plat->bdf = pci_get_devfn(dev); if (plat->bdf < 0) return log_msg_ret("Cannot get p2sb PCI address", @@ -114,9 +114,9 @@ int p2sb_of_to_plat(struct udevice *dev) static int p2sb_probe(struct udevice *dev) { - if (spl_phase() == PHASE_TPL) + if (xpl_phase() == PHASE_TPL) return p2sb_early_init(dev); - else if (spl_phase() == PHASE_SPL) + else if (xpl_phase() == PHASE_SPL) return p2sb_spl_init(dev); return 0; |