diff options
Diffstat (limited to 'arch/x86/lib')
| -rw-r--r-- | arch/x86/lib/Makefile | 4 | ||||
| -rw-r--r-- | arch/x86/lib/coreboot/cb_sysinfo.c | 13 | ||||
| -rw-r--r-- | arch/x86/lib/fsp2/fsp_init.c | 2 | ||||
| -rw-r--r-- | arch/x86/lib/mrccache.c | 2 | ||||
| -rw-r--r-- | arch/x86/lib/spl.c | 19 |
5 files changed, 25 insertions, 15 deletions
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index a6f22441474..b0612ae6dd5 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -10,7 +10,9 @@ obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o endif -obj-y += string.o +endif +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_X86_32BIT_INIT) += string.o endif ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_BOOTM) += bootm.o diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c index 748fa4ee53b..42cc3a128d9 100644 --- a/arch/x86/lib/coreboot/cb_sysinfo.c +++ b/arch/x86/lib/coreboot/cb_sysinfo.c @@ -264,6 +264,13 @@ static void cb_parse_mrc_cache(void *ptr, struct sysinfo_t *info) info->mrc_cache = map_sysmem(cbmem->cbmem_tab, 0); } +static void cb_parse_acpi_rsdp(void *ptr, struct sysinfo_t *info) +{ + struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr; + + info->rsdp = map_sysmem(cbmem->cbmem_tab, 0); +} + __weak void cb_parse_unhandled(u32 tag, unsigned char *ptr) { } @@ -428,7 +435,12 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info) case CB_TAG_MRC_CACHE: cb_parse_mrc_cache(rec, info); break; + case CB_TAG_ACPI_RSDP: + cb_parse_acpi_rsdp(rec, info); + break; default: + if (info->unimpl_count < SYSINFO_MAX_UNIMPL) + info->unimpl[info->unimpl_count++] = rec->tag; cb_parse_unhandled(rec->tag, ptr); break; } @@ -454,6 +466,7 @@ int get_coreboot_info(struct sysinfo_t *info) if (!ret) return -ENOENT; gd->arch.coreboot_table = addr; + gd_set_acpi_start(map_to_sysmem(info->rsdp)); gd->flags |= GD_FLG_SKIP_LL_INIT; return 0; diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index b15926e8247..afec7d08d67 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event) return ret; } -EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl); +EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 38632e513fc..2f6f6880003 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -303,7 +303,7 @@ static int mrccache_save_type(enum mrc_type_t type) mrc = &gd->arch.mrc[type]; if (!mrc->len) return 0; - log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n", + log_debug("Saving %x bytes of MRC output data type %d to SPI flash\n", mrc->len, type); ret = mrccache_get_region(type, &sf, &entry); if (ret) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index bdf57ef7b5b..ca1645f9d68 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -117,6 +117,8 @@ static int x86_spl_init(void) } #ifndef CONFIG_SYS_COREBOOT + debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, + (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); # ifndef CONFIG_TPL @@ -145,7 +147,6 @@ static int x86_spl_init(void) debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret); return ret; } - mtrr_commit(true); # else ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); if (ret) @@ -184,7 +185,8 @@ void board_init_f(ulong flags) void board_init_f_r(void) { - init_cache_f_r(); + mtrr_commit(false); + init_cache(); gd->flags &= ~GD_FLG_SERIAL_READY; debug("cache status %d\n", dcache_status()); board_init_r(gd, 0); @@ -215,16 +217,9 @@ static int spl_board_load_image(struct spl_image_info *spl_image, spl_image->name = "U-Boot"; if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) { - /* - * Copy U-Boot from ROM - * TODO(sjg@chromium.org): Figure out a way to get the text base - * correctly here, and in the device-tree binman definition. - * - * Also consider using FIT so we get the correct image length - * and parameters. - */ - memcpy((char *)spl_image->load_addr, (char *)0xfff00000, - 0x100000); + /* Copy U-Boot from ROM */ + memcpy((void *)spl_image->load_addr, + (void *)spl_get_image_pos(), spl_get_image_size()); } debug("Loading to %lx\n", spl_image->load_addr); |