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-rw-r--r--arch/x86/lib/Makefile20
-rw-r--r--arch/x86/lib/bdinfo.c7
-rw-r--r--arch/x86/lib/e820.c47
-rw-r--r--arch/x86/lib/fsp/Makefile2
-rw-r--r--arch/x86/lib/fsp/fsp_common.c6
-rw-r--r--arch/x86/lib/fsp2/fsp_dram.c2
-rw-r--r--arch/x86/lib/fsp2/fsp_init.c4
-rw-r--r--arch/x86/lib/tpl.c2
8 files changed, 57 insertions, 33 deletions
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 8fc35e1b51e..7677c0c352f 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -5,21 +5,21 @@
obj-y += bdinfo.o
-ifndef CONFIG_$(SPL_TPL_)X86_64
+ifndef CONFIG_$(PHASE_)X86_64
obj-y += bios.o
obj-y += bios_asm.o
obj-y += bios_interrupts.o
endif
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_X86_32BIT_INIT) += string.o
endif
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_CMD_BOOTM) += bootm.o
endif
obj-y += cmd_boot.o
-obj-$(CONFIG_$(SPL_)COREBOOT_SYSINFO) += coreboot/
+obj-$(CONFIG_$(XPL_)COREBOOT_SYSINFO) += coreboot/
obj-$(CONFIG_SEABIOS) += coreboot_table.o
obj-y += early_cmos.o
obj-y += e820.o
@@ -27,7 +27,7 @@ obj-y += init_helpers.o
obj-y += interrupts.o
obj-y += lpc-uclass.o
obj-y += mpspec.o
-obj-$(CONFIG_$(SPL_TPL_)ACPIGEN) += acpi_nhlt.o
+obj-$(CONFIG_$(PHASE_)ACPIGEN) += acpi_nhlt.o
obj-y += northbridge-uclass.o
obj-$(CONFIG_I8259_PIC) += i8259.o
obj-$(CONFIG_I8254_TIMER) += i8254.o
@@ -44,10 +44,10 @@ obj-y += acpi.o
obj-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.o
ifndef CONFIG_QEMU
obj-y += acpigen.o
-obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi_table.o
+obj-$(CONFIG_$(PHASE_)GENERATE_ACPI_TABLE) += acpi_table.o
endif
obj-y += tables.o
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_ZBOOT) += zimage.o
endif
obj-$(CONFIG_USE_HOB) += hob.o
@@ -58,7 +58,7 @@ obj-$(CONFIG_FSP_VERSION1) += fsp1/
obj-$(CONFIG_FSP_VERSION2) += fsp2/
endif
-ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_XPL_BUILD
ifdef CONFIG_TPL_BUILD
obj-y += tpl.o
else
@@ -90,13 +90,13 @@ endif
ifdef CONFIG_EFI_STUB
-ifeq ($(CONFIG_$(SPL_)X86_64),)
+ifeq ($(CONFIG_$(XPL_)X86_64),)
extra-y += $(EFI_CRT0) $(EFI_RELOC)
endif
else
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
ifneq ($(CONFIG_CMD_BOOTEFI_SELFTEST)$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),)
extra-y += $(EFI_CRT0) $(EFI_RELOC)
endif
diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c
index 165e8ab944f..2a78f578dee 100644
--- a/arch/x86/lib/bdinfo.c
+++ b/arch/x86/lib/bdinfo.c
@@ -19,7 +19,12 @@ void arch_print_bdinfo(void)
bdinfo_print_num_l("clock_rate", gd->arch.clock_rate);
bdinfo_print_num_l("tsc_base", gd->arch.tsc_base);
bdinfo_print_num_l("vendor", gd->arch.x86_vendor);
- bdinfo_print_str(" name", cpu_vendor_name(gd->arch.x86_vendor));
+ if (!IS_ENABLED(CONFIG_X86_64)) {
+ char vendor_name[16];
+
+ x86_cpu_vendor_info(vendor_name);
+ bdinfo_print_str(" name", vendor_name);
+ }
bdinfo_print_num_l("model", gd->arch.x86_model);
bdinfo_print_num_l("phys_addr in bits", cpu_phys_address_size());
bdinfo_print_num_l("table start", gd->arch.table_start);
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 122b4f7ca01..d478b7486e3 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -4,6 +4,7 @@
*/
#include <efi_loader.h>
+#include <lmb.h>
#include <asm/e820.h>
#include <asm/global_data.h>
@@ -41,15 +42,11 @@ void efi_add_known_memory(void)
{
struct e820_entry e820[E820MAX];
unsigned int i, num;
- u64 start, ram_top;
+ u64 start;
int type;
num = install_e820_map(ARRAY_SIZE(e820), e820);
- ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK;
- if (!ram_top)
- ram_top = 0x100000000ULL;
-
for (i = 0; i < num; ++i) {
start = e820[i].addr;
@@ -72,13 +69,41 @@ void efi_add_known_memory(void)
break;
}
- if (type == EFI_CONVENTIONAL_MEMORY) {
- efi_add_conventional_memory_map(start,
- start + e820[i].size,
- ram_top);
- } else {
+ if (type != EFI_CONVENTIONAL_MEMORY)
efi_add_memory_map(start, e820[i].size, type);
- }
}
}
#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
+
+#if CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP)
+void lmb_arch_add_memory(void)
+{
+ struct e820_entry e820[E820MAX];
+ unsigned int i, num;
+ u64 ram_top;
+
+ num = install_e820_map(ARRAY_SIZE(e820), e820);
+
+ ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK;
+ if (!ram_top)
+ ram_top = 0x100000000ULL;
+
+ for (i = 0; i < num; ++i) {
+ if (e820[i].type == E820_RAM) {
+ u64 start, size, rgn_top;
+
+ start = e820[i].addr;
+ size = e820[i].size;
+ rgn_top = start + size;
+
+ if (start > ram_top)
+ continue;
+
+ if (rgn_top > ram_top)
+ size -= rgn_top - ram_top;
+
+ lmb_add(start, size);
+ }
+ }
+}
+#endif /* CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP) */
diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile
index da6c0a886ae..0039dd1bf5c 100644
--- a/arch/x86/lib/fsp/Makefile
+++ b/arch/x86/lib/fsp/Makefile
@@ -4,7 +4,7 @@
obj-y += fsp_common.o
obj-y += fsp_dram.o
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o
endif
obj-y += fsp_support.o
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index c47e6ca4738..7e4c1476634 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -26,12 +26,6 @@ int checkcpu(void)
return 0;
}
-int print_cpuinfo(void)
-{
- post_code(POST_CPU_INFO);
- return default_print_cpuinfo();
-}
-
int fsp_init_phase_pci(void)
{
u32 status;
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index a50dc985a3c..4c4c8334bdb 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -28,7 +28,7 @@ int dram_init(void)
return 0;
}
- if (spl_phase() == PHASE_SPL) {
+ if (xpl_phase() == PHASE_SPL) {
bool s3wake = false;
s3wake = IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index ecbadaae75c..1a2bf46c5c5 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -25,7 +25,7 @@ int fsp_setup_pinctrl(void)
int ret;
/* Make sure pads are set up early in U-Boot */
- if (!ll_boot_init() || spl_phase() != PHASE_BOARD_F)
+ if (!ll_boot_init() || xpl_phase() != PHASE_BOARD_F)
return 0;
/* Probe all pinctrl devices to set up the pads */
@@ -134,7 +134,7 @@ int fsp_locate_fsp(enum fsp_type_t type, struct binman_entry *entry,
return log_msg_ret("Could not get flash mmap", ret);
}
- if (spl_phase() >= PHASE_BOARD_F) {
+ if (xpl_phase() >= PHASE_BOARD_F) {
if (type != FSP_S)
return -EPROTONOSUPPORT;
ret = binman_entry_find("intel-fsp-s", entry);
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index 7c03dea0711..f7df7e03621 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -103,7 +103,7 @@ int spl_spi_load_image(void)
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
- debug("Jumping to %s at %lx\n", spl_phase_name(spl_next_phase()),
+ debug("Jumping to %s at %lx\n", xpl_name(xpl_next_phase()),
(ulong)spl_image->entry_point);
#ifdef DEBUG
print_buffer(spl_image->entry_point, (void *)spl_image->entry_point, 1,