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-rw-r--r--arch/x86/lib/bootm.c4
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index eafcddfa24b..873e2bc176f 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -39,7 +39,7 @@ void bootm_announce_and_cleanup(void)
timestamp_add_now(TS_START_KERNEL);
#endif
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
-#if CONFIG_IS_ENABLED(BOOTSTAGE_REPORT)
+#if IS_ENABLED(CONFIG_BOOTSTAGE_REPORT)
bootstage_report();
#endif
@@ -78,7 +78,7 @@ static int boot_prep_linux(struct bootm_headers *images)
size_t len;
int ret;
- if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
puts("FDT creation failed! hanging...");
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 2bd408d0c56..cc889a688d8 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -60,7 +60,7 @@ int dram_init_banksize(void)
*
* However it seems FSP2's behavior is different. We need to add the
* DRAM range in MTRR otherwise the boot process goes very slowly,
- * which was observed on Chrromebook Coral with FSP2.
+ * which was observed on Chromebook Coral with FSP2.
*/
update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2);