diff options
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/cpu/i386/cpu.c | 8 | ||||
-rw-r--r-- | arch/x86/cpu/intel_common/cpu_from_spl.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 5 | ||||
-rw-r--r-- | arch/x86/cpu/mp_init.c | 10 | ||||
-rw-r--r-- | arch/x86/include/asm/cpu.h | 5 | ||||
-rw-r--r-- | arch/x86/include/asm/io.h | 1 | ||||
-rw-r--r-- | arch/x86/lib/bootm.c | 18 | ||||
-rw-r--r-- | arch/x86/lib/fsp/fsp_graphics.c | 1 | ||||
-rw-r--r-- | arch/x86/lib/fsp2/fsp_dram.c | 4 |
9 files changed, 9 insertions, 47 deletions
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index db2727d7485..934e98ac582 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -412,12 +412,6 @@ int cpu_phys_address_size(void) return 32; } -/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */ -static void setup_pci_ram_top(void) -{ - gd_set_pci_ram_top(0x80000000U); -} - static void setup_mtrr(void) { u64 mtrr_cap; @@ -469,7 +463,6 @@ int x86_cpu_init_f(void) setup_cpu_features(); setup_identity(); setup_mtrr(); - setup_pci_ram_top(); /* Set up the i8254 timer if required */ if (IS_ENABLED(CONFIG_I8254_TIMER)) @@ -483,7 +476,6 @@ int x86_cpu_reinit_f(void) long addr; setup_identity(); - setup_pci_ram_top(); addr = locate_coreboot_table(); if (addr >= 0) { gd->arch.coreboot_table = addr; diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c index 48b2ef253cb..5aad2ae7309 100644 --- a/arch/x86/cpu/intel_common/cpu_from_spl.c +++ b/arch/x86/cpu/intel_common/cpu_from_spl.c @@ -24,9 +24,7 @@ int arch_cpu_init(void) int ret; #if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) - struct spl_handoff *ho = gd->spl_handoff; - - gd->arch.hob_list = ho->arch.hob_list; + gd->arch.hob_list = handoff_get(); #endif ret = x86_cpu_reinit_f(); diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index d71ab0a6385..05691a38d2e 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -55,7 +55,6 @@ int arch_cpu_init(void) static int ivybridge_cpu_init(void) { - struct pci_controller *hose; struct udevice *bus, *dev; int ret; @@ -65,10 +64,6 @@ static int ivybridge_cpu_init(void) if (ret) return ret; post_code(0x72); - hose = dev_get_uclass_priv(bus); - - /* TODO(sjg@chromium.org): Get rid of gd->hose */ - gd->hose = hose; ret = uclass_first_device_err(UCLASS_LPC, &dev); if (ret) diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index aa1f47d7227..e2e1849c065 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -164,12 +164,12 @@ static inline void barrier_wait(atomic_t *b) { while (atomic_read(b) == 0) asm("pause"); - mfence(); + mb(); } static inline void release_barrier(atomic_t *b) { - mfence(); + mb(); atomic_set(b, 1); } @@ -631,7 +631,7 @@ static int run_ap_work(struct mp_callback *callback, struct udevice *bsp, if (cur_cpu != i) store_callback(&ap_callbacks[i], callback); } - mfence(); + mb(); /* Wait for all the APs to signal back that call has been accepted. */ start = get_timer(0); @@ -656,7 +656,7 @@ static int run_ap_work(struct mp_callback *callback, struct udevice *bsp, } while (cpus_accepted != num_aps); /* Make sure we can see any data written by the APs */ - mfence(); + mb(); return 0; } @@ -692,7 +692,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) /* Copy to local variable before using the value */ memcpy(&lcb, cb, sizeof(lcb)); - mfence(); + mb(); if (lcb.logical_cpu_number == MP_SELECT_ALL || lcb.logical_cpu_number == MP_SELECT_APS || dev_seq(cpu) == lcb.logical_cpu_number) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 073f80b07f1..87e0c6f12b6 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -185,11 +185,6 @@ static inline int flag_is_changeable_p(uint32_t flag) } #endif -static inline void mfence(void) -{ - __asm__ __volatile__("mfence" : : : "memory"); -} - /** * cpu_enable_paging_pae() - Enable PAE-paging * diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index c6d90eb794a..1390193f09c 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -240,6 +240,7 @@ static inline void sync(void) * have some advantages to use them instead of the simple one here. */ #define dmb() __asm__ __volatile__ ("" : : : "memory") +#define mb() __asm__ __volatile__ ("mfence" : : : "memory") #define __iormb() dmb() #define __iowmb() dmb() diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 2c889bcd33c..55f581836df 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -253,21 +253,3 @@ int do_bootm_linux(int flag, struct bootm_info *bmi) return boot_jump_linux(images); } - -static ulong get_sp(void) -{ - ulong ret; - -#if CONFIG_IS_ENABLED(X86_64) - asm("mov %%rsp, %0" : "=r"(ret) : ); -#else - asm("mov %%esp, %0" : "=r"(ret) : ); -#endif - - return ret; -} - -void arch_lmb_reserve(struct lmb *lmb) -{ - arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); -} diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 5f7701265a9..ad25020086c 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -103,7 +103,6 @@ static int fsp_video_probe(struct udevice *dev) * For IGD, it seems to be always on BAR2. */ vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); - gd->fb_base = vesa->phys_base_ptr; ret = vesa_setup_video_priv(vesa, vesa->phys_base_ptr, uc_priv, plat); if (ret) diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c index 83c6d7bcc93..a50dc985a3c 100644 --- a/arch/x86/lib/fsp2/fsp_dram.c +++ b/arch/x86/lib/fsp2/fsp_dram.c @@ -59,7 +59,7 @@ int dram_init(void) #endif } else { #if CONFIG_IS_ENABLED(HANDOFF) - struct spl_handoff *ho = gd->spl_handoff; + struct spl_handoff *ho = handoff_get(); if (!ho) { log_debug("No SPL handoff found\n"); @@ -82,7 +82,7 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return gd->ram_size; #if CONFIG_IS_ENABLED(HANDOFF) - struct spl_handoff *ho = gd->spl_handoff; + struct spl_handoff *ho = handoff_get(); log_debug("usable_ram_top = %lx\n", ho->arch.usable_ram_top); |