diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/armada-385-thecus-n2350.dts | 10 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 15 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/spl.c | 37 |
5 files changed, 50 insertions, 15 deletions
diff --git a/arch/arm/dts/armada-385-thecus-n2350.dts b/arch/arm/dts/armada-385-thecus-n2350.dts index 253cf011308..fdaa444e510 100644 --- a/arch/arm/dts/armada-385-thecus-n2350.dts +++ b/arch/arm/dts/armada-385-thecus-n2350.dts @@ -2,7 +2,7 @@ /* * Device Tree file for Thecus N2350 board * - * Copyright (C) 2018-2023 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2018-2024 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2018 Manuel Jung <manuel.jung@hotmail.com> */ @@ -143,9 +143,9 @@ fan { compatible = "gpio-fan"; gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 600 1 - 3000 2 >; + gpio-fan,speed-map = < 0 0>, + <600 1>, + <3000 2 >; pinctrl-0 = <&pmx_fan>; pinctrl-names = "default"; }; @@ -415,7 +415,7 @@ compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <108000000>; + spi-max-frequency = <50000000>; spi-cpha; partition@0 { diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index f15d3cc5edb..4a8328760eb 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -37,6 +37,10 @@ config ARMADA_38X_HS_IMPEDANCE_THRESH default 0x6 range 0x0 0x7 +config ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING + bool + depends on ARMADA_38X + config ARMADA_XP bool select ARMADA_32BIT @@ -145,6 +149,7 @@ config TARGET_TURRIS_OMNIA select SPL_SYS_MALLOC_SIMPLE select SYS_I2C_MVTWSI select ATSHA204A + select ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING config TARGET_TURRIS_MOX bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe" @@ -250,6 +255,16 @@ config DDR_LOG_LEVEL At level 3, rovides the windows margin of each DQ as a results of DQS centeralization. +config DDR_IMMUTABLE_DEBUG_SETTINGS + bool "Immutable DDR debug level (always DEBUG_LEVEL_ERROR)" + depends on ARMADA_38X + help + Makes the DDR training code debug level settings immutable. + The debug level setting from board topology definition is ignored. + The debug level is always set to DEBUG_LEVEL_ERROR and register + dumps are disabled. + This can save around 10 KiB of space in SPL binary. + config DDR_RESET_ON_TRAINING_FAILURE bool "Reset the board on DDR training failure instead of hanging" depends on ARMADA_38X || ARMADA_XP diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index e603ab9ffb7..8a145a5f742 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -36,7 +36,7 @@ static const struct mbus_win windows[] = { }; /* SPI0 CS0 Flash of size MBUS_SPI_SIZE is mapped to address MBUS_SPI_BASE */ -#if CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= MBUS_SPI_SIZE void *env_sf_get_env_addr(void) { diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 904e7157ba6..af6ce2920e6 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -174,6 +174,7 @@ int serdes_phy_config(void); * drivers/ddr/marvell */ int ddr3_init(void); +int old_ddr3_init(void); /* Auto Voltage Scaling */ #if defined(CONFIG_ARMADA_38X) diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 4f4f7e00e3c..cbef4113767 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -313,6 +313,33 @@ int board_return_to_bootrom(struct spl_image_info *spl_image, hang(); } +#if !defined(CONFIG_ARMADA_375) +__weak bool board_use_old_ddr3_training(void) +{ + return false; +} + +static void ddr3_init_or_fail(void) +{ + int ret; + + if (IS_ENABLED(CONFIG_ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING) && + board_use_old_ddr3_training()) + ret = old_ddr3_init(); + else + ret = ddr3_init(); + + if (ret) { + printf("ddr3 init failed: %d\n", ret); + if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) && + get_boot_device() != BOOT_DEVICE_UART) + reset_cpu(); + else + hang(); + } +} +#endif + void board_init_f(ulong dummy) { int ret; @@ -347,15 +374,7 @@ void board_init_f(ulong dummy) serdes_phy_config(); /* Setup DDR */ - ret = ddr3_init(); - if (ret) { - printf("ddr3_init() failed: %d\n", ret); - if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) && - get_boot_device() != BOOT_DEVICE_UART) - reset_cpu(); - else - hang(); - } + ddr3_init_or_fail(); #endif /* Initialize Auto Voltage Scaling */ |