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-rw-r--r--arch/arm/Kconfig14
-rw-r--r--arch/arm/dts/Makefile9
-rw-r--r--arch/arm/dts/sc573-ezkit.dts13
-rw-r--r--arch/arm/dts/sc57x.dtsi21
-rw-r--r--arch/arm/dts/sc584-ezkit.dts13
-rw-r--r--arch/arm/dts/sc589-ezkit.dts13
-rw-r--r--arch/arm/dts/sc589-mini.dts13
-rw-r--r--arch/arm/dts/sc58x.dtsi23
-rw-r--r--arch/arm/dts/sc594-som-ezkit.dts13
-rw-r--r--arch/arm/dts/sc594-som-ezlite.dts13
-rw-r--r--arch/arm/dts/sc594-som.dtsi19
-rw-r--r--arch/arm/dts/sc598-som-ezkit.dts13
-rw-r--r--arch/arm/dts/sc598-som-ezlite.dts13
-rw-r--r--arch/arm/dts/sc598-som.dtsi31
-rw-r--r--arch/arm/dts/sc5xx.dtsi54
-rw-r--r--arch/arm/mach-sc5xx/Kconfig145
-rw-r--r--arch/arm/mach-sc5xx/Makefile4
-rw-r--r--arch/arm/mach-sc5xx/sc57x-spl.c26
-rw-r--r--arch/arm/mach-sc5xx/sc58x-spl.c26
-rw-r--r--arch/arm/mach-sc5xx/sc59x-spl.c26
-rw-r--r--arch/arm/mach-sc5xx/sc59x_64-spl.c26
-rw-r--r--arch/arm/mach-sc5xx/sc59x_64.c25
-rw-r--r--arch/arm/mach-sc5xx/soc.c36
23 files changed, 563 insertions, 26 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 656f588a97c..060636e9e2d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1868,6 +1868,20 @@ config TARGET_LS1046AFRWY
config ARCH_SC5XX
bool "Analog Devices SC5XX-processor family"
+ select ADI_SC5XX_TIMER
+ select DM
+ select DM_SERIAL
+ select HAS_CUSTOM_SYS_INIT_SP_ADDR
+ select PANIC_HANG
+ select SPL
+ select SPL_BOOTROM_SUPPORT
+ select SPL_DM
+ select SPL_DM_SEQ_ALIAS
+ select SPL_LIBGENERIC_SUPPORT
+ select SPL_LIBCOMMON_SUPPORT
+ select SPL_SKIP_LOWLEVEL_INIT
+ select SUPPORT_SPL
+ select TIMER
config TARGET_SL28
bool "Support sl28"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b3fe3f3c535..d46f0bda1a8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1290,6 +1290,15 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb \
imx8mm-cl-iot-gate-ied-tpm0.dtbo \
imx8mm-cl-iot-gate-ied-tpm1.dtbo
+dtb-$(CONFIG_TARGET_SC573_EZKIT) += sc573-ezkit.dtb
+dtb-$(CONFIG_TARGET_SC584_EZKIT) += sc584-ezkit.dtb
+dtb-$(CONFIG_TARGET_SC589_MINI) += sc589-mini.dtb
+dtb-$(CONFIG_TARGET_SC589_EZKIT) += sc589-ezkit.dtb
+dtb-$(CONFIG_TARGET_SC594_SOM_EZKIT) += sc594-som-ezkit.dtb
+dtb-$(CONFIG_TARGET_SC594_SOM_EZLITE) += sc594-som-ezlite.dtb
+dtb-$(CONFIG_TARGET_SC598_SOM_EZKIT) += sc598-som-ezkit.dtb
+dtb-$(CONFIG_TARGET_SC598_SOM_EZLITE) += sc598-som-ezlite.dtb
+
ifneq ($(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)$(CONFIG_TARGET_IMX8MP_RSB3720A1_6G),)
dtb-y += imx8mp-rsb3720-a1.dtb
endif
diff --git a/arch/arm/dts/sc573-ezkit.dts b/arch/arm/dts/sc573-ezkit.dts
new file mode 100644
index 00000000000..0dc2962618c
--- /dev/null
+++ b/arch/arm/dts/sc573-ezkit.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc57x.dtsi"
+
+/ {
+ model = "ADI SC573-EZKIT";
+ compatible = "adi,sc573-ezkit", "adi,sc57x";
+};
diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi
new file mode 100644
index 00000000000..ddfcae8d190
--- /dev/null
+++ b/arch/arm/dts/sc57x.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include "sc5xx.dtsi"
+
+/ {
+ gic: interrupt-controller@310b2000 {
+ compatible = "arm,cortex-a5-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x310B2000 0x1000>,
+ <0x310B4000 0x100>;
+ };
+};
+
+&timer0 {
+ clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
+};
diff --git a/arch/arm/dts/sc584-ezkit.dts b/arch/arm/dts/sc584-ezkit.dts
new file mode 100644
index 00000000000..4ec6bcfb658
--- /dev/null
+++ b/arch/arm/dts/sc584-ezkit.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc58x.dtsi"
+
+/ {
+ model = "ADI SC584-EZKIT";
+ compatible = "adi,sc584-ezkit", "adi,sc58x";
+};
diff --git a/arch/arm/dts/sc589-ezkit.dts b/arch/arm/dts/sc589-ezkit.dts
new file mode 100644
index 00000000000..8a1c0ce0862
--- /dev/null
+++ b/arch/arm/dts/sc589-ezkit.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc58x.dtsi"
+
+/ {
+ model = "ADI SC589-EZKIT";
+ compatible = "adi,sc589-ezkit", "adi,sc58x";
+};
diff --git a/arch/arm/dts/sc589-mini.dts b/arch/arm/dts/sc589-mini.dts
new file mode 100644
index 00000000000..605f7a17bfc
--- /dev/null
+++ b/arch/arm/dts/sc589-mini.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc58x.dtsi"
+
+/ {
+ model = "ADI SC598-MINI";
+ compatible = "adi,sc589-mini", "adi,sc58x";
+};
diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi
new file mode 100644
index 00000000000..66145315ab7
--- /dev/null
+++ b/arch/arm/dts/sc58x.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include "sc5xx.dtsi"
+
+/ {
+ gic: interrupt-controller@310b2000 {
+ compatible = "arm,cortex-a5-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x310B2000 0x1000>,
+ <0x310B4000 0x100>;
+ };
+};
+
+&timer0 {
+ reg = <0x31001004 0x100>,
+ <0x31001060 0x100>;
+ clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
+};
diff --git a/arch/arm/dts/sc594-som-ezkit.dts b/arch/arm/dts/sc594-som-ezkit.dts
new file mode 100644
index 00000000000..e744a3a4edb
--- /dev/null
+++ b/arch/arm/dts/sc594-som-ezkit.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc594-som.dtsi"
+
+/ {
+ model = "ADI SC594-SOM-EZKIT";
+ compatible = "adi,sc594-som-ezkit", "adi,sc59x";
+};
diff --git a/arch/arm/dts/sc594-som-ezlite.dts b/arch/arm/dts/sc594-som-ezlite.dts
new file mode 100644
index 00000000000..7d81b40fe8a
--- /dev/null
+++ b/arch/arm/dts/sc594-som-ezlite.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc594-som.dtsi"
+
+/ {
+ model = "ADI SC594-SOM-EZLITE";
+ compatible = "adi,sc594-som-ezlite", "adi,sc59x";
+};
diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi
new file mode 100644
index 00000000000..e15473f8e8f
--- /dev/null
+++ b/arch/arm/dts/sc594-som.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc5xx.dtsi"
+
+&timer0 {
+ clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
+};
+
+&clk {
+ compatible = "adi,sc594-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>;
+};
diff --git a/arch/arm/dts/sc598-som-ezkit.dts b/arch/arm/dts/sc598-som-ezkit.dts
new file mode 100644
index 00000000000..7289e4d1d54
--- /dev/null
+++ b/arch/arm/dts/sc598-som-ezkit.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc598-som.dtsi"
+
+/ {
+ model = "ADI SC598-SOM-EZKIT";
+ compatible = "adi,sc598-som-ezkit", "adi,sc59x-64";
+};
diff --git a/arch/arm/dts/sc598-som-ezlite.dts b/arch/arm/dts/sc598-som-ezlite.dts
new file mode 100644
index 00000000000..fa23b30f86e
--- /dev/null
+++ b/arch/arm/dts/sc598-som-ezlite.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc598-som.dtsi"
+
+/ {
+ model = "ADI SC598-SOM-EZLITE";
+ compatible = "adi,sc598-som-ezlite", "adi,sc59x-64";
+};
diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi
new file mode 100644
index 00000000000..8bcc8bb8f1c
--- /dev/null
+++ b/arch/arm/dts/sc598-som.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc5xx.dtsi"
+
+/ {
+ gic: interrupt-controller@31200000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x31200000 0x40000>, /* GIC Dist */
+ <0x31240000 0x40000>; /* GICR */
+ };
+};
+
+&clk {
+ compatible = "adi,sc598-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>,
+ <0x310a9000 0x1000>;
+ reg-names = "cgu0", "cgu1", "cdu", "pll3";
+};
+
+&timer0 {
+ clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
+};
diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi
new file mode 100644
index 00000000000..3f440dac29f
--- /dev/null
+++ b/arch/arm/dts/sc5xx.dtsi
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/adi-sc5xx-clock.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clocks {
+ sys_clkin0: sys_clkin0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ bootph-all;
+ };
+
+ sys_clkin1: sys_clkin1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ bootph-all;
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ device_type = "soc";
+ ranges;
+ bootph-all;
+
+ timer0: timer@31018000 {
+ compatible = "adi,sc5xx-gptimer";
+ reg = <0x31018004 0x100>,
+ <0x31018060 0x100>;
+ status = "okay";
+ bootph-all;
+ };
+
+ clk: clocks@3108d000 {
+ reg = <0x3108d000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ bootph-all;
+ };
+ };
+};
diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig
index 3846b4fd5b6..30444f04fc4 100644
--- a/arch/arm/mach-sc5xx/Kconfig
+++ b/arch/arm/mach-sc5xx/Kconfig
@@ -13,46 +13,115 @@
if ARCH_SC5XX
+config SYS_VENDOR
+ default "adi"
+
+choice
+ prompt "SC5xx SoC Select"
+ help
+ Selects which series of Analog Devices SC5xx chips to support.
+
config SC57X
- bool
- select SUPPORT_SPL
- select CPU_V7A
- select PANIC_HANG
+ bool "SC57x series"
select COMMON_CLK_ADI_SC57X
- select TIMER
- select ADI_SC5XX_TIMER
+ select CPU_V7A
+ select TARGET_SC573_EZKIT
config SC58X
- bool
- select SUPPORT_SPL
- select CPU_V7A
- select PANIC_HANG
+ bool "SC58x series"
select COMMON_CLK_ADI_SC58X
- select TIMER
- select ADI_SC5XX_TIMER
+ select CPU_V7A
config SC59X
- bool
- select SUPPORT_SPL
- select CPU_V7A
- select PANIC_HANG
+ bool "SC59x 32-bit series"
select COMMON_CLK_ADI_SC594
- select TIMER
- select ADI_SC5XX_TIMER
- select NOP_PHY
+ select CPU_V7A
+ select NOP_PHY if PHY
config SC59X_64
- bool
- select SUPPORT_SPL
- select PANIC_HANG
- select MMC_SDHCI_ADMA_FORCE_32BIT
+ bool "SC59x 64-bit series"
select ARM64
- select DM
- select DM_SERIAL
select COMMON_CLK_ADI_SC598
select GICV3
+ select GICV3_SUPPORT_GIC600
select GIC_600_CLEAR_RDPD
- select NOP_PHY
+ select MMC_SDHCI_ADMA_FORCE_32BIT
+ select NOP_PHY if PHY
+
+endchoice
+
+if SC57X
+
+config TARGET_SC573_EZKIT
+ bool "Support SC573-EZKIT"
+
+endif
+
+if SC58X
+
+choice
+ prompt "SC58x board select"
+
+config TARGET_SC584_EZKIT
+ bool
+ prompt "SC584-EZKIT"
+ select ADI_USE_DDR2
+
+config TARGET_SC589_MINI
+ bool
+ prompt "SC589-MINI"
+
+config TARGET_SC589_EZKIT
+ bool
+ prompt "SC589-EZKIT"
+
+endchoice
+
+endif
+
+if SC59X
+
+choice
+ prompt "SC59x 32-bit board select"
+
+config TARGET_SC594_SOM_EZLITE
+ bool
+ prompt "SC594-SOM with SOMCRR-EZLITE"
+ select ADI_CARRIER_SOMCRR_EZLITE
+
+config TARGET_SC594_SOM_EZKIT
+ bool
+ prompt "SC594-SOM with SOMCRR-EZKIT"
+ select ADI_CARRIER_SOMCRR_EZKIT
+
+endchoice
+
+endif
+
+if SC59X_64
+
+choice
+ prompt "SC59x 64-bit board select"
+
+config TARGET_SC598_SOM_EZLITE
+ bool
+ prompt "SC598-SOM with SOMCRR-EZLITE"
+ select ADI_CARRIER_SOMCRR_EZLITE
+
+config TARGET_SC598_SOM_EZKIT
+ bool
+ prompt "SC598-SOM with SOMCRR-EZKIT"
+ select ADI_CARRIER_SOMCRR_EZKIT
+
+endchoice
+
+endif
+
+config ADI_IMAGE
+ string "ADI fitImage type"
+ help
+ The image built by the ADI ADSP Linux build system.
+ Is one of tiny, minimal, full.
config SC_BOOT_MODE
int "SC5XX boot mode select"
@@ -93,10 +162,25 @@ config SC_BOOT_OSPI_SSEL
This is the OSPI chip select number to use for booting, Y in the
expression `sf probe X:Y`
+config SYS_BOOTM_LEN
+ hex
+ default 0x1800000
+
config SYS_FLASH_BASE
hex
default 0x60000000
+config SYS_MALLOC_F_LEN
+ default 0x14000
+
+config SYS_LOAD_ADDR
+ hex
+ default 0x0
+
+config SYS_MALLOC_LEN
+ hex
+ default 1048576
+
config UART_CONSOLE
int
default 0
@@ -472,4 +556,13 @@ config PINCTRL_ADI
bool
default y
+source "board/adi/sc598-som-ezkit/Kconfig"
+source "board/adi/sc598-som-ezlite/Kconfig"
+source "board/adi/sc594-som-ezkit/Kconfig"
+source "board/adi/sc594-som-ezlite/Kconfig"
+source "board/adi/sc589-ezkit/Kconfig"
+source "board/adi/sc589-mini/Kconfig"
+source "board/adi/sc584-ezkit/Kconfig"
+source "board/adi/sc573-ezkit/Kconfig"
+
endif
diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile
index eeb56c078b3..cac768ba565 100644
--- a/arch/arm/mach-sc5xx/Makefile
+++ b/arch/arm/mach-sc5xx/Makefile
@@ -11,9 +11,13 @@
obj-y += soc.o init/
obj-$(CONFIG_SC57X) += sc57x.o
+obj-$(CONFIG_SC57X) += sc57x-spl.o
obj-$(CONFIG_SC58X) += sc58x.o
+obj-$(CONFIG_SC58X) += sc58x-spl.o
obj-$(CONFIG_SC59X) += sc59x.o
+obj-$(CONFIG_SC59X) += sc59x-spl.o
obj-$(CONFIG_SC59X_64) += sc59x_64.o
+obj-$(CONFIG_SC59X_64) += sc59x_64-spl.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_SYSCON) += rcu.o
diff --git a/arch/arm/mach-sc5xx/sc57x-spl.c b/arch/arm/mach-sc5xx/sc57x-spl.c
new file mode 100644
index 00000000000..28380b89b48
--- /dev/null
+++ b/arch/arm/mach-sc5xx/sc57x-spl.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <asm/arch-adi/sc5xx/spl.h>
+
+// Table 45-16 in SC573 HRM
+const struct adi_boot_args adi_rom_boot_args[] = {
+ // JTAG/no boot
+ [0] = {0, 0, 0},
+ // SPI master, used for qspi as well
+ [1] = {0x60020000, 0x00040000, 0x00010207},
+ // SPI slave
+ [2] = {0, 0, 0x00000212},
+ // UART slave
+ [3] = {0, 0, 0x00000013},
+ // Linkport slave
+ [4] = {0, 0, 0x00000014},
+ // reserved, no boot
+ [5] = {0, 0, 0},
+ // reserved, no boot
+ [6] = {0, 0, 0},
+ // reserved, also no boot
+ [7] = {0, 0, 0}
+};
diff --git a/arch/arm/mach-sc5xx/sc58x-spl.c b/arch/arm/mach-sc5xx/sc58x-spl.c
new file mode 100644
index 00000000000..ae809f09e55
--- /dev/null
+++ b/arch/arm/mach-sc5xx/sc58x-spl.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <asm/arch-adi/sc5xx/spl.h>
+
+// Table 53-13 in SC58x HRM
+const struct adi_boot_args adi_rom_boot_args[] = {
+ // JTAG/no boot
+ [0] = {0, 0, 0},
+ // SPI master, used for qspi as well
+ [1] = {0x60020000, 0x00040000, 0x00010207},
+ // SPI slave
+ [2] = {0, 0, 0x00000212},
+ // reserved, no boot
+ [3] = {0, 0, 0},
+ // reserved, no boot
+ [4] = {0, 0, 0},
+ // reserved, also no boot
+ [5] = {0, 0, 0},
+ // Linkport slave
+ [6] = {0, 0, 0x00000014},
+ // UART slave
+ [7] = {0, 0, 0x00000013},
+};
diff --git a/arch/arm/mach-sc5xx/sc59x-spl.c b/arch/arm/mach-sc5xx/sc59x-spl.c
new file mode 100644
index 00000000000..c8fc25fe7c4
--- /dev/null
+++ b/arch/arm/mach-sc5xx/sc59x-spl.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <asm/arch-adi/sc5xx/spl.h>
+
+// Table 45-14 in sc594 HRM
+const struct adi_boot_args adi_rom_boot_args[] = {
+ // JTAG/no boot
+ [0] = {0, 0, 0},
+ // SPI master, used for qspi as well
+ [1] = {0x60040000, 0x00040000, 0x20620247},
+ // SPI slave
+ [2] = {0, 0, 0x00000212},
+ // UART slave
+ [3] = {0, 0, 0x00000013},
+ // Linkport slave
+ [4] = {0, 0, 0x00000014},
+ // OSPI master
+ [5] = {0x60040000, 0, 0x00000008},
+ // reserved, no boot
+ [6] = {0, 0, 0},
+ // reserved, also no boot
+ [7] = {0, 0, 0}
+};
diff --git a/arch/arm/mach-sc5xx/sc59x_64-spl.c b/arch/arm/mach-sc5xx/sc59x_64-spl.c
new file mode 100644
index 00000000000..3992538133d
--- /dev/null
+++ b/arch/arm/mach-sc5xx/sc59x_64-spl.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <asm/arch-adi/sc5xx/spl.h>
+
+// Table 47-14 in SC598 hardware reference manual
+const struct adi_boot_args adi_rom_boot_args[] = {
+ // JTAG/no boot
+ [0] = {0, 0, 0},
+ // SPI master, used for qspi as well
+ [1] = {0x60040000, 0x00040000, 0x20620247},
+ // SPI slave
+ [2] = {0, 0, 0x00000212},
+ // UART slave
+ [3] = {0, 0, 0x00000013},
+ // Linkport slave
+ [4] = {0, 0, 0x00000014},
+ // OSPI master
+ [5] = {0x60040000, 0, 0x00000008},
+ // eMMC
+ [6] = {0x201, 0, 0x86009},
+ // reserved, also no boot
+ [7] = {0, 0, 0}
+};
diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c
index 82537bf1965..001747f223d 100644
--- a/arch/arm/mach-sc5xx/sc59x_64.c
+++ b/arch/arm/mach-sc5xx/sc59x_64.c
@@ -9,6 +9,7 @@
*/
#include <asm/io.h>
+#include <asm/armv8/mmu.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/spl.h>
@@ -24,6 +25,30 @@
#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003
#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001
+static struct mm_region sc598_mem_map[] = {
+ {
+ /* Peripherals */
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* DDR */
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = sc598_mem_map;
+
adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e4;
void sc5xx_enable_rgmii(void)
diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c
index 8f13127a660..f3619206e91 100644
--- a/arch/arm/mach-sc5xx/soc.c
+++ b/arch/arm/mach-sc5xx/soc.c
@@ -172,6 +172,42 @@ void fixup_dp83867_phy(struct phy_device *phydev)
phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x3100);
}
+extern char __bss_start, __bss_end;
+extern char __rel_dyn_end;
+
+void bss_clear(void)
+{
+ char *bss_start = &__bss_start;
+ char *bss_end = &__bss_end;
+ char *rel_dyn_end = &__rel_dyn_end;
+
+ char *start;
+
+ if (rel_dyn_end >= bss_start && rel_dyn_end <= bss_end)
+ start = rel_dyn_end;
+ else
+ start = bss_start;
+
+ u32 *pt;
+ size_t sz = bss_end - start;
+
+ for (int i = 0; i < sz; i += 4) {
+ pt = (u32 *)(start + i);
+ *pt = 0;
+ }
+}
+
+int board_early_init_f(void)
+{
+ bss_clear();
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
int dram_init(void)
{
gd->ram_size = CFG_SYS_SDRAM_SIZE;
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-05 05:18:05 +0000