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-rw-r--r--arch/arm/config.mk4
-rw-r--r--arch/arm/cpu/armv8/cache_v8.c5
-rw-r--r--arch/arm/cpu/armv8/exceptions.S129
-rw-r--r--arch/arm/dts/Makefile4
-rw-r--r--arch/arm/dts/bcm2835-rpi-zero-w.dts26
-rw-r--r--arch/arm/dts/meson-gxl-s905x-khadas-vim.dts137
-rw-r--r--arch/arm/dts/meson-gxl-s905x-libretech-cc.dts171
-rw-r--r--arch/arm/include/asm/arch-meson/eth.h23
-rw-r--r--arch/arm/include/asm/arch-meson/gxbb.h17
-rw-r--r--arch/arm/include/asm/arch-meson/mem.h16
-rw-r--r--arch/arm/include/asm/armv8/mmu.h1
-rw-r--r--arch/arm/lib/interrupts_64.c10
-rw-r--r--arch/arm/mach-bcm283x/Kconfig16
-rw-r--r--arch/arm/mach-meson/Kconfig18
-rw-r--r--arch/arm/mach-meson/Makefile2
-rw-r--r--arch/arm/mach-meson/board.c74
-rw-r--r--arch/arm/mach-meson/eth.c55
-rw-r--r--arch/arm/mach-omap2/utils.c3
18 files changed, 623 insertions, 88 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 1a77779db4d..02f61fcc3cb 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -68,8 +68,8 @@ endif
checkgcc6:
@if test "$(call cc-name)" = "gcc" -a \
"$(call cc-version)" -lt "0600"; then \
- echo -n '*** Your GCC is older than 6.0 and will not be '; \
- echo 'supported starting in v2018.01.'; \
+ echo '*** Your GCC is older than 6.0 and is not supported'; \
+ false; \
fi
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index adc7e1746f5..6548f3c9121 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
/* Page fits, create block PTE */
debug("Setting PTE %p to block virt=%llx\n",
pte, virt);
- *pte = phys | attrs;
+ if (level == 3)
+ *pte = phys | attrs | PTE_TYPE_PAGE;
+ else
+ *pte = phys | attrs;
virt += blocksize;
phys += blocksize;
size -= blocksize;
diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 4f4f526f932..8c7c1d3eb80 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -12,12 +12,65 @@
#include <linux/linkage.h>
/*
+ * Exception vectors.
+ */
+ .align 11
+ .globl vectors
+vectors:
+ .align 7 /* Current EL Synchronous Thread */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_bad_sync
+ b exception_exit
+
+ .align 7 /* Current EL IRQ Thread */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_bad_irq
+ b exception_exit
+
+ .align 7 /* Current EL FIQ Thread */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_bad_fiq
+ b exception_exit
+
+ .align 7 /* Current EL Error Thread */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_bad_error
+ b exception_exit
+
+ .align 7 /* Current EL Synchronous Handler */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_sync
+ b exception_exit
+
+ .align 7 /* Current EL IRQ Handler */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_irq
+ b exception_exit
+
+ .align 7 /* Current EL FIQ Handler */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_fiq
+ b exception_exit
+
+ .align 7 /* Current EL Error Handler */
+ stp x29, x30, [sp, #-16]!
+ bl _exception_entry
+ bl do_error
+ b exception_exit
+
+/*
* Enter Exception.
* This will save the processor state that is ELR/X0~X30
* to the stack frame.
*/
-.macro exception_entry
- stp x29, x30, [sp, #-16]!
+_exception_entry:
stp x27, x28, [sp, #-16]!
stp x25, x26, [sp, #-16]!
stp x23, x24, [sp, #-16]!
@@ -46,78 +99,8 @@
0:
stp x2, x0, [sp, #-16]!
mov x0, sp
-.endm
+ ret
-/*
- * Exception vectors.
- */
- .align 11
- .globl vectors
-vectors:
- .align 7
- b _do_bad_sync /* Current EL Synchronous Thread */
-
- .align 7
- b _do_bad_irq /* Current EL IRQ Thread */
-
- .align 7
- b _do_bad_fiq /* Current EL FIQ Thread */
-
- .align 7
- b _do_bad_error /* Current EL Error Thread */
-
- .align 7
- b _do_sync /* Current EL Synchronous Handler */
-
- .align 7
- b _do_irq /* Current EL IRQ Handler */
-
- .align 7
- b _do_fiq /* Current EL FIQ Handler */
-
- .align 7
- b _do_error /* Current EL Error Handler */
-
-
-_do_bad_sync:
- exception_entry
- bl do_bad_sync
- b exception_exit
-
-_do_bad_irq:
- exception_entry
- bl do_bad_irq
- b exception_exit
-
-_do_bad_fiq:
- exception_entry
- bl do_bad_fiq
- b exception_exit
-
-_do_bad_error:
- exception_entry
- bl do_bad_error
- b exception_exit
-
-_do_sync:
- exception_entry
- bl do_sync
- b exception_exit
-
-_do_irq:
- exception_entry
- bl do_irq
- b exception_exit
-
-_do_fiq:
- exception_entry
- bl do_fiq
- b exception_exit
-
-_do_error:
- exception_entry
- bl do_error
- b exception_exit
exception_exit:
ldp x2, x0, [sp],#16
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1518616bfb5..ed85349d3fc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,7 +56,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb \
- meson-gxl-s905x-p212.dtb
+ meson-gxl-s905x-p212.dtb \
+ meson-gxl-s905x-libretech-cc.dtb \
+ meson-gxl-s905x-khadas-vim.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/bcm2835-rpi-zero-w.dts b/arch/arm/dts/bcm2835-rpi-zero-w.dts
new file mode 100644
index 00000000000..78170547752
--- /dev/null
+++ b/arch/arm/dts/bcm2835-rpi-zero-w.dts
@@ -0,0 +1,26 @@
+/dts-v1/;
+#include "bcm2835.dtsi"
+#include "bcm2835-rpi.dtsi"
+#include "bcm283x-rpi-smsc9512.dtsi"
+#include "bcm283x-rpi-usb-host.dtsi"
+
+/ {
+ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
+ model = "Raspberry Pi Zero W";
+
+ leds {
+ act {
+ gpios = <&gpio 47 0>;
+ };
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_gpio14>;
+ status = "okay";
+};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
new file mode 100644
index 00000000000..94567eb1787
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x-p212.dtsi"
+
+/ {
+ compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Khadas VIM";
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "Function";
+ linux,code = <KEY_FN>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ aliases {
+ serial2 = &uart_AO_B;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+
+ power {
+ label = "vim:red:power";
+ pwms = <&pwm_AO_ab 1 7812500 0>;
+ max-brightness = <255>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_A {
+ status = "okay";
+ pinctrl-0 = <&i2c_a_pins>;
+ pinctrl-names = "default";
+};
+
+&i2c_B {
+ status = "okay";
+ pinctrl-0 = <&i2c_b_pins>;
+ pinctrl-names = "default";
+
+ rtc: rtc@51 {
+ /* has to be enabled manually when a battery is connected: */
+ status = "disabled";
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-geekbox";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+ pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal> , <&xtal>;
+ clock-names = "clkin0", "clkin1" ;
+};
+
+&pwm_ef {
+ pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
+};
+
+&sd_emmc_a {
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
+&uart_AO {
+ status = "okay";
+};
+
+/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
+&uart_AO_B {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_b_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
new file mode 100644
index 00000000000..266fbcf3e47
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2017 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+#include "meson-gxl-s905x.dtsi"
+
+/ {
+ compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
+ model = "Libre Technology CC";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ label = "librecomputer:system-status";
+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
+ };
+
+ blue {
+ label = "librecomputer:blue";
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc_card: regulator-vcc-card {
+ compatible = "regulator-gpio";
+
+ regulator-name = "VCC_CARD";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <3300000 0>,
+ <1800000 1>;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&ethmac {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_card>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <50000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h
new file mode 100644
index 00000000000..3089f13ba00
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/eth.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MESON_ETH_H__
+#define __MESON_ETH_H__
+
+#include <phy.h>
+
+enum {
+ /* Use GXL Internal RMII PHY */
+ MESON_GXL_USE_INTERNAL_RMII_PHY = 1,
+};
+
+/* Configure the Ethernet MAC with the requested interface mode
+ * with some optional flags.
+ */
+void meson_gx_eth_init(phy_interface_t mode, unsigned int flags);
+
+#endif /* __MESON_ETH_H__ */
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
index 95a6fe6998e..ef63dea4496 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -7,10 +7,27 @@
#ifndef __GXBB_H__
#define __GXBB_H__
+#define GXBB_FIRMWARE_MEM_SIZE 0x1000000
+
+#define GXBB_AOBUS_BASE 0xc8100000
#define GXBB_PERIPHS_BASE 0xc8834400
#define GXBB_HIU_BASE 0xc883c000
#define GXBB_ETH_BASE 0xc9410000
+/* Always-On Peripherals registers */
+#define GXBB_AO_ADDR(off) (GXBB_AOBUS_BASE + ((off) << 2))
+
+#define GXBB_AO_SEC_GP_CFG0 GXBB_AO_ADDR(0x90)
+#define GXBB_AO_SEC_GP_CFG3 GXBB_AO_ADDR(0x93)
+#define GXBB_AO_SEC_GP_CFG4 GXBB_AO_ADDR(0x94)
+#define GXBB_AO_SEC_GP_CFG5 GXBB_AO_ADDR(0x95)
+
+#define GXBB_AO_MEM_SIZE_MASK 0xFFFF0000
+#define GXBB_AO_MEM_SIZE_SHIFT 16
+#define GXBB_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000
+#define GXBB_AO_BL31_RSVMEM_SIZE_SHIFT 16
+#define GXBB_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF
+
/* Peripherals registers */
#define GXBB_PERIPHS_ADDR(off) (GXBB_PERIPHS_BASE + ((off) << 2))
diff --git a/arch/arm/include/asm/arch-meson/mem.h b/arch/arm/include/asm/arch-meson/mem.h
new file mode 100644
index 00000000000..86a84170347
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/mem.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MESON_MEM_H__
+#define __MESON_MEM_H__
+
+/* Configure the reserved memory zones exported by the secure registers
+ * into EFI and DTB reserved memory entries.
+ */
+void meson_gx_init_reserved_memory(void *fdt);
+
+#endif /* __MESON_MEM_H__ */
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 6121aab547f..765914c7e26 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -43,6 +43,7 @@
#define PTE_TYPE_MASK (3 << 0)
#define PTE_TYPE_FAULT (0 << 0)
#define PTE_TYPE_TABLE (3 << 0)
+#define PTE_TYPE_PAGE (3 << 0)
#define PTE_TYPE_BLOCK (1 << 0)
#define PTE_TYPE_VALID (1 << 0)
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 7c9cfce69fa..cbcfeec2b03 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,6 +9,7 @@
#include <linux/compiler.h>
#include <efi_loader.h>
+DECLARE_GLOBAL_DATA_PTR;
int interrupt_init(void)
{
@@ -29,8 +30,13 @@ void show_regs(struct pt_regs *regs)
{
int i;
- printf("ELR: %lx\n", regs->elr);
- printf("LR: %lx\n", regs->regs[30]);
+ if (gd->flags & GD_FLG_RELOC) {
+ printf("ELR: %lx\n", regs->elr - gd->reloc_off);
+ printf("LR: %lx\n", regs->regs[30] - gd->reloc_off);
+ } else {
+ printf("ELR: %lx\n", regs->elr);
+ printf("LR: %lx\n", regs->regs[30]);
+ }
for (i = 0; i < 29; i += 2)
printf("x%-2d: %016lx x%-2d: %016lx\n",
i, regs->regs[i], i+1, regs->regs[i+1]);
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 69f7a4663cf..a78239d63e4 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -44,6 +44,22 @@ config TARGET_RPI
This option creates a build targetting the ARM1176 ISA.
select BCM2835
+config TARGET_RPI_0_W
+ bool "Raspberry Pi Zero W"
+ help
+ Support for all ARM1176-/BCM2835-based Raspberry Pi variants, such as
+ the RPi Zero model W.
+
+ This option assumes the VideoCore firmware is configured to use the
+ mini UART (rather than PL011) for the serial console. This is the
+ default on the RPi Zero W. To enable the UART console, the following
+ non-default option must be present in config.txt: enable_uart=1.
+ This is required for U-Boot to operate correctly, even if you only
+ care about the HDMI/usbkbd console.
+
+ This option creates a build targetting the ARMv7/AArch32 ISA.
+ select BCM2835
+
config TARGET_RPI_2
bool "Raspberry Pi 2"
help
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index d4bd230be3b..0350787daa7 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -38,6 +38,20 @@ config TARGET_P212
with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot,
eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module.
+config TARGET_LIBRETECH_CC
+ bool "LIBRETECH-CC"
+ help
+ LibreTech CC is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
+config TARGET_KHADAS_VIM
+ bool "KHADAS-VIM"
+ help
+ Khadas VIM is a single board computer based on Meson GXL
+ with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot,
+ eMMC, IR receiver and a 40-pin GPIO header.
+
endif
config SYS_SOC
@@ -50,4 +64,8 @@ source "board/amlogic/odroid-c2/Kconfig"
source "board/amlogic/p212/Kconfig"
+source "board/amlogic/libretech-cc/Kconfig"
+
+source "board/amlogic/khadas-vim/Kconfig"
+
endif
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index bf49b8b1e57..b4e8dded14c 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += board.o sm.o
+obj-y += board.o sm.o eth.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index e89c6aace98..908a0cae560 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -11,6 +11,9 @@
#include <asm/arch/sm.h>
#include <asm/armv8/mmu.h>
#include <asm/unaligned.h>
+#include <linux/sizes.h>
+#include <efi_loader.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -34,15 +37,70 @@ int dram_init(void)
return 0;
}
-int dram_init_banksize(void)
+phys_size_t get_effective_memsize(void)
{
- /* Reserve first 16 MiB of RAM for firmware */
- gd->bd->bi_dram[0].start = 0x1000000;
- gd->bd->bi_dram[0].size = 0xf000000;
- /* Reserve 2 MiB for ARM Trusted Firmware (BL31) */
- gd->bd->bi_dram[1].start = 0x10000000;
- gd->bd->bi_dram[1].size = gd->ram_size - 0x10200000;
- return 0;
+ /* Size is reported in MiB, convert it in bytes */
+ return ((readl(GXBB_AO_SEC_GP_CFG0) & GXBB_AO_MEM_SIZE_MASK)
+ >> GXBB_AO_MEM_SIZE_SHIFT) * SZ_1M;
+}
+
+static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
+{
+ int ret;
+
+ ret = fdt_add_mem_rsv(fdt, start, size);
+ if (ret)
+ printf("Could not reserve zone @ 0x%llx\n", start);
+
+ if (IS_ENABLED(CONFIG_EFI_LOADER)) {
+ efi_add_memory_map(start,
+ ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
+ EFI_RESERVED_MEMORY_TYPE, false);
+ }
+}
+
+void meson_gx_init_reserved_memory(void *fdt)
+{
+ u64 bl31_size, bl31_start;
+ u64 bl32_size, bl32_start;
+ u32 reg;
+
+ /*
+ * Get ARM Trusted Firmware reserved memory zones in :
+ * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
+ * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
+ * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
+ */
+
+ reg = readl(GXBB_AO_SEC_GP_CFG3);
+
+ bl31_size = ((reg & GXBB_AO_BL31_RSVMEM_SIZE_MASK)
+ >> GXBB_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
+ bl32_size = (reg & GXBB_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
+
+ bl31_start = readl(GXBB_AO_SEC_GP_CFG5);
+ bl32_start = readl(GXBB_AO_SEC_GP_CFG4);
+
+ /*
+ * Early Meson GXBB Firmware revisions did not provide the reserved
+ * memory zones in the registers, keep fixed memory zone handling.
+ */
+ if (IS_ENABLED(CONFIG_MESON_GXBB) &&
+ !reg && !bl31_start && !bl32_start) {
+ bl31_start = 0x10000000;
+ bl31_size = 0x200000;
+ }
+
+ /* Add first 16MiB reserved zone */
+ meson_board_add_reserved_memory(fdt, 0, GXBB_FIRMWARE_MEM_SIZE);
+
+ /* Add BL31 reserved zone */
+ if (bl31_start && bl31_size)
+ meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
+
+ /* Add BL32 reserved zone */
+ if (bl32_start && bl32_size)
+ meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
}
void reset_cpu(ulong addr)
diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
new file mode 100644
index 00000000000..2debe93952c
--- /dev/null
+++ b/arch/arm/mach-meson/eth.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/eth.h>
+#include <phy.h>
+
+/* Configure the Ethernet MAC with the requested interface mode
+ * with some optional flags.
+ */
+void meson_gx_eth_init(phy_interface_t mode, unsigned int flags)
+{
+ switch (mode) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ /* Set RGMII mode */
+ setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+ GXBB_ETH_REG_0_TX_PHASE(1) |
+ GXBB_ETH_REG_0_TX_RATIO(4) |
+ GXBB_ETH_REG_0_PHY_CLK_EN |
+ GXBB_ETH_REG_0_CLK_EN);
+ break;
+
+ case PHY_INTERFACE_MODE_RMII:
+ /* Set RMII mode */
+ out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+ GXBB_ETH_REG_0_CLK_EN);
+
+ /* Use GXL RMII Internal PHY */
+ if (IS_ENABLED(CONFIG_MESON_GXL) &&
+ (flags & MESON_GXL_USE_INTERNAL_RMII_PHY)) {
+ writel(GXBB_ETH_REG_2, 0x10110181);
+ writel(GXBB_ETH_REG_3, 0xe40908ff);
+ }
+
+ break;
+
+ default:
+ printf("Invalid Ethernet interface mode\n");
+ return;
+ }
+
+ /* Enable power and clock gate */
+ setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+ clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+}
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 2e8778043b7..d11670c0eee 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -215,6 +215,9 @@ void omap_die_id_usbethaddr(void)
mac[5] = (die_id[0] >> 8) & 0xff;
eth_env_set_enetaddr("usbethaddr", mac);
+
+ if (!env_get("ethaddr"))
+ eth_env_set_enetaddr("ethaddr", mac);
}
}
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-15 07:15:36 +0000