diff options
Diffstat (limited to 'arch')
97 files changed, 1114 insertions, 2285 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index f9aaf372478..abd406d4884 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -254,7 +254,6 @@ config X86 imply CMD_PCI imply CMD_SF imply CMD_SF_TEST - imply CMD_ZBOOT imply DM_GPIO imply DM_KEYBOARD imply DM_MMC diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile index 0eb44bcf33d..bde1c3d8af3 100644 --- a/arch/arc/lib/Makefile +++ b/arch/arc/lib/Makefile @@ -12,6 +12,6 @@ obj-y += reset.o obj-y += ints_low.o obj-y += init_helpers.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _millicodethunk.o libgcc2.o diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4cdf08dd695..23ee25269a2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1321,6 +1321,14 @@ config ARCH_ZYNQMP select SPL_DM_SPI_FLASH if SPL_DM_SPI select SPL_DM_MAILBOX if SPL imply SPL_FIRMWARE if SPL + imply SPL_FS_FAT if SPL + imply SPL_LIBCOMMON_SUPPORT if SPL + imply SPL_LIBDISK_SUPPORT if SPL + imply SPL_LIBGENERIC_SUPPORT if SPL + imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ + imply SPL_SERIAL if SPL + imply SPL_SPI if SPL && ZYNQ_QSPI + imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL imply ZYNQMP_IPI if DM_MAILBOX diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 697334086fd..57d06f0575d 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -326,6 +326,8 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, /* Going one level down */ if (pte_type(&table[i]) == PTE_TYPE_FAULT) set_pte_table(&table[i], create_table()); + else if (pte_type(&table[i]) != PTE_TYPE_TABLE) + split_block(&table[i], level); next_table = (u64 *)(table[i] & GENMASK_ULL(47, PAGE_SHIFT)); next_size = min(map_size - (virt & (map_size - 1)), size); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2634bb4c9ac..08dfbdd557b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1353,7 +1353,6 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ k3-am625-r5-sk.dtb \ k3-am625-beagleplay.dtb \ k3-am625-r5-beagleplay.dtb \ - k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-r5.dtb \ k3-am625-phyboard-lyra-rdk.dtb \ k3-am625-r5-phycore-som-2gb.dtb diff --git a/arch/arm/dts/k3-am62-verdin-dev.dtsi b/arch/arm/dts/k3-am62-verdin-dev.dtsi deleted file mode 100644 index 6701cb8974b..00000000000 --- a/arch/arm/dts/k3-am62-verdin-dev.dtsi +++ /dev/null @@ -1,240 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright 2023 Toradex - * - * Common dtsi for Verdin AM62 SoM on Development carrier board - * - * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 - * https://www.toradex.com/products/carrier-board/verdin-development-board-kit - */ - -/ { - sound { - compatible = "simple-audio-card"; - simple-audio-card,bitclock-master = <&codec_dai>; - simple-audio-card,format = "i2s"; - simple-audio-card,frame-master = <&codec_dai>; - simple-audio-card,name = "verdin-nau8822"; - simple-audio-card,routing = - "Headphones", "LHP", - "Headphones", "RHP", - "Speaker", "LSPK", - "Speaker", "RSPK", - "Line Out", "AUXOUT1", - "Line Out", "AUXOUT2", - "LAUX", "Line In", - "RAUX", "Line In", - "LMICP", "Mic In", - "RMICP", "Mic In"; - simple-audio-card,widgets = - "Headphones", "Headphones", - "Line Out", "Line Out", - "Speaker", "Speaker", - "Microphone", "Mic In", - "Line", "Line In"; - - codec_dai: simple-audio-card,codec { - clocks = <&audio_refclk1>; - sound-dai = <&nau8822_1a>; - }; - - simple-audio-card,cpu { - sound-dai = <&mcasp0>; - }; - }; -}; - -/* Verdin ETHs */ -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii1>, <&pinctrl_rgmii2>; - status = "okay"; -}; - -/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ -&cpsw3g_mdio { - status = "okay"; - - cpsw3g_phy1: ethernet-phy@7 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <7>; - interrupt-parent = <&main_gpio0>; - interrupts = <38 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eth2_rgmii_int>; - micrel,led-mode = <0>; - }; -}; - -/* Verdin ETH_1 (On-module PHY) */ -&cpsw_port1 { - status = "okay"; -}; - -/* Verdin ETH_2_RGMII */ -&cpsw_port2 { - phy-handle = <&cpsw3g_phy1>; - phy-mode = "rgmii-rxid"; - status = "okay"; -}; - -/* Verdin PWM_1, PWM_2 */ -&epwm0 { - status = "okay"; -}; - -/* Verdin PWM_3_DSI */ -&epwm1 { - status = "okay"; -}; - -&main_gpio0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ctrl_sleep_moci>, - <&pinctrl_gpio_5>, - <&pinctrl_gpio_6>, - <&pinctrl_gpio_7>, - <&pinctrl_gpio_8>; -}; - -/* Verdin I2C_1 */ -&main_i2c1 { - status = "okay"; - - /* Audio Codec */ - nau8822_1a: audio-codec@1a { - compatible = "nuvoton,nau8822"; - reg = <0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2s1_mclk>; - #sound-dai-cells = <0>; - }; - - /* IO Expander */ - gpio_expander_21: gpio@21 { - compatible = "nxp,pcal6416"; - reg = <0x21>; - #gpio-cells = <2>; - gpio-controller; - }; - - /* Current measurement into module VCC */ - hwmon@40 { - compatible = "ti,ina219"; - reg = <0x40>; - shunt-resistor = <10000>; - }; - - /* Temperature sensor */ - sensor@4f { - compatible = "ti,tmp75c"; - reg = <0x4f>; - }; - - /* EEPROM */ - eeprom@57 { - compatible = "st,24c02", "atmel,24c02"; - reg = <0x57>; - pagesize = <16>; - }; -}; - -/* Verdin I2C_2_DSI */ -&main_i2c2 { - status = "okay"; -}; - -/* Verdin I2C_4_CSI */ -&main_i2c3 { - status = "okay"; -}; - -/* Verdin CAN_1 */ -&main_mcan0 { - status = "okay"; -}; - -/* Verdin SPI_1 */ -&main_spi1 { - status = "okay"; -}; - -/* Verdin UART_3 */ -&main_uart0 { - status = "okay"; -}; - -/* Verdin UART_1, connector X50 through RS485 transceiver. */ -&main_uart1 { - linux,rs485-enabled-at-boot-time; - rs485-rx-during-tx; - status = "okay"; -}; - -/* Verdin I2S_1 */ -&mcasp0 { - status = "okay"; -}; - -&mcu_gpio0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_1>, - <&pinctrl_gpio_2>, - <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; -}; - -/* Verdin I2C_3_HDMI */ -&mcu_i2c0 { - status = "okay"; -}; - -/* Verdin CAN_2 */ -&mcu_mcan0 { - status = "okay"; -}; - -/* Verdin UART_4 */ -&mcu_uart0 { - status = "okay"; -}; - -/* Verdin QSPI_1 */ -&ospi0 { - status = "okay"; -}; - -/* Verdin SD_1 */ -&sdhci1 { - ti,driver-strength-ohm = <33>; - status = "okay"; -}; - -/* Verdin USB_1 */ -&usbss0 { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -/* Verdin USB_2 */ -&usbss1 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -/* Verdin CTRL_WAKE1_MICO# */ -&verdin_gpio_keys { - status = "okay"; -}; - -/* Verdin UART_2 */ -&wkup_uart0 { - /* FIXME: WKUP UART0 is used by DM firmware */ - status = "reserved"; -}; diff --git a/arch/arm/dts/k3-am62-verdin-wifi.dtsi b/arch/arm/dts/k3-am62-verdin-wifi.dtsi deleted file mode 100644 index a6808b10c7b..00000000000 --- a/arch/arm/dts/k3-am62-verdin-wifi.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright 2023 Toradex - * - * Common dtsi for Verdin AM62 SoM WB variant - * - * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 - */ - -/ { - wifi_pwrseq: wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wifi_en>; - reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>; - }; -}; - -/* On-module Wi-Fi */ -&sdhci2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci2>; - bus-width = <4>; - cap-power-off-card; - keep-power-in-suspend; - mmc-pwrseq = <&wifi_pwrseq>; - non-removable; - ti,fails-without-test-cd; - ti,driver-strength-ohm = <50>; - vmmc-supply = <®_3v3>; - status = "okay"; -}; - -/* On-module Bluetooth */ -&main_uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5>; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "nxp,88w8987-bt"; - fw-init-baudrate = <3000000>; - }; -}; diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi deleted file mode 100644 index 5db52f23725..00000000000 --- a/arch/arm/dts/k3-am62-verdin.dtsi +++ /dev/null @@ -1,1443 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright 2023 Toradex - * - * Common dtsi for Verdin AM62 SoM - * - * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/net/ti-dp83867.h> - -/ { - chosen { - stdout-path = "serial2:115200n8"; - }; - - aliases { - can0 = &main_mcan0; - can1 = &mcu_mcan0; - ethernet0 = &cpsw_port1; - ethernet1 = &cpsw_port2; - i2c0 = &main_i2c0; - i2c1 = &main_i2c1; - i2c2 = &main_i2c2; - i2c3 = &mcu_i2c0; - i2c4 = &main_i2c3; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - mmc2 = &sdhci2; - rtc0 = &rtc_i2c; - rtc1 = &wkup_rtc0; - serial0 = &main_uart1; - serial1 = &wkup_uart0; - serial2 = &main_uart0; - serial3 = &mcu_uart0; - serial4 = &main_uart5; - usb0 = &usb0; - usb1 = &usb1; - }; - - verdin_gpio_keys: gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ctrl_wake1_mico>; - status = "disabled"; - - verdin_key_wakeup: key-wakeup { - debounce-interval = <10>; - /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */ - gpios = <&main_gpio0 32 GPIO_ACTIVE_LOW>; - label = "Wake-Up"; - linux,code = <KEY_WAKEUP>; - wakeup-source; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */ - }; - - opp-table { - /* Add 1.4GHz OPP. Requires VDD_CORE to be at 0.85V */ - opp-1400000000 { - opp-hz = /bits/ 64 <1400000000>; - opp-supported-hw = <0x01 0x0004>; - clock-latency-ns = <6000000>; - }; - }; - - /* Module Power Supply */ - reg_vsodimm: regulator-vsodimm { - compatible = "regulator-fixed"; - regulator-name = "+V_SODIMM"; - }; - - /* Non PMIC On-module Supplies */ - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "On-module +V3.3"; - vin-supply = <®_vsodimm>; - }; - - reg_1v2_dsi: regulator-1v2-dsi { - compatible = "regulator-fixed"; - regulator-max-microvolt = <1200000>; - regulator-min-microvolt = <1200000>; - regulator-name = "On-module +V1.2_DSI"; - vin-supply = <®_1v8>; - }; - - /* Enabled by +V1.2_DSI */ - reg_1v8_dsi: regulator-1v8-dsi { - compatible = "regulator-fixed"; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "On-module +V1.8_DSI"; - vin-supply = <®_1v8>; - }; - - /* Enabled by +V2.5_ETH */ - reg_1v0_eth: regulator-1v0-eth { - compatible = "regulator-fixed"; - regulator-max-microvolt = <1000000>; - regulator-min-microvolt = <1000000>; - regulator-name = "On-module +V1.0_ETH"; - vin-supply = <®_1v8>; - }; - - /* Enabled by +V2.5_ETH */ - reg_1v8_eth: regulator-1v8-eth { - compatible = "regulator-fixed"; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "On-module +V1.8_ETH"; - vin-supply = <®_1v8>; - }; - - /* Verdin SD_1 Power Supply */ - reg_sdhc1_vmmc: regulator-sdhci1 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sd1_pwr_en>; - enable-active-high; - /* Verdin SD_1_PWR_EN (SODIMM 76) */ - gpio = <&main_gpio0 29 GPIO_ACTIVE_HIGH>; - off-on-delay-us = <100000>; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "+V3.3_SD"; - startup-delay-us = <2000>; - }; - - reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { - compatible = "regulator-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_vsel_sd>; - /* PMIC_VSEL_SD */ - gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; - regulator-name = "LDO1-VSEL-SD (PMIC)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - states = <1800000 0x0>, - <3300000 0x1>; - vin-supply = <®_sd_3v3_1v8>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - secure_tfa_ddr: tfa@9e780000 { - reg = <0x00 0x9e780000 0x00 0x80000>; - alignment = <0x1000>; - no-map; - }; - - secure_ddr: optee@9e800000 { - reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ - alignment = <0x1000>; - no-map; - }; - - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x9db00000 0x00 0xc00000>; - no-map; - }; - }; -}; - -&main_pmx0 { - /* Verdin PWM_1 */ - pinctrl_epwm0_a: main-epwm0a-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (A13) SPI0_CS0.EHRPWM0_A */ /* SODIMM 15 */ - >; - }; - - /* Verdin PWM_2 */ - pinctrl_epwm0_b: main-epwm0b-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */ /* SODIMM 16 */ - >; - }; - - /* Verdin PWM_3_DSI */ - pinctrl_epwm1_a: main-epwm1a-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (A14) SPI0_CLK.EHRPWM1_A */ /* SODIMM 19 */ - >; - }; - - /* Verdin QSPI_1_CLK as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_clk_gpio: main-gpio0-0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0000, PIN_INPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */ /* SODIMM 52 */ - >; - }; - - /* Verdin QSPI_1_IO0 as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_io0_gpio: main-gpio0-3-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x000c, PIN_INPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */ /* SODIMM 56 */ - >; - }; - - /* Verdin QSPI_1_IO1 as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_io1_gpio: main-gpio0-4-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */ /* SODIMM 58 */ - >; - }; - - /* Verdin QSPI_1_IO2 as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_io2_gpio: main-gpio0-5-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */ /* SODIMM 60 */ - >; - }; - - /* Verdin QSPI_1_IO3 as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_io3_gpio: main-gpio0-6-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */ /* SODIMM 62 */ - >; - }; - - /* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */ - >; - }; - - /* Verdin QSPI_1_CS2# as GPIO (conflict with Verdin QSPI_1 interface) */ - pinctrl_qspi1_cs2_gpio: main-gpio0-12-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */ /* SODIMM 64 */ - >; - }; - - /* WiFi_W_WKUP_HOST# */ - pinctrl_wifi_w_wkup_host: main-gpio0-15-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ /* SODIMM 174 */ - >; - }; - - /* WiFi_BT_WKUP_HOST# */ - pinctrl_bt_wkup_host: main-gpio0-16-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0040, PIN_INPUT, 7) /* (N23) GPMC0_AD1.GPIO0_16 */ /* SODIMM 172 */ - >; - }; - - /* PMIC_ETH_RESET# */ - pinctrl_eth_reset: main-gpio0-17-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0044, PIN_INPUT, 7) /* (N24) GPMC0_AD2.GPIO0_17 */ - >; - }; - - /* PMIC_BRIDGE_RESET# */ - pinctrl_bridge_reset: main-gpio0-20-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0050, PIN_INPUT, 7) /* (P22) GPMC0_AD5.GPIO0_20 */ - >; - }; - - /* PMIC_VSEL_SD */ - pinctrl_vsel_sd: main-gpio0-21-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0054, PIN_INPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */ - >; - }; - - /* PMIC_EN_WIFI */ - pinctrl_wifi_en: main-gpio0-22-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0058, PIN_INPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */ - >; - }; - - /* PMIC_ETH_INT# */ - pinctrl_eth_int: main-gpio0-25-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0064, PIN_INPUT_PULLUP, 7) /* (T25) GPMC0_AD10.GPIO0_25 */ - >; - }; - - /* WiFi_WKUP_BT# */ - pinctrl_wifi_wkup_bt: main-gpio0-26-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0068, PIN_INPUT, 7) /* (R21) GPMC0_AD11.GPIO0_26 */ - >; - }; - - /* WiFi_WKUP_WLAN# */ - pinctrl_wifi_wkup_wlan: main-gpio0-27-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x006c, PIN_INPUT, 7) /* (T22) GPMC0_AD12.GPIO0_27 */ - >; - }; - - /* Verdin SD_1_PWR_EN */ - pinctrl_sd1_pwr_en: main-gpio0-29-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0074, PIN_INPUT, 7) /* (U25) GPMC0_AD14.GPIO0_29 */ /* SODIMM 76 */ - >; - }; - - /* Verdin DSI_1_BKL_EN */ - pinctrl_dsi1_bkl_en: main-gpio0-30-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0078, PIN_INPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ /* SODIMM 21 */ - >; - }; - - /* Verdin CTRL_SLEEP_MOCI# */ - pinctrl_ctrl_sleep_moci: main-gpio0-31-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x007c, PIN_INPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ /* SODIMM 256 */ - >; - }; - - /* Verdin CTRL_WAKE1_MICO# */ - pinctrl_ctrl_wake1_mico: main-gpio0-32-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */ /* SODIMM 252 */ - >; - }; - - /* Verdin I2S_2_D_OUT as GPIO (conflict with Verdin I2S_2 interface) */ - pinctrl_i2s_2_d_out_gpio: main-gpio0-34-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x008c, PIN_INPUT, 7) /* (L25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */ - >; - }; - - /* Verdin I2S_2_BCLK as GPIO (conflict with Verdin I2S_2 interface) */ - pinctrl_i2s_2_bclk_gpio: main-gpio0-35-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0090, PIN_INPUT, 7) /* (M24) GPMC0_BE0n_CLE.GPIO0_35 */ /* SODIMM 42 */ - >; - }; - - /* Verdin GPIO_6 */ - pinctrl_gpio_6: main-gpio0-36-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0094, PIN_INPUT, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */ /* SODIMM 218 */ - >; - }; - - /* Verdin ETH_2_RGMII_INT# */ - pinctrl_eth2_rgmii_int: main-gpio0-38-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x009c, PIN_INPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */ /* SODIMM 189 */ - >; - }; - - /* Verdin GPIO_5 */ - pinctrl_gpio_5: main-gpio0-40-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */ /* SODIMM 216 */ - >; - }; - - /* Verdin GPIO_7 */ - pinctrl_gpio_7: main-gpio0-41-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x00a8, PIN_INPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */ /* SODIMM 220 */ - >; - }; - - /* Verdin GPIO_8 */ - pinctrl_gpio_8: main-gpio0-42-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */ /* SODIMM 222 */ - >; - }; - - /* Verdin USB_1_OC# */ - pinctrl_usb1_oc: main-gpio0-71-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0124, PIN_INPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */ /* SODIMM 157 */ - >; - }; - - /* Verdin USB_2_OC# */ - pinctrl_usb2_oc: main-gpio0-72-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ /* SODIMM 187 */ - >; - }; - - /* Verdin PWM_3_DSI as GPIO */ - pinctrl_pwm3_dsi_gpio: main-gpio1-17-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01bc, PIN_INPUT, 7) /* (A14) SPI0_CLK.GPIO1_17 */ /* SODIMM 19 */ - >; - }; - - /* Verdin QSPI_1_DQS as GPIO */ - pinctrl_qspi1_dqs_gpio: main-gpio1-18-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01c0, PIN_INPUT, 7) /* (B13) SPI0_D0.GPIO1_18 */ /* SODIMM 66 */ - >; - }; - - /* Verdin USB_1_ID */ - pinctrl_usb0_id: main-gpio1-19-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1.GPIO1_19 */ /* SODIMM 161 */ - >; - }; - - /* Verdin DSI_1_INT# (pulled-up as active-low) */ - pinctrl_dsi1_int: main-gpio1-49-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0244, PIN_INPUT_PULLUP, 7) /* (C17) MMC1_SDWP.GPIO1_49 */ /* SODIMM 17 */ - >; - }; - - /* On-module I2C - PMIC_I2C */ - pinctrl_i2c0: main-i2c0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01e0, PIN_INPUT, 0) /* (B16) I2C0_SCL */ /* PMIC_I2C_SCL */ - AM62X_IOPAD(0x01e4, PIN_INPUT, 0) /* (A16) I2C0_SDA */ /* PMIC_I2C_SDA */ - >; - }; - - /* Verdin I2C_1 */ - pinctrl_i2c1: main-i2c1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ /* SODIMM 14 */ - AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ /* SODIMM 12 */ - >; - }; - - /* Verdin I2C_2_DSI */ - pinctrl_i2c2: main-i2c2-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x00b0, PIN_INPUT, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */ - AM62X_IOPAD(0x00b4, PIN_INPUT, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */ - >; - }; - - /* Verdin I2C_4_CSI */ - pinctrl_i2c3: main-i2c3-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */ - AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */ - >; - }; - - /* I2S_1_MCLK */ - pinctrl_i2s1_mclk: main-system-audio-ext-reflock1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ /* SODIMM 38 */ - >; - }; - - /* Verdin I2S_1 */ - pinctrl_mcasp0: main-mcasp0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01a4, PIN_INPUT, 0) /* (B20) MCASP0_ACLKX */ /* SODIMM 30 */ - AM62X_IOPAD(0x01a8, PIN_INPUT, 0) /* (D20) MCASP0_AFSX */ /* SODIMM 32 */ - AM62X_IOPAD(0x01a0, PIN_OUTPUT, 0) /* (E18) MCASP0_AXR0 */ /* SODIMM 34 */ - AM62X_IOPAD(0x019c, PIN_INPUT, 0) /* (B18) MCASP0_AXR1 */ /* SODIMM 36 */ - >; - }; - - /* Verdin I2S_2 */ - pinctrl_mcasp1: main-mcasp1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ /* SODIMM 42 */ - AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ /* SODIMM 44 */ - AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEn.MCASP1_AXR0 */ /* SODIMM 46 */ - AM62X_IOPAD(0x0088, PIN_INPUT, 2) /* (L24) GPMC0_OEn_REn.MCASP1_AXR1 */ /* SODIMM 48 */ - >; - }; - - /* Verdin CAN_1 */ - pinctrl_mcan0: main-mcan0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ /* SODIMM 22 */ - AM62X_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ /* SODIMM 20 */ - >; - }; - - /* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ - pinctrl_mdio: main-mdio1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ /* ETH_1_MDC, SODIMM 193 */ - AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM 191 */ - >; - }; - - /* On-module eMMC */ - pinctrl_sdhci0: main-mmc0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ - AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ - AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */ - AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */ - AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */ - AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */ - AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */ - AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */ - AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */ - >; - }; - - /* Verdin SD_1 */ - pinctrl_sdhci1: main-mmc1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */ - AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */ - AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */ - AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */ - AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */ - AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */ - AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */ - >; - }; - - /* On-module Wi-Fi on WB SKUs, module-specific SDIO otherwise */ - pinctrl_sdhci2: main-mmc2-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ /* WiFi_SDIO_CMD */ - AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */ - AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ /* WiFi_SDIO_DATA0 */ - AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ /* WiFi_SDIO_DATA1 */ - AM62X_IOPAD(0x10c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */ /* WiFi_SDIO_DATA2 */ - AM62X_IOPAD(0x108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */ /* WiFi_SDIO_DATA3 */ - AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */ - >; - }; - - /* Verdin QSPI_1 */ - pinctrl_ospi0: main-ospi0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ /* SODIMM 52 */ - AM62X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ /* SODIMM 54 */ - AM62X_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G21) OSPI0_CSn1 */ /* SODIMM 64 */ - AM62X_IOPAD(0x000c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ /* SODIMM 56 */ - AM62X_IOPAD(0x0010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ /* SODIMM 58 */ - AM62X_IOPAD(0x0014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ /* SODIMM 60 */ - AM62X_IOPAD(0x0018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ /* SODIMM 62 */ - >; - }; - - /* Verdin ETH_1 RGMII (On-module PHY) */ - pinctrl_rgmii1: main-rgmii1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */ - AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */ - AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */ - AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */ - AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */ - AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */ - AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */ - AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */ - AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */ - AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */ - AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */ - AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ - >; - }; - - /* Verdin ETH_2 RGMII */ - pinctrl_rgmii2: main-rgmii2-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ /* SODIMM 201 */ - AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ /* SODIMM 203 */ - AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ /* SODIMM 205 */ - AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ /* SODIMM 207 */ - AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ /* SODIMM 197 */ - AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ /* SODIMM 199 */ - AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ /* SODIMM 221 */ - AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ /* SODIMM 219 */ - AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ /* SODIMM 217 */ - AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ /* SODIMM 215 */ - AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ /* SODIMM 213 */ - AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ /* SODIMM 211 */ - >; - }; - - /* Verdin SPI_1 */ - pinctrl_spi1: main-spi1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */ - AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */ - AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0 */ /* SODIMM 200 */ - AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1 */ /* SODIMM 198 */ - >; - }; - - /* ETH_25MHz_CLK */ - pinctrl_eth_clock: main-system-clkout0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */ - >; - }; - - /* PMIC_EXTINT# */ - pinctrl_pmic_extint: main-system-extint-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ - >; - }; - - /* Verdin UART_3, used as the Linux console */ - pinctrl_uart0: main-uart0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x1c8, PIN_INPUT_PULLUP, 0) /* (D14) UART0_RXD */ /* SODIMM 147 */ - AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ /* SODIMM 149 */ - >; - }; - - /* Verdin UART_1 */ - pinctrl_uart1: main-uart1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0194, PIN_INPUT_PULLUP, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ /* SODIMM 135 */ - AM62X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ /* SODIMM 133 */ - AM62X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ /* SODIMM 129 */ - AM62X_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ /* SODIMM 131 */ - >; - }; - - /* Bluetooth on WB SKUs, module-specific UART otherwise */ - pinctrl_uart5: main-uart5-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0008, PIN_INPUT_PULLUP, 5) /* (J24) OSPI0_DQS.UART5_CTSn */ /* WiFi_UART_CTS */ - AM62X_IOPAD(0x0004, PIN_OUTPUT, 5) /* (G25) OSPI0_LBCLKO.UART5_RTSn */ /* WiFi_UART_RTS */ - AM62X_IOPAD(0x0034, PIN_INPUT_PULLUP, 5) /* (H21) OSPI0_CSn2.UART5_RXD */ /* WiFi_UART_RXD */ - AM62X_IOPAD(0x0038, PIN_OUTPUT, 5) /* (E24) OSPI0_CSn3.UART5_TXD */ /* WiFi_UART_TXD */ - >; - }; - - /* Verdin USB_1 */ - pinctrl_usb0: main-usb0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0254, PIN_OUTPUT, 0) /* (C20) USB0_DRVVBUS */ /* SODIMM 155 */ - >; - }; - - /* Verdin USB_2 */ - pinctrl_usb1: main-usb1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ /* SODIMM 185 */ - >; - }; - - /* DSS VOUT0 RGB */ - pinctrl_parallel_rgb: main-vout-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */ - AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ - AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */ - AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */ - AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ - AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */ - AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */ - AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */ - AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */ - AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */ - AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */ - AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */ - AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */ - AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */ - AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */ - AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */ - AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */ - AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */ - AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */ - AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */ - AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */ - AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */ - >; - }; -}; - -&mcu_pmx0 { - /* Verdin PCIE_1_RESET# */ - pinctrl_pcie_1_reset: mcu-gpio0-0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0000, PIN_INPUT, 7) /* (E8) MCU_SPI0_CS0.MCU_GPIO0_0 */ /* SODIMM 244 */ - >; - }; - - /* Verdin GPIO_1 */ - pinctrl_gpio_1: mcu-gpio0-1-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0004, PIN_INPUT, 7) /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 */ /* SODIMM 206 */ - >; - }; - - /* Verdin GPIO_2 */ - pinctrl_gpio_2: mcu-gpio0-2-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0008, PIN_INPUT, 7) /* (A7) MCU_SPI0_CLK.MCU_GPIO0_2 */ /* SODIMM 208 */ - >; - }; - - /* Verdin GPIO_3 */ - pinctrl_gpio_3: mcu-gpio0-3-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x000c, PIN_INPUT, 7) /* (D9) MCU_SPI0_D0.MCU_GPIO0_3 */ /* SODIMM 210 */ - >; - }; - - /* Verdin GPIO_4 */ - pinctrl_gpio_4: mcu-gpio0-4-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (C9) MCU_SPI0_D1.MCU_GPIO0_4 */ /* SODIMM 212 */ - >; - }; - - /* Verdin I2C_3_HDMI */ - pinctrl_mcu_i2c0: mcu-i2c0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */ /* SODIMM 59 */ - AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */ - >; - }; - - /* Verdin CAN_2 */ - pinctrl_mcu_mcan0: mcu-mcan0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */ - AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */ - >; - }; - - /* Verdin UART_4 - Reserved to Cortex-M4 */ - pinctrl_mcu_uart0: mcu-uart0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0014, PIN_INPUT_PULLUP, 0) /* (B5) MCU_UART0_RXD */ /* SODIMM 151 */ - AM62X_MCU_IOPAD(0x0018, PIN_OUTPUT, 0) /* (A5) MCU_UART0_TXD */ /* SODIMM 153 */ - >; - }; - - /* Verdin CSI_1_MCLK */ - pinctrl_csi1_mclk: wkup-clkout0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (A12) WKUP_CLKOUT0 */ /* SODIMM 91 */ - >; - }; - - /* Verdin UART_2 */ - pinctrl_wkup_uart0: wkup-uart0-default-pins { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x002c, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */ - AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */ - AM62X_MCU_IOPAD(0x0024, PIN_INPUT_PULLUP, 0) /* (B4) WKUP_UART0_RXD */ /* SODIMM 137 */ - AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ /* SODIMM 139 */ - >; - }; -}; - -/* VERDIN I2S_1_MCLK */ -&audio_refclk1 { - assigned-clock-rates = <25000000>; -}; - -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii1>; - status = "disabled"; -}; - -/* Verdin ETH_1 (On-module PHY) */ -&cpsw_port1 { - phy-handle = <&cpsw3g_phy0>; - phy-mode = "rgmii-rxid"; - status = "disabled"; -}; - -/* Verdin ETH_2_RGMII */ -&cpsw_port2 { - status = "disabled"; -}; - -/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ -&cpsw3g_mdio { - assigned-clocks = <&k3_clks 157 20>; - assigned-clock-parents = <&k3_clks 157 22>; - assigned-clock-rates = <25000000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eth_clock>, <&pinctrl_mdio>; - status = "disabled"; - - cpsw3g_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id2000.a231"; - reg = <0>; - interrupt-parent = <&main_gpio0>; - interrupts = <25 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eth_int>, <&pinctrl_eth_reset>; - reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_LOW>; - reset-assert-us = <10>; - reset-deassert-us = <1000>; - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; - }; -}; - -&dss { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_parallel_rgb>; - status = "disabled"; -}; - -&dss_ports { - #address-cells = <1>; - #size-cells = <0>; - - /* VP2: DPI Output */ - port@1 { - reg = <1>; - - dpi_out: endpoint { - remote-endpoint = <&rgb_in>; - }; - }; -}; - -/* Verdin PWM_1, PWM_2 */ -&epwm0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_epwm0_a>, <&pinctrl_epwm0_b>; - status = "disabled"; -}; - -/* Verdin PWM_3_DSI */ -&epwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_epwm1_a>; - status = "disabled"; -}; - -&main_gpio0 { - gpio-line-names = - "SODIMM_52", /* 0 */ - "", - "", - "SODIMM_56", - "SODIMM_58", - "SODIMM_60", - "SODIMM_62", - "", - "", - "", - "", /* 10 */ - "SODIMM_54", - "SODIMM_64", - "", - "", - "SODIMM_174", - "SODIMM_172", - "", - "", - "", - "", /* 20 */ - "", - "", - "", - "", - "", - "", - "", - "", - "SODIMM_76", - "SODIMM_21", /* 30 */ - "SODIMM_256", - "SODIMM_252", - "", - "SODIMM_46", - "SODIMM_42", - "SODIMM_218", - "", - "SODIMM_189", - "", - "SODIMM_216", /* 40 */ - "SODIMM_220", - "SODIMM_222", - "", - "", - "", - "", - "", - "", - "", - "", /* 50 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 60 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 70 */ - "SODIMM_157", - "SODIMM_187", - "", - "", - "", - "", - "", - "", - "", - "", /* 80 */ - "", - "", - "", - "", - "", - ""; - - verdin_ctrl_sleep_moci: ctrl-sleep-moci-hog { - gpio-hog; - /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ - gpios = <31 GPIO_ACTIVE_HIGH>; - line-name = "CTRL_SLEEP_MOCI#"; - output-high; - }; -}; - -&main_gpio1 { - gpio-line-names = - "", /* 0 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 10 */ - "", - "", - "", - "", - "SODIMM_15", - "SODIMM_16", - "SODIMM_19", - "SODIMM_66", - "SODIMM_161", - "", /* 20 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 30 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 40 */ - "", - "", - "", - "", - "", - "", - "", - "", - "SODIMM_17", - "", /* 50 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 60 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 70 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 80 */ - "", - "", - "", - "", - "", - "", - ""; -}; - -/* On-module I2C - PMIC_I2C */ -&main_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clock-frequency = <400000>; - status = "okay"; - - dsi_bridge: dsi@e { - compatible = "toshiba,tc358778"; - reg = <0xe>; - assigned-clocks = <&k3_clks 157 20>; - assigned-clock-parents = <&k3_clks 157 22>; - assigned-clock-rates = <25000000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_bridge_reset>; - clocks = <&k3_clks 157 20>; - clock-names = "refclk"; - reset-gpios = <&main_gpio0 20 GPIO_ACTIVE_LOW>; - vddc-supply = <®_1v2_dsi>; - vddmipi-supply = <®_1v2_dsi>; - vddio-supply = <®_1v8_dsi>; - status = "disabled"; - - dsi_bridge_ports: ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - rgb_in: endpoint { - data-lines = <18>; - remote-endpoint = <&dpi_out>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - pmic@30 { - compatible = "ti,tps65219"; - reg = <0x30>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic_extint>; - interrupt-parent = <&gic500>; - interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; - - buck1-supply = <®_vsodimm>; - buck2-supply = <®_vsodimm>; - buck3-supply = <®_vsodimm>; - ldo1-supply = <®_3v3>; - ldo2-supply = <®_1v8>; - ldo3-supply = <®_3v3>; - ldo4-supply = <®_3v3>; - system-power-controller; - ti,power-button; - - regulators { - reg_vdd_core: buck1 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <850000>; - regulator-min-microvolt = <850000>; - regulator-name = "+VDD_CORE (PMIC BUCK1)"; - }; - - reg_1v8: buck2 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "+V1.8 (PMIC BUCK2)"; /* On-module and SODIMM 214 */ - }; - - reg_vdd_ddr: buck3 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1100000>; - regulator-min-microvolt = <1100000>; - regulator-name = "+VDD_DDR (PMIC BUCK3)"; - }; - - reg_sd_3v3_1v8: ldo1 { - regulator-allow-bypass; - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "+V3.3_1.8_SD (PMIC LDO1)"; - }; - - reg_vddr_core: ldo2 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <850000>; - regulator-min-microvolt = <850000>; - regulator-name = "+VDDR_CORE (PMIC LDO2)"; - }; - - reg_1v8a: ldo3 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "+V1.8A (PMIC LDO3)"; - }; - - reg_eth_2v5: ldo4 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <2500000>; - regulator-min-microvolt = <2500000>; - regulator-name = "+V2.5_ETH (PMIC LDO4)"; - }; - }; - }; - - rtc_i2c: rtc@32 { - compatible = "epson,rx8130"; - reg = <0x32>; - }; - - sensor@48 { - compatible = "ti,tmp1075"; - reg = <0x48>; - }; - - adc@49 { - compatible = "ti,ads1015"; - reg = <0x49>; - #address-cells = <1>; - #size-cells = <0>; - - /* Verdin PMIC_I2C (ADC_4 - ADC_3) */ - channel@0 { - reg = <0>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C (ADC_4 - ADC_1) */ - channel@1 { - reg = <1>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C (ADC_3 - ADC_1) */ - channel@2 { - reg = <2>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C (ADC_2 - ADC_1) */ - channel@3 { - reg = <3>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C ADC_4 */ - channel@4 { - reg = <4>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C ADC_3 */ - channel@5 { - reg = <5>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C ADC_2 */ - channel@6 { - reg = <6>; - ti,datarate = <4>; - ti,gain = <2>; - }; - - /* Verdin PMIC_I2C ADC_1 */ - channel@7 { - reg = <7>; - ti,datarate = <4>; - ti,gain = <2>; - }; - }; - - eeprom@50 { - compatible = "st,24c02", "atmel,24c02"; - pagesize = <16>; - reg = <0x50>; - }; -}; - -/* Verdin I2C_1 */ -&main_i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "disabled"; -}; - -/* Verdin I2C_2_DSI */ -&main_i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "disabled"; -}; - -/* Verdin I2C_4_CSI */ -&main_i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - status = "disabled"; -}; - -&mailbox0_cluster0 { - mbox_m4_0: mbox-m4-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -/* Verdin CAN_1 */ -&main_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcan0>; - status = "disabled"; -}; - -/* Verdin SPI_1 */ -&main_spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - ti,pindir-d0-out-d1-in; - status = "disabled"; -}; - -/* Verdin UART_3, used as the Linux console */ -&main_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - status = "disabled"; -}; - -/* Verdin UART_1 */ -&main_uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "disabled"; -}; - -/* Verdin I2S_1 */ -&mcasp0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcasp0>; - op-mode = <0>; /* I2S mode */ - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 1 2 0 0 - 0 0 0 0 - 0 0 0 0 - 0 0 0 0 - >; - tdm-slots = <2>; - rx-num-evt = <32>; - tx-num-evt = <32>; - #sound-dai-cells = <0>; - status = "disabled"; -}; - -/* Verdin I2S_2 */ -&mcasp1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcasp1>; - op-mode = <0>; /* I2S mode */ - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 1 2 0 0 - 0 0 0 0 - 0 0 0 0 - 0 0 0 0 - >; - tdm-slots = <2>; - rx-num-evt = <32>; - tx-num-evt = <32>; - #sound-dai-cells = <0>; - status = "disabled"; -}; - -/* Verdin I2C_3_HDMI */ -&mcu_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcu_i2c0>; - status = "disabled"; -}; - -&mcu_gpio0 { - gpio-line-names = - "SODIMM_244", - "SODIMM_206", - "SODIMM_208", - "SODIMM_210", - "SODIMM_212", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", - ""; -}; - -/* Verdin CAN_2 */ -&mcu_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcu_mcan0>; - status = "disabled"; -}; - -/* Verdin UART_4 - Cortex-M4 UART */ -&mcu_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mcu_uart0>; - status = "disabled"; -}; - -/* Verdin QSPI_1 */ -&ospi0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ospi0>; - status = "disabled"; -}; - -/* On-module eMMC */ -&sdhci0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci0>; - non-removable; - ti,driver-strength-ohm = <50>; - status = "okay"; -}; - -/* Verdin SD_1 */ -&sdhci1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci1>; - disable-wp; - ti,driver-strength-ohm = <50>; - vmmc-supply = <®_sdhc1_vmmc>; - vqmmc-supply = <®_sdhc1_vqmmc>; - status = "disabled"; -}; - -/* Verdin USB_1 */ -&usbss0 { - ti,vbus-divider; - status = "disabled"; -}; - -/* TODO: role swich using ID pin */ -&usb0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb0_id>; - status = "disabled"; -}; - -/* Verdin USB_2 */ -&usbss1 { - ti,vbus-divider; - status = "disabled"; -}; - -&usb1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - dr_mode = "host"; - status = "disabled"; -}; - -/* Verdin UART_2 */ -&wkup_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wkup_uart0>; - status = "disabled"; -}; diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi index cca0f44b7d8..fb2032068d1 100644 --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi @@ -41,13 +41,6 @@ clock-frequency = <25000000>; }; -&dmsc { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; -}; - &sd_pins_default { /* Force to use SDCD card detect pin */ pinctrl-single,pins = < diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi index f6138f3058f..94162282068 100644 --- a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi @@ -42,13 +42,6 @@ bootph-all; }; -&dmsc { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; -}; - &fss { bootph-all; }; diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi index 5b058bd03a0..dfd38d64f63 100644 --- a/arch/arm/dts/k3-am625-sk-binman.dtsi +++ b/arch/arm/dts/k3-am625-sk-binman.dtsi @@ -151,11 +151,107 @@ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f"; }; }; + + tifsstub-hs { + filename = "tifsstub.bin_hs"; + ti-secure-rom { + content = <&tifsstub_hs_cert>; + core = "secure"; + load = <0x40000>; + sw-rev = <CONFIG_K3_X509_SWRV>; + keyfile = "custMpk.pem"; + countersign; + tifsstub; + }; + tifsstub_hs_cert: tifsstub-hs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_hs_enc: tifsstub-hs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + + tifsstub-fs { + filename = "tifsstub.bin_fs"; + tifsstub_fs_cert: tifsstub-fs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_fs_enc: tifsstub-fs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + }; + + tifsstub-gp { + filename = "tifsstub.bin_gp"; + ti-secure-rom { + content = <&tifsstub_gp>; + core = "secure"; + load = <0x60000>; + sw-rev = <CONFIG_K3_X509_SWRV>; + keyfile = "ti-degenerate-key.pem"; + tifsstub; + }; + tifsstub_gp: tifsstub-gp.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin"; + type = "blob-ext"; + optional; + }; + }; + ti-spl { insert-template = <&ti_spl_template>; fit { images { + + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + + tifsstub-gp { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { ti-secure { content = <&dm>; @@ -189,7 +285,8 @@ conf-0 { description = "k3-am625-sk"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; @@ -247,6 +344,45 @@ fit { images { + tifsstub-hs { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + + tifsstub-fs { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + + tifsstub-gp { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { ti-dm { filename = "ti-dm.bin"; @@ -270,7 +406,8 @@ conf-0 { description = "k3-am625-sk"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi index 4e3704809a6..6f5845024f2 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi @@ -140,7 +140,7 @@ #ifdef CONFIG_TARGET_VERDIN_AM62_A53 -#define SPL_VERDIN_AM62_DTB "spl/dts/k3-am625-verdin-wifi-dev.dtb" +#define SPL_VERDIN_AM62_DTB "spl/dts/ti/k3-am625-verdin-wifi-dev.dtb" #define VERDIN_AM62_DTB "u-boot.dtb" &binman { diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi index 28b697b67ae..7fe7ae41543 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi @@ -85,13 +85,6 @@ bootph-all; }; -&dmsc { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; -}; - &fss { bootph-all; }; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev.dts b/arch/arm/dts/k3-am625-verdin-wifi-dev.dts deleted file mode 100644 index 4b657d6d3e0..00000000000 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev.dts +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright 2023 Toradex - * - * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 - * https://www.toradex.com/products/carrier-board/verdin-development-board-kit - */ - -/dts-v1/; - -#include "k3-am625.dtsi" -#include "k3-am62-verdin.dtsi" -#include "k3-am62-verdin-wifi.dtsi" -#include "k3-am62-verdin-dev.dtsi" - -/ { - model = "Toradex Verdin AM62 WB on Verdin Development Board"; - compatible = "toradex,verdin-am62-wifi-dev", - "toradex,verdin-am62-wifi", - "toradex,verdin-am62", - "ti,am625"; -}; diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi index 31b89b41748..c42dec16194 100644 --- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi @@ -119,10 +119,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &vdd_mmc1 { diff --git a/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi b/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi index c166d655390..cf087c6e343 100644 --- a/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi @@ -15,9 +15,4 @@ &dmsc { bootph-pre-ram; - - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-pre-ram; - }; }; diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi index ee6656774d6..705b3baa81c 100644 --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi @@ -23,13 +23,6 @@ bootph-all; }; -&dmsc { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; -}; - &sdhci0 { bootph-all; }; diff --git a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi index 5dfc40a843b..4677c35e2d9 100644 --- a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi @@ -29,10 +29,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &dmss { diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index 7e6b2981346..6fcb11bd04d 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -15,13 +15,6 @@ clock-frequency = <200000000>; }; -&dmsc { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; -}; - &sdhci0 { status = "disabled"; }; diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi index d53f133cd63..b6d2c816acc 100644 --- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi @@ -99,10 +99,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &k3_pds { diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi index 4f34347586e..b8fc62f0dd1 100644 --- a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi @@ -51,10 +51,6 @@ &sms { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &main_pmx0 { diff --git a/arch/arm/dts/k3-am69-sk-u-boot.dtsi b/arch/arm/dts/k3-am69-sk-u-boot.dtsi index bed330e6d4e..4a82d2fd222 100644 --- a/arch/arm/dts/k3-am69-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am69-sk-u-boot.dtsi @@ -23,13 +23,6 @@ bootph-pre-ram; }; -&sms { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-pre-ram; - }; -}; - #ifdef CONFIG_TARGET_J784S4_A72_EVM #define SPL_AM69_SK_DTB "spl/dts/ti/k3-am69-sk.dtb" diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index c9fee0ea99b..485f17c5f06 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -57,10 +57,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &k3_pds { diff --git a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi index 116ee373118..e202ae16644 100644 --- a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi @@ -92,10 +92,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &k3_pds { diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 9433f3bafae..aa919b40702 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -47,10 +47,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &k3_pds { diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi index 8b205553cdf..8f4f944263e 100644 --- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi @@ -47,10 +47,6 @@ &dmsc { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &k3_pds { diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi index a3ebf5996ea..19b2d48c7f8 100644 --- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi @@ -51,10 +51,6 @@ &sms { bootph-all; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-all; - }; }; &main_pmx0 { diff --git a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi index ac749782bfc..8f0307321e8 100644 --- a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi @@ -22,10 +22,3 @@ "tchanrt", "rflow"; bootph-pre-ram; }; - -&sms { - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - bootph-pre-ram; - }; -}; diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts index e0517cf4601..5889d436edb 100644 --- a/arch/arm/dts/zynqmp-mini-nand.dts +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -50,6 +50,12 @@ #size-cells = <1>; arasan,has-mdma; num-cs = <2>; + nand@0 { + reg = <0>; + #address-cells = <2>; + #size-cells = <1>; + nand-ecc-mode = "hw"; + }; }; }; }; diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts index 8517bdad6f4..c1d713b5d89 100644 --- a/arch/arm/dts/zynqmp-sc-revB.dts +++ b/arch/arm/dts/zynqmp-sc-revB.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - fwuen { + key-fwuen { label = "sw16"; gpios = <&gpio 12 GPIO_ACTIVE_LOW>; linux,code = <BTN_MISC>; @@ -192,7 +192,7 @@ status = "okay"; /* QSPI should also have PINCTRL setup */ flash@0 { - compatible = "mt25qu512a", "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */ + compatible = "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */ #address-cells = <1>; #size-cells = <1>; reg = <0>; diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso index 5202b7c4819..1727a1cc15c 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso @@ -356,6 +356,8 @@ &uart0 { status = "okay"; + rts-gpios = <&gpio 72 GPIO_ACTIVE_HIGH>; + linux,rs485-enabled-at-boot-time; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0_default>; assigned-clock-rates = <100000000>; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 6c29f657413..0a0cbd2b69a 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -66,6 +66,18 @@ #clock-cells = <0>; clock-frequency = <74250000>; }; + + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ @@ -130,6 +142,14 @@ phy-names = "dp-phy0"; phys = <&psgtr 1 PHY_TYPE_DP 0 1>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; + + ports { + port@5 { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; + }; + }; }; &zynqmp_dpdma { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index 6d0d5c487d2..561b546e37f 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -342,6 +342,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; conf-cd { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index a4b4465d203..64683e0ccbb 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -63,6 +63,18 @@ #clock-cells = <0>; clock-frequency = <27000000>; }; + + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -97,6 +109,14 @@ phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; + + ports { + port@5 { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; + }; + }; }; &zynqmp_dpdma { @@ -329,6 +349,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; conf-cd { diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts index 2a3bbe17047..b626d1aacf5 100644 --- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts +++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts @@ -47,7 +47,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - j383 { + key-j383 { label = "j383"; gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; linux,code = <BTN_MISC>; diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts index e0e4f1b13ad..e0632883e4e 100644 --- a/arch/arm/dts/zynqmp-vpk120-revA.dts +++ b/arch/arm/dts/zynqmp-vpk120-revA.dts @@ -47,7 +47,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw16 { + button-16 { label = "sw16"; gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; linux,code = <BTN_MISC>; diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index b97f7ee8d44..48ab619472e 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -136,8 +136,7 @@ reg = <0x0>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-0"; nand-ecc-step-size = <1024>; @@ -173,8 +172,7 @@ reg = <0x1>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-1"; nand-ecc-step-size = <1024>; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index b4e24745a9a..a113e475082 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -46,7 +46,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw19 { + switch-19 { label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <KEY_DOWN>; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 6f593e80841..4d7d5d2e5ef 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -46,7 +46,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw19 { + switch-19 { label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <KEY_DOWN>; diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts b/arch/arm/dts/zynqmp-zcu670-revA.dts index 7f70904f44e..def3b53cef7 100644 --- a/arch/arm/dts/zynqmp-zcu670-revA.dts +++ b/arch/arm/dts/zynqmp-zcu670-revA.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw1 { + switch-1 { label = "sw1"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <BTN_MISC>; diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts b/arch/arm/dts/zynqmp-zcu670-revB.dts index 0adb2062aef..41f9a23d06a 100644 --- a/arch/arm/dts/zynqmp-zcu670-revB.dts +++ b/arch/arm/dts/zynqmp-zcu670-revB.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw1 { + switch-1 { label = "sw1"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <BTN_MISC>; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b50b83b7723..53a606c340a 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -168,7 +168,7 @@ bootph-all; }; - pmu { + pmu: pmu { compatible = "arm,armv8-pmuv3"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, @@ -1001,14 +1001,14 @@ status = "disabled"; reg = <0x0 0xfe200000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; /* iommus = <&smmu 0x860>; */ snps,quirk-frame-length-adjustment = <0x20>; clock-names = "ref"; - snps,enable_guctl1_ipd_quirk; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -1033,14 +1033,14 @@ status = "disabled"; reg = <0x0 0xfe300000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; /* iommus = <&smmu 0x861>; */ snps,quirk-frame-length-adjustment = <0x20>; clock-names = "ref"; - snps,enable_guctl1_ipd_quirk; snps,resume-hs-terminations; /* dma-coherent; */ }; diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 67275fba616..b55167e9cc0 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -31,7 +31,7 @@ endif obj-$(CONFIG_CPU_V7M) += cmd_boot.o obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o zimage.o else obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 6ee9864c72c..1bd523329a4 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -25,3 +25,4 @@ obj-$(CONFIG_SOC_K3_J784S4) += j784s4_init.o obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o endif obj-y += common.o security.o +obj-$(CONFIG_SOC_K3_AM625) += am62x/ diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index 6c96e881146..668f9a51ef4 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -14,6 +14,7 @@ #include <dm.h> #include <dm/uclass-internal.h> #include <dm/pinctrl.h> +#include <dm/ofnode.h> #define RTC_BASE_ADDRESS 0x2b1f0000 #define REG_K3RTC_S_CNT_LSW (RTC_BASE_ADDRESS + 0x18) @@ -24,6 +25,9 @@ #define K3RTC_KICK0_UNLOCK_VALUE 0x83e70b13 #define K3RTC_KICK1_UNLOCK_VALUE 0x95a4f1e0 +/* TISCI DEV ID for A53 Clock */ +#define AM62X_DEV_A53SS0_CORE_0_DEV_ID 135 + /* * This uninitialized global variable would normal end up in the .bss section, * but the .bss is cleared between writing and reading this variable, so move @@ -112,6 +116,62 @@ static __maybe_unused void rtc_erratumi2327_init(void) writel(K3RTC_KICK1_UNLOCK_VALUE, REG_K3RTC_KICK1); } +#if CONFIG_IS_ENABLED(OF_CONTROL) +static int get_a53_cpu_clock_index(ofnode node) +{ + int count, i; + struct ofnode_phandle_args *args; + ofnode clknode; + + clknode = ofnode_path("/bus@f0000/system-controller@44043000/clock-controller"); + if (!ofnode_valid(clknode)) + return -1; + + count = ofnode_count_phandle_with_args(node, "assigned-clocks", "#clock-cells", 0); + + for (i = 0; i < count; i++) { + if (!ofnode_parse_phandle_with_args(node, "assigned-clocks", + "#clock-cells", 0, i, args)) { + if (ofnode_equal(clknode, args->node) && + args->args[0] == AM62X_DEV_A53SS0_CORE_0_DEV_ID) + return i; + } + } + + return -1; +} + +static void fixup_a53_cpu_freq_by_speed_grade(void) +{ + int index, size; + u32 *rates; + ofnode node; + + node = ofnode_path("/a53@0"); + if (!ofnode_valid(node)) + return; + + rates = fdt_getprop_w(ofnode_to_fdt(node), ofnode_to_offset(node), + "assigned-clock-rates", &size); + + index = get_a53_cpu_clock_index(node); + + if (!rates || index < 0 || index >= (size / sizeof(u32))) { + printf("Wrong A53 assigned-clocks configuration\n"); + return; + } + + rates[index] = cpu_to_fdt32(k3_get_a53_max_frequency()); + + printf("Changed A53 CPU frequency to %dHz (%c grade) in DT\n", + k3_get_a53_max_frequency(), k3_get_speed_grade()); +} +#else +static void fixup_a53_cpu_freq_by_speed_grade(void) +{ +} +#endif + void board_init_f(ulong dummy) { struct udevice *dev; @@ -176,6 +236,14 @@ void board_init_f(ulong dummy) } /* + * Relocate boot information to OCRAM (after TIFS has opend this + * region for us) so the next bootloader stages can keep access to + * primary vs backup bootmodes. + */ + if (IS_ENABLED(CONFIG_CPU_V7R)) + writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM); + + /* * Force probe of clk_k3 driver here to ensure basic default clock * configuration is always done. */ @@ -210,6 +278,8 @@ void board_init_f(ulong dummy) panic("DRAM init failed: %d\n", ret); } spl_enable_cache(); + + fixup_a53_cpu_freq_by_speed_grade(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) @@ -235,100 +305,7 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) } } -static u32 __get_backup_bootmedia(u32 devstat) -{ - u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; - u32 bkup_bootmode_cfg = - (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; - - switch (bkup_bootmode) { - case BACKUP_BOOT_DEVICE_UART: - return BOOT_DEVICE_UART; - - case BACKUP_BOOT_DEVICE_USB: - return BOOT_DEVICE_USB; - - case BACKUP_BOOT_DEVICE_ETHERNET: - return BOOT_DEVICE_ETHERNET; - - case BACKUP_BOOT_DEVICE_MMC: - if (bkup_bootmode_cfg) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BACKUP_BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BACKUP_BOOT_DEVICE_I2C: - return BOOT_DEVICE_I2C; - - case BACKUP_BOOT_DEVICE_DFU: - if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - }; - - return BOOT_DEVICE_RAM; -} - -static u32 __get_primary_bootmedia(u32 devstat) -{ - u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; - u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; - - switch (bootmode) { - case BOOT_DEVICE_OSPI: - fallthrough; - case BOOT_DEVICE_QSPI: - fallthrough; - case BOOT_DEVICE_XSPI: - fallthrough; - case BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BOOT_DEVICE_ETHERNET_RGMII: - fallthrough; - case BOOT_DEVICE_ETHERNET_RMII: - return BOOT_DEVICE_ETHERNET; - - case BOOT_DEVICE_EMMC: - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_MMC: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> - MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_DFU: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BOOT_DEVICE_NOBOOT: - return BOOT_DEVICE_RAM; - } - - return bootmode; -} - u32 spl_boot_device(void) { - u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); - u32 bootmedia; - - if (bootindex == K3_PRIMARY_BOOTMODE) - bootmedia = __get_primary_bootmedia(devstat); - else - bootmedia = __get_backup_bootmedia(devstat); - - debug("am625_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n", - __func__, devstat, bootmedia, bootindex); - - return bootmedia; + return get_boot_device(); } diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig index 7c9bac2ece8..9786751874d 100644 --- a/arch/arm/mach-k3/am62x/Kconfig +++ b/arch/arm/mach-k3/am62x/Kconfig @@ -48,6 +48,7 @@ config TARGET_VERDIN_AM62_A53 select ARM64 select BINMAN select OF_SYSTEM_SETUP + imply OF_UPSTREAM config TARGET_VERDIN_AM62_R5 bool "Toradex Verdin AM62 running on R5" diff --git a/arch/arm/mach-k3/am62x/Makefile b/arch/arm/mach-k3/am62x/Makefile new file mode 100644 index 00000000000..acf09c3426c --- /dev/null +++ b/arch/arm/mach-k3/am62x/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0+ +obj-y += boot.o diff --git a/arch/arm/mach-k3/am62x/boot.c b/arch/arm/mach-k3/am62x/boot.c new file mode 100644 index 00000000000..132b42f7edb --- /dev/null +++ b/arch/arm/mach-k3/am62x/boot.c @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/am62_spl.h> + +static u32 __get_backup_bootmedia(u32 devstat) +{ + u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; + u32 bkup_bootmode_cfg = + (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; + + switch (bkup_bootmode) { + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + + case BACKUP_BOOT_DEVICE_USB: + return BOOT_DEVICE_USB; + + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + + case BACKUP_BOOT_DEVICE_MMC: + if (bkup_bootmode_cfg) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + + case BACKUP_BOOT_DEVICE_DFU: + if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + }; + + return BOOT_DEVICE_RAM; +} + +static u32 __get_primary_bootmedia(u32 devstat) +{ + u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_OSPI: + fallthrough; + case BOOT_DEVICE_QSPI: + fallthrough; + case BOOT_DEVICE_XSPI: + fallthrough; + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BOOT_DEVICE_ETHERNET_RGMII: + fallthrough; + case BOOT_DEVICE_ETHERNET_RMII: + return BOOT_DEVICE_ETHERNET; + + case BOOT_DEVICE_EMMC: + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_MMC: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_DFU: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + case BOOT_DEVICE_NOBOOT: + return BOOT_DEVICE_RAM; + } + + return bootmode; +} + +u32 get_boot_device(void) +{ + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode = *(u32 *)(K3_BOOT_PARAM_TABLE_INDEX_OCRAM); + u32 bootmedia; + + if (bootmode == K3_PRIMARY_BOOTMODE) + bootmedia = __get_primary_bootmedia(devstat); + else + bootmedia = __get_backup_bootmedia(devstat); + + debug("%s: devstat = 0x%x bootmedia = 0x%x bootmode = %d\n", + __func__, devstat, bootmedia, bootmode); + + return bootmedia; +} diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index b0fb87b97a2..1a269d6934a 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -24,6 +24,7 @@ #include <asm/io.h> #include <fs_loader.h> #include <fs.h> +#include <efi_loader.h> #include <env.h> #include <elf.h> #include <soc.h> @@ -270,6 +271,17 @@ int misc_init_r(void) printf("Failed to probe am65_cpsw_nuss driver\n"); } + if (IS_ENABLED(CONFIG_TI_ICSSG_PRUETH)) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(prueth), + &dev); + if (ret) + printf("Failed to probe prueth driver\n"); + } + /* Default FIT boot on HS-SE devices */ if (get_device_type() == K3_DEVICE_TYPE_HS_SE) env_set("boot_fit", "1"); @@ -296,3 +308,14 @@ void setup_qos(void) writel(qos_data[i].val, (uintptr_t)qos_data[i].reg); } #endif + +void efi_add_known_memory(void) +{ + if (IS_ENABLED(CONFIG_EFI_LOADER)) + /* + * Memory over ram_top can be used by various firmware + * Declare to EFI only memory area below ram_top + */ + efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base, + EFI_CONVENTIONAL_MEMORY); +} diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h index 264f8a488b4..bcbc4821c82 100644 --- a/arch/arm/mach-k3/include/mach/am62_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -83,6 +83,7 @@ #define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4)) #define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0 +#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290 #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000 @@ -122,6 +123,21 @@ static inline int k3_get_max_temp(void) } } +static inline int k3_get_a53_max_frequency(void) +{ + switch (k3_get_speed_grade()) { + case 'K': + return 800000000; + case 'S': + return 1000000000; + case 'T': + return 1250000000; + case 'G': + default: + return 300000000; + } +} + static inline int k3_has_pru(void) { u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index af982e70d17..c724450638c 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -107,4 +107,5 @@ struct rom_extended_boot_data { u32 num_components; }; +u32 get_boot_device(void); #endif /* _ASM_ARCH_HARDWARE_H_ */ diff --git a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c index c02f8d33099..0f6c294f1eb 100644 --- a/arch/arm/mach-k3/r5/common.c +++ b/arch/arm/mach-k3/r5/common.c @@ -24,6 +24,9 @@ enum { IMAGE_ID_OPTEE, IMAGE_ID_SPL, IMAGE_ID_DM_FW, + IMAGE_ID_TIFSSTUB_HS, + IMAGE_ID_TIFSSTUB_FS, + IMAGE_ID_T, IMAGE_AMT, }; @@ -33,6 +36,9 @@ static const char *image_os_match[IMAGE_AMT] = { "tee", "U-Boot", "DM", + "tifsstub-hs", + "tifsstub-fs", + "tifsstub-gp", }; #endif @@ -314,6 +320,24 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image, break; } } + + if (i < IMAGE_AMT && i > IMAGE_ID_DM_FW) { + int device_type = get_device_type(); + + if ((device_type == K3_DEVICE_TYPE_HS_SE && + strcmp(os, "tifsstub-hs")) || + (device_type == K3_DEVICE_TYPE_HS_FS && + strcmp(os, "tifsstub-fs")) || + (device_type == K3_DEVICE_TYPE_GP && + strcmp(os, "tifsstub-gp"))) { + *p_size = 0; + } else { + debug("tifsstub-type: %s\n", os); + } + + return; + } + /* * Only DM and the DTBs are being authenticated here, * rest will be authenticated when A72 cluster is up diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 1008232cac8..6b6a162f568 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -90,6 +90,14 @@ config TARGET_SOCFPGA_ARRIA10 imply FPGA_SOCFPGA imply SPL_USE_TINY_PRINTF +config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM + bool "Always reprogram Arria 10 FPGA" + depends on TARGET_SOCFPGA_ARRIA10 + help + Arria 10 FPGA is only programmed during the cold boot. + This option forces the FPGA to be reprogrammed every reboot, + allowing to change the bitstream and apply it with warm reboot. + config TARGET_SOCFPGA_CYCLONE5 bool select TARGET_SOCFPGA_GEN5 diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index 9edbbf4a29c..3981d2d4f14 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -122,7 +122,10 @@ void spl_board_init(void) arch_early_init_r(); /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ - if (is_fpgamgr_user_mode()) { + if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) && + is_regular_boot_valid()) || + (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) && + is_fpgamgr_user_mode())) { ret = config_pins(gd->fdt_blob, "shared"); if (ret) return; @@ -130,7 +133,8 @@ void spl_board_init(void) ret = config_pins(gd->fdt_blob, "fpga"); if (ret) return; - } else if (!is_fpgamgr_early_user_mode()) { + } else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) || + !is_fpgamgr_early_user_mode()) { /* Program IOSSM(early IO release) or full FPGA */ fpgamgr_program(buf, FPGA_BUFSIZ, 0); diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 7f2753190c2..e6f1286e71f 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -265,14 +265,15 @@ int dram_init(void) if (uniphier_get_soc_id() == UNIPHIER_LD20_ID) gd->ram_size -= 64; + /* map all the DRAM regions */ + uniphier_mem_map_init(gd->ram_base, prev_top - gd->ram_base); + return 0; } int dram_init_banksize(void) { struct uniphier_dram_map dram_map[3] = {}; - unsigned long base, top; - bool valid_bank_found = false; int ret, i; ret = uniphier_dram_map_get(dram_map); @@ -287,18 +288,7 @@ int dram_init_banksize(void) if (!dram_map[i].size) continue; - - if (!valid_bank_found) - base = dram_map[i].base; - top = dram_map[i].base + dram_map[i].size; - valid_bank_found = true; } - if (!valid_bank_found) - return -EINVAL; - - /* map all the DRAM regions */ - uniphier_mem_map_init(base, top - base); - return 0; } diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index 6a7be0b4271..0d2238ace1e 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -1,29 +1,5 @@ if ARCH_ZYNQMP -config SPL_FS_FAT - default y - -config SPL_LIBCOMMON_SUPPORT - default y - -config SPL_LIBDISK_SUPPORT - default y - -config SPL_LIBGENERIC_SUPPORT - default y - -config SPL_MMC - default y if MMC_SDHCI_ZYNQ - -config SPL_SERIAL - default y - -config SPL_SPI_FLASH_SUPPORT - default y if ZYNQ_QSPI - -config SPL_SPI - default y if ZYNQ_QSPI - config SYS_BOARD string "Board name" default "zynqmp" @@ -135,7 +111,8 @@ config ZYNQMP_PSU_INIT_ENABLED config SPL_ZYNQMP_PSU_INIT_ENABLED bool "Include psu_init in SPL" - default y if SPL + depends on SPL + default y select BOARD_EARLY_INIT_F help Include psu_init by default in SPL. diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index a0f35f36faa..979ff3aef6c 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -9,6 +9,7 @@ #include <image.h> #include <init.h> #include <log.h> +#include <semihosting.h> #include <spl.h> #include <linux/delay.h> @@ -66,6 +67,11 @@ void spl_board_init(void) } #endif +static u32 jtag_boot_device(void) +{ + return semihosting_enabled() ? BOOT_DEVICE_SMH : BOOT_DEVICE_RAM; +} + void board_boot_order(u32 *spl_boot_list) { spl_boot_list[0] = spl_boot_device(); @@ -75,7 +81,7 @@ void board_boot_order(u32 *spl_boot_list) if (spl_boot_list[0] == BOOT_DEVICE_MMC2) spl_boot_list[1] = BOOT_DEVICE_MMC1; - spl_boot_list[2] = BOOT_DEVICE_RAM; + spl_boot_list[2] = jtag_boot_device(); } u32 spl_boot_device(void) @@ -85,19 +91,20 @@ u32 spl_boot_device(void) #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED) /* Change default boot mode at run-time */ + reg = CONFIG_SPL_ZYNQMP_ALT_BOOTMODE; writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT, &crlapb_base->boot_mode); -#endif - +#else reg = readl(&crlapb_base->boot_mode); if (reg >> BOOT_MODE_ALT_SHIFT) reg >>= BOOT_MODE_ALT_SHIFT; +#endif bootmode = reg & BOOT_MODES_MASK; switch (bootmode) { case JTAG_MODE: - return BOOT_DEVICE_RAM; + return jtag_boot_device(); #ifdef CONFIG_SPL_MMC case SD_MODE1: case SD1_LSHFT_MODE: /* not working on silicon v1 */ diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index 6e1fd938f52..5ccd9545cb5 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -8,7 +8,7 @@ lib-$(CONFIG_USE_PRIVATE_LIBGCC) += lshrdi3.o muldi3.o ashldi3.o ashrdi3.o obj-y += bdinfo.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-y += cache.o obj-y += interrupts.o obj-y += time.o diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index dfd8135f4f2..2f234825f80 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile @@ -3,6 +3,6 @@ # (C) Copyright 2003-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-$(CONFIG_CMD_BDI) += bdinfo.o obj-y += muldi3.o diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 1621cc9a1ff..4386eb4d6d1 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -10,7 +10,7 @@ obj-y += reloc.o obj-y += stack.o obj-y += traps.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/nios2/lib/Makefile b/arch/nios2/lib/Makefile index a9f3c7100e7..68a5ca007d5 100644 --- a/arch/nios2/lib/Makefile +++ b/arch/nios2/lib/Makefile @@ -4,5 +4,5 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-y += cache.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-y += libgcc.o diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index bb819dcbb6c..dcce9834927 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -34,7 +34,7 @@ obj-y += ticks.o endif obj-y += reloc.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-y += cache.o obj-y += extable.o obj-y += interrupts.o diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6c26f91f166..7e20ef63bba 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -22,6 +22,7 @@ config TARGET_OPENPITON_RISCV64 config TARGET_QEMU_VIRT bool "Support QEMU Virt Board" + select BOARD_LATE_INIT config TARGET_SIFIVE_UNLEASHED bool "Support SiFive Unleashed Board" @@ -93,6 +94,7 @@ source "board/xilinx/mbv/Kconfig" # platform-specific options below source "arch/riscv/cpu/andesv5/Kconfig" +source "arch/riscv/cpu/cv1800b/Kconfig" source "arch/riscv/cpu/fu540/Kconfig" source "arch/riscv/cpu/fu740/Kconfig" source "arch/riscv/cpu/generic/Kconfig" @@ -119,6 +121,26 @@ config ARCH_RV64I endchoice +config FRAMEPOINTER + bool "Build with frame pointer for stack unwinding" + help + Choose this option to use the frame pointer so the stack can be + unwound if needed. This is useful for tracing where faults came + from as the source may be several functions back + + If you say Y here, then the code size will be increased due to + having to store the fp. + +config SPL_FRAMEPOINTER + bool "Build SPL with frame pointer for stack unwinding" + help + Choose this option to use the frame pointer so the stack can be + unwound if needed. This is useful for tracing where faults came + from as the source may be several functions back + + If you say Y here, then the code size will be increased due to + having to store the fp. + choice prompt "Code Model" default CMODEL_MEDLOW diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index b3ef87078b5..c36a8533e0f 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -48,6 +48,10 @@ endif ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \ -mcmodel=$(CMODEL) +ifeq ($(CONFIG_$(SPL_)FRAMEPOINTER),y) + ARCH_FLAGS += -fno-omit-frame-pointer +endif + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) CFLAGS_EFI += $(ARCH_FLAGS) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index ecfefa1a025..affe70081b5 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -38,35 +38,51 @@ static inline bool supports_extension(char ext) #if CONFIG_IS_ENABLED(RISCV_MMODE) return csr_read(CSR_MISA) & (1 << (ext - 'a')); #elif CONFIG_CPU + char sext[2] = {ext}; struct udevice *dev; - char desc[32]; - int i; + const char *isa; + int ret, i; uclass_find_first_device(UCLASS_CPU, &dev); if (!dev) { debug("unable to find the RISC-V cpu device\n"); return false; } - if (!cpu_get_desc(dev, desc, sizeof(desc))) { - /* - * skip the first 4 characters (rv32|rv64) - */ - for (i = 4; i < sizeof(desc); i++) { - switch (desc[i]) { - case 's': - case 'x': - case 'z': - case '_': - case '\0': - /* - * Any of these characters mean the single - * letter extensions have all been consumed. - */ - return false; - default: - if (desc[i] == ext) - return true; - } + + ret = dev_read_stringlist_search(dev, "riscv,isa-extensions", sext); + if (ret >= 0) + return true; + + /* + * Only if the property is not found (ENODATA) is the fallback to + * riscv,isa used, otherwise the extension is not present in this + * CPU. + */ + if (ret != -ENODATA) + return false; + + isa = dev_read_string(dev, "riscv,isa"); + if (!isa) + return false; + + /* + * Skip the first 4 characters (rv32|rv64). + */ + for (i = 4; i < sizeof(isa); i++) { + switch (isa[i]) { + case 's': + case 'x': + case 'z': + case '_': + case '\0': + /* + * Any of these characters mean the single + * letter extensions have all been consumed. + */ + return false; + default: + if (isa[i] == ext) + return true; } } diff --git a/arch/riscv/cpu/cv1800b/Kconfig b/arch/riscv/cpu/cv1800b/Kconfig new file mode 100644 index 00000000000..7225b1210c5 --- /dev/null +++ b/arch/riscv/cpu/cv1800b/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> + +config SOPHGO_CV1800B + bool + select ARCH_EARLY_INIT_R + select SYS_CACHE_SHIFT_6 + imply CPU + imply CPU_RISCV + imply RISCV_TIMER + imply CMD_CPU diff --git a/arch/riscv/cpu/cv1800b/Makefile b/arch/riscv/cpu/cv1800b/Makefile new file mode 100644 index 00000000000..95beb34b51a --- /dev/null +++ b/arch/riscv/cpu/cv1800b/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> + +obj-y += dram.o +obj-y += cpu.o +obj-y += cache.o diff --git a/arch/riscv/cpu/cv1800b/cache.c b/arch/riscv/cpu/cv1800b/cache.c new file mode 100644 index 00000000000..b8051e29e02 --- /dev/null +++ b/arch/riscv/cpu/cv1800b/cache.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> + */ + +#include <cpu_func.h> + +/* + * dcache.ipa rs1 (invalidate) + * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | + * 0000001 01010 rs1 000 00000 0001011 + * + * dcache.cpa rs1 (clean) + * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | + * 0000001 01001 rs1 000 00000 0001011 + * + * dcache.cipa rs1 (clean then invalidate) + * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | + * 0000001 01011 rs1 000 00000 0001011 + * + * sync.s + * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | + * 0000000 11001 00000 000 00000 0001011 + */ +#define DCACHE_IPA_A0 ".long 0x02a5000b" +#define DCACHE_CPA_A0 ".long 0x0295000b" +#define DCACHE_CIPA_A0 ".long 0x02b5000b" + +#define SYNC_S ".long 0x0190000b" + +void invalidate_dcache_range(unsigned long start, unsigned long end) +{ + register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1); + for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE) + __asm__ __volatile__(DCACHE_IPA_A0); + __asm__ __volatile__(SYNC_S); +} + +void flush_dcache_range(unsigned long start, unsigned long end) +{ + register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1); + for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE) + __asm__ __volatile__(DCACHE_CPA_A0); + __asm__ __volatile__(SYNC_S); +} diff --git a/arch/riscv/cpu/cv1800b/cpu.c b/arch/riscv/cpu/cv1800b/cpu.c new file mode 100644 index 00000000000..233a6a3d64e --- /dev/null +++ b/arch/riscv/cpu/cv1800b/cpu.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> + */ + +int cleanup_before_linux(void) +{ + return 0; +} diff --git a/arch/riscv/cpu/cv1800b/dram.c b/arch/riscv/cpu/cv1800b/dram.c new file mode 100644 index 00000000000..91007c0a3d3 --- /dev/null +++ b/arch/riscv/cpu/cv1800b/dram.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <fdtdec.h> +#include <init.h> +#include <asm/global_data.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 6cecadfac56..a9e19356928 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -418,6 +418,7 @@ call_board_init_r: */ mv a0, s3 /* gd_t */ mv a1, s4 /* dest_addr */ + mv s0, zero /* fp == NULL */ /* * jump to it ... diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts index 3af9e34b3bc..94e64ddce8f 100644 --- a/arch/riscv/dts/cv1800b-milkv-duo.dts +++ b/arch/riscv/dts/cv1800b-milkv-duo.dts @@ -33,6 +33,14 @@ clock-frequency = <25000000>; }; +&sdhci0 { + status = "okay"; + bus-width = <4>; + no-1-8-v; + no-mmc; + no-sdio; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/dts/cv1800b.dtsi b/arch/riscv/dts/cv1800b.dtsi index 165e9e320a8..baf641829e7 100644 --- a/arch/riscv/dts/cv1800b.dtsi +++ b/arch/riscv/dts/cv1800b.dtsi @@ -16,3 +16,7 @@ &clint { compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; }; + +&clk { + compatible = "sophgo,cv1800-clk"; +}; diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi index 2d6f4a4b1e5..ec99c4deeb6 100644 --- a/arch/riscv/dts/cv18xx.dtsi +++ b/arch/riscv/dts/cv18xx.dtsi @@ -45,6 +45,13 @@ #clock-cells = <0>; }; + sdhci_clk: sdhci-clock { + compatible = "fixed-clock"; + clock-frequency = <375000000>; + clock-output-names = "sdhci_clk"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; @@ -53,6 +60,12 @@ dma-noncoherent; ranges; + clk: clock-controller@3002000 { + reg = <0x03002000 0x1000>; + clocks = <&osc>; + #clock-cells = <1>; + }; + gpio0: gpio@3020000 { compatible = "snps,dw-apb-gpio"; reg = <0x3020000 0x1000>; @@ -175,6 +188,15 @@ status = "disabled"; }; + sdhci0: mmc@4310000 { + compatible = "sophgo,cv1800b-dwcmshc"; + reg = <0x4310000 0x1000>; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sdhci_clk>; + clock-names = "core"; + status = "disabled"; + }; + plic: interrupt-controller@70000000 { reg = <0x70000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi index f2c6bec9298..e11babc1cde 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi @@ -298,7 +298,7 @@ pinctrl-0 = <&mmc1_pins>; no-sdio; no-mmc; - broken-cd; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; cap-sd-highspeed; post-power-on-delay-ms = <200>; status = "okay"; diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts index 94e42c26811..48ee1154956 100644 --- a/arch/riscv/dts/xilinx-mbv32.dts +++ b/arch/riscv/dts/xilinx-mbv32.dts @@ -8,6 +8,9 @@ */ /dts-v1/; + +#include "binman.dtsi" + / { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/riscv/include/asm/arch-jh7110/eeprom.h b/arch/riscv/include/asm/arch-jh7110/eeprom.h index d2776d5b6cb..62d184aeb57 100644 --- a/arch/riscv/include/asm/arch-jh7110/eeprom.h +++ b/arch/riscv/include/asm/arch-jh7110/eeprom.h @@ -12,4 +12,13 @@ u8 get_pcb_revision_from_eeprom(void); u32 get_ddr_size_from_eeprom(void); +/** + * get_product_id_from_eeprom - get product ID string + * + * A string like "VF7110A1-2228-D008E000-00000001" is returned. + * + * Return: product ID string + */ +const char *get_product_id_from_eeprom(void); + #endif /* _ASM_RISCV_EEPROM_H */ diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 9a05b662fd6..0b2c88db6ba 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -6,7 +6,7 @@ # Copyright (C) 2017 Andes Technology Corporation # Rick Chen, Andes Technology Corporation <rick@andestech.com> -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index a26ccc721fd..7350e2ced85 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -60,6 +60,40 @@ static void show_regs(struct pt_regs *regs) #endif } +#if defined(CONFIG_FRAMEPOINTER) || defined(CONFIG_SPL_FRAMEPOINTER) +static void show_backtrace(struct pt_regs *regs) +{ + uintptr_t *fp = (uintptr_t *)regs->s0; + unsigned count = 0; + ulong ra; + + printf("backtrace:\n"); + + /* there are a few entry points where the s0 register is + * set to gd, so to avoid changing those, just abort if + * the value is the same */ + while (fp != NULL && fp != (uintptr_t *)gd) { + ra = fp[-1]; + printf("backtrace %2d: FP: " REG_FMT " RA: " REG_FMT, + count, (ulong)fp, ra); + + if (gd && gd->flags & GD_FLG_RELOC) + printf(" - RA: " REG_FMT " reloc adjusted\n", + ra - gd->reloc_off); + else + printf("\n"); + + fp = (uintptr_t *)fp[-2]; + count++; + } +} +#else +static void show_backtrace(struct pt_regs *regs) +{ + printf("No backtrace support enabled\n"); +} +#endif + /** * instr_len() - get instruction length * @@ -131,6 +165,7 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) epc - gd->reloc_off, regs->ra - gd->reloc_off); show_regs(regs); + show_backtrace(regs); show_code(epc); show_efi_loaded_images(epc); panic("\n"); diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 0ce77de2fcb..1c8353d6156 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -58,10 +58,15 @@ config SANDBOX_CRASH_RESET bool "Reset on crash" help If an illegal instruction or an illegal memory access occurs, the - sandbox by default writes a crash dump and exits. If you set this - flag, the sandbox is reset instead. This may be useful when running - test suites like the UEFI self certification test which continue - with the next test after a crash. + sandbox exits with an error by default. + + If the u-boot binary is invoked with --signals (or -S), U-Boot will + handle the signal writing a crash dump before exiting. + + If you additionally set the CONFIG_SANDBOX_CRASH_RESET flag, the + sandbox is reset after writing the crash dump. This may be useful + when running test suites like the UEFI self certification test which + continue with the next test after a crash. config SANDBOX_BITS_PER_LONG int diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 1d50991f8d2..405843800e9 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -69,5 +69,3 @@ EFI_LDS := ${SRCDIR}/../../../arch/riscv/lib/elf_riscv64_efi.lds endif EFI_CRT0 := crt0_sandbox_efi.o EFI_RELOC := reloc_sandbox_efi.o -AFLAGS_crt0_sandbox_efi.o += -DHOST_ARCH="$(HOST_ARCH)" -CFLAGS_reloc_sandbox_efi.o += -DHOST_ARCH="$(HOST_ARCH)" diff --git a/arch/sandbox/cpu/eth-raw-os.c b/arch/sandbox/cpu/eth-raw-os.c index 92c35aed95d..39ea3b3f012 100644 --- a/arch/sandbox/cpu/eth-raw-os.c +++ b/arch/sandbox/cpu/eth-raw-os.c @@ -105,7 +105,12 @@ static int _raw_packet_start(struct eth_sandbox_raw_priv *priv, /* Make the socket non-blocking */ flags = fcntl(priv->sd, F_GETFL, 0); - fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK); + ret = fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK); + if (ret == -1) { + printf("Failed to make socket non-blocking: %d %s\n", errno, + strerror(errno)); + return -errno; + } /* Enable promiscuous mode to receive responses meant for us */ mr.mr_ifindex = device->sll_ifindex; @@ -172,7 +177,12 @@ static int _local_inet_start(struct eth_sandbox_raw_priv *priv) /* Make the socket non-blocking */ flags = fcntl(priv->sd, F_GETFL, 0); - fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK); + ret = fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK); + if (ret == -1) { + printf("Failed to make socket non-blocking: %d %s\n", errno, + strerror(errno)); + return -errno; + } /* Include the UDP/IP headers on send and receive */ ret = setsockopt(priv->sd, IPPROTO_IP, IP_HDRINCL, &one, diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 12d3eff5fa7..8392206eea6 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -106,3 +106,7 @@ #if IS_ENABLED(CONFIG_SUPPORT_VPL) #include "sandbox_vpl.dtsi" #endif + +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) +#include "sandbox_capsule.dtsi" +#endif diff --git a/arch/sandbox/dts/sandbox_capsule.dtsi b/arch/sandbox/dts/sandbox_capsule.dtsi new file mode 100644 index 00000000000..34d29916b30 --- /dev/null +++ b/arch/sandbox/dts/sandbox_capsule.dtsi @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Devicetree file with binman nodes needed for generating EFI + * capsules. + * + */ + +#include <sandbox_efi_capsule.h> + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + capsule1 { + filename = "Test01"; + efi-capsule { + image-index = <0x1>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule2 { + filename = "Test02"; + efi-capsule { + image-index = <0x2>; + image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID; + + text { + text = "u-boot-env:New"; + }; + }; + }; + + capsule3 { + filename = "Test03"; + efi-capsule { + image-index = <0x1>; + image-guid = SANDBOX_INCORRECT_GUID; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule4 { + filename = "Test101"; + efi-capsule { + image-index = <0x1>; + fw-version = <0x5>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule5 { + filename = "Test102"; + efi-capsule { + image-index = <0x2>; + fw-version = <0xa>; + image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID; + + text { + text = "u-boot-env:New"; + }; + }; + }; + + capsule6 { + filename = "Test103"; + efi-capsule { + image-index = <0x1>; + fw-version = <0x2>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule7 { + filename = "Test11"; + efi-capsule { + image-index = <0x1>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + private-key = CAPSULE_PRIV_KEY; + public-key-cert = CAPSULE_PUB_KEY; + monotonic-count = <0x1>; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule8 { + filename = "Test12"; + efi-capsule { + image-index = <0x1>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + private-key = CAPSULE_INVAL_KEY; + public-key-cert = CAPSULE_INVAL_PUB_KEY; + monotonic-count = <0x1>; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule9 { + filename = "Test111"; + efi-capsule { + image-index = <0x1>; + fw-version = <0x5>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + private-key = CAPSULE_PRIV_KEY; + public-key-cert = CAPSULE_PUB_KEY; + monotonic-count = <0x1>; + + text { + text = "u-boot:New"; + }; + }; + }; + + capsule10 { + filename = "Test112"; + efi-capsule { + image-index = <0x2>; + fw-version = <0xa>; + image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID; + private-key = CAPSULE_PRIV_KEY; + public-key-cert = CAPSULE_PUB_KEY; + monotonic-count = <0x1>; + + text { + text = "u-boot-env:New"; + }; + }; + }; + + capsule11 { + filename = "Test113"; + efi-capsule { + image-index = <0x1>; + fw-version = <0x2>; + image-guid = SANDBOX_UBOOT_IMAGE_GUID; + private-key = CAPSULE_PRIV_KEY; + public-key-cert = CAPSULE_PUB_KEY; + monotonic-count = <0x1>; + + text { + text = "u-boot:New"; + }; + }; + }; +}; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index e264b29554c..a012f5c4c9b 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1990,4 +1990,8 @@ #include "sandbox_vpl.dtsi" #endif +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) +#include "sandbox_capsule.dtsi" +#endif + #include "cedit.dtsi" diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index a2bc5a7ee60..c4924b23c83 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -7,5 +7,5 @@ obj-y += fdt_fixup.o interrupts.o sections.o obj-$(CONFIG_PCI) += pci_io.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c index 8dbcd9ff7dd..44ba8b52e13 100644 --- a/arch/sandbox/lib/bootm.c +++ b/arch/sandbox/lib/bootm.c @@ -85,5 +85,7 @@ int do_bootm_linux(int flag, struct bootm_info *bmi) int booti_setup(ulong image, ulong *relocated_addr, ulong *size, bool force_reloc) { - return 0; + log_err("Booting is not supported on the sandbox.\n"); + + return 1; } diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index e7520a328d5..8c3c30293a3 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -6,7 +6,7 @@ extra-y += start.o obj-y += board.o -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-y += time.o obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 99e59d94c60..23a1e21b29e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE hex default 0x10000 +config X86_HARDFP + bool "Support hardware floating point" + help + U-Boot generally does not make use of floating point. Where this is + needed, it can be enabled using this option. This adjusts the + start-up code for 64-bit mode and changes the compiler options for + 64-bit to enable SSE. + config HAVE_ITSS bool "Enable ITSS" help @@ -1053,4 +1061,12 @@ config SPL_COREBOOT_SYSINFO display, memory and build information. It is stored in struct sysinfo_t after parsing by get_coreboot_info(). +config ZBOOT + bool "Support the zImage format" + default y + help + Enable this to support booting the x86-specific zImage format. This + uses a special, binary format containing information about the Linux + format to boot. + endmenu diff --git a/arch/x86/config.mk b/arch/x86/config.mk index 26ec1af2f0b..2e3a7119e79 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y) PLATFORM_CPPFLAGS += -march=i386 -m32 else PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -march=core2 -m64 + +ifndef CONFIG_X86_HARDFP PLATFORM_CPPFLAGS += -mno-mmx -mno-sse endif +endif # IS_32BIT + PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections -fvisibility=hidden KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 2647bff891f..5ea746ecce4 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -10,6 +10,7 @@ #include <init.h> #include <asm/cpu.h> #include <asm/global_data.h> +#include <asm/processor-flags.h> DECLARE_GLOBAL_DATA_PTR; @@ -39,11 +40,22 @@ int x86_mp_init(void) return 0; } +/* enable SSE features for hardware floating point */ +static void setup_sse_features(void) +{ + asm ("mov %%cr4, %%rax\n" \ + "or %0, %%rax\n" \ + "mov %%rax, %%cr4\n" \ + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax"); +} + int x86_cpu_reinit_f(void) { /* set the vendor to Intel so that native_calibrate_tsc() works */ gd->arch.x86_vendor = X86_VENDOR_INTEL; gd->arch.has_mtrr = true; + if (IS_ENABLED(CONFIG_X86_HARDFP)) + setup_sse_features(); return 0; } diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index dfce7c2d591..b867468e16c 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -46,6 +46,16 @@ compatible = "coreboot-fb"; }; + bootstd { + compatible = "u-boot,boot-std"; + + theme { + font-size = <30>; + menu-inset = <3>; + menuitem-gap-y = <1>; + }; + }; + sysinfo { compatible = "coreboot,sysinfo"; }; diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h index 655675b6661..8b542605170 100644 --- a/arch/x86/include/asm/zimage.h +++ b/arch/x86/include/asm/zimage.h @@ -30,6 +30,78 @@ #define BZIMAGE_LOAD_ADDR 0x100000 #define ZIMAGE_LOAD_ADDR 0x10000 +enum { + ZBOOT_STATE_START = BIT(0), + ZBOOT_STATE_LOAD = BIT(1), + ZBOOT_STATE_SETUP = BIT(2), + ZBOOT_STATE_INFO = BIT(3), + ZBOOT_STATE_GO = BIT(4), + + /* This one doesn't execute automatically, so stop the count before 5 */ + ZBOOT_STATE_DUMP = BIT(5), + ZBOOT_STATE_COUNT = 5, +}; + +/** + * struct zboot_state - Current state of the boot + * + * @bzimage_addr: Address of the bzImage to boot, or 0 if the image has already + * been loaded and does not exist (as a cohesive whole) in memory + * @bzimage_size: Size of the bzImage, or 0 to detect this + * @initrd_addr: Address of the initial ramdisk, or 0 if none + * @initrd_size: Size of the initial ramdisk, or 0 if none + * @load_address: Address where the bzImage is moved before booting, either + * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR + * This is set up when loading the zimage + * @base_ptr: Pointer to the boot parameters, typically at address + * DEFAULT_SETUP_BASE + * This is set up when loading the zimage + * @cmdline: Environment variable containing the 'override' command line, or + * NULL to use the one in the setup block + */ +struct zboot_state { + ulong bzimage_addr; + ulong bzimage_size; + ulong initrd_addr; + ulong initrd_size; + ulong load_address; + struct boot_params *base_ptr; + const char *cmdline; +}; + +extern struct zboot_state state; + +/** + * zimage_dump() - Dump information about a zimage + * + * @base_ptr: Pointer to the boot parameters + * @show_cmdline: true to show the kernel command line + */ +void zimage_dump(struct boot_params *base_ptr, bool show_cmdline); + +/** + * zboot_load() - Load a zimage + * + * Load the zimage into the correct place + * + * Return: 0 if OK, -ve on error + */ +int zboot_load(void); + +/** + * zboot_setup() - Set up the zboot image reeady for booting + * + * Return: 0 if OK, -ve on error + */ +int zboot_setup(void); + +/** + * zboot_go() - Start the image + * + * Return: 0 if OK, -ve on error + */ +int zboot_go(void); + /** * load_zimage() - Load a zImage or bzImage * @@ -62,4 +134,29 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size, int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, ulong initrd_addr, ulong initrd_size, ulong cmdline_force); +/** + * zboot_start() - Prepare to boot a zimage + * + * Record information about a zimage so it can be booted + * + * @bzimage_addr: Address of the bzImage to boot + * @bzimage_size: Size of the bzImage, or 0 to detect this + * @initrd_addr: Address of the initial ramdisk, or 0 if none + * @initrd_size: Size of the initial ramdisk, or 0 if none + * @base_addr: If non-zero, this indicates that the boot parameters have already + * been loaded by the caller to this address, so the load_zimage() call + * in zboot_load() will be skipped when booting + * @cmdline: Environment variable containing the 'override' command line, or + * NULL to use the one in the setup block + */ +void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr, + ulong initrd_size, ulong base_addr, const char *cmdline); + +/** + * zboot_info() - Show simple info about a zimage + * + * Shows wherer the kernel was loaded and also the setup base + */ +void zboot_info(void); + #endif diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 90a7618ecfd..94aa335ede4 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_X86_32BIT_INIT) += string.o endif ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o endif obj-y += cmd_boot.o obj-$(CONFIG_$(SPL_)COREBOOT_SYSINFO) += coreboot/ @@ -48,7 +48,7 @@ obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi_table.o endif obj-y += tables.o ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_CMD_ZBOOT) += zimage.o +obj-$(CONFIG_ZBOOT) += zimage.o endif obj-$(CONFIG_USE_HOB) += hob.o ifndef CONFIG_TPL_BUILD diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index c15f11f8cdf..4e4cf18dec5 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -283,7 +283,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { int ret; - printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); + printf("Jumping to 64-bit U-Boot\n"); ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); debug("ret=%d\n", ret); hang(); diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index a41e1ccf8a6..d7403876c13 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -56,41 +56,8 @@ DECLARE_GLOBAL_DATA_PTR; #define COMMAND_LINE_SIZE 2048 -/** - * struct zboot_state - Current state of the boot - * - * @bzimage_addr: Address of the bzImage to boot - * @bzimage_size: Size of the bzImage, or 0 to detect this - * @initrd_addr: Address of the initial ramdisk, or 0 if none - * @initrd_size: Size of the initial ramdisk, or 0 if none - * @load_address: Address where the bzImage is moved before booting, either - * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR - * @base_ptr: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE - * @cmdline: Environment variable containing the 'override' command line, or - * NULL to use the one in the setup block - */ -struct zboot_state { - ulong bzimage_addr; - ulong bzimage_size; - ulong initrd_addr; - ulong initrd_size; - ulong load_address; - struct boot_params *base_ptr; - char *cmdline; -} state; - -enum { - ZBOOT_STATE_START = BIT(0), - ZBOOT_STATE_LOAD = BIT(1), - ZBOOT_STATE_SETUP = BIT(2), - ZBOOT_STATE_INFO = BIT(3), - ZBOOT_STATE_GO = BIT(4), - - /* This one doesn't execute automatically, so stop the count before 5 */ - ZBOOT_STATE_DUMP = BIT(5), - ZBOOT_STATE_COUNT = 5, -}; +/* Current state of the boot */ +struct zboot_state state; static void build_command_line(char *command_line, int auto_boot) { @@ -400,56 +367,10 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, return 0; } -static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - const char *s; - - memset(&state, '\0', sizeof(state)); - if (argc >= 2) { - /* argv[1] holds the address of the bzImage */ - s = argv[1]; - } else { - s = env_get("fileaddr"); - } - - if (s) - state.bzimage_addr = hextoul(s, NULL); - - if (argc >= 3) { - /* argv[2] holds the size of the bzImage */ - state.bzimage_size = hextoul(argv[2], NULL); - } - - if (argc >= 4) - state.initrd_addr = hextoul(argv[3], NULL); - if (argc >= 5) - state.initrd_size = hextoul(argv[4], NULL); - if (argc >= 6) { - /* - * When the base_ptr is passed in, we assume that the image is - * already loaded at the address given by argv[1] and therefore - * the original bzImage is somewhere else, or not accessible. - * In any case, we don't need access to the bzImage since all - * the processing is assumed to be done. - * - * So set the base_ptr to the given address, use this arg as the - * load address and set bzimage_addr to 0 so we know that it - * cannot be proceesed (or processed again). - */ - state.base_ptr = (void *)hextoul(argv[5], NULL); - state.load_address = state.bzimage_addr; - state.bzimage_addr = 0; - } - if (argc >= 7) - state.cmdline = env_get(argv[6]); - - return 0; -} - -static int zboot_load(void) +int zboot_load(void) { struct boot_params *base_ptr; + int ret; if (state.base_ptr) { struct boot_params *from = (struct boot_params *)state.base_ptr; @@ -469,23 +390,16 @@ static int zboot_load(void) } state.base_ptr = base_ptr; - return 0; -} - -static int do_zboot_load(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - if (zboot_load()) - return CMD_RET_FAILURE; - - if (env_set_hex("zbootbase", map_to_sysmem(state.base_ptr)) || - env_set_hex("zbootaddr", state.load_address)) - return CMD_RET_FAILURE; + ret = env_set_hex("zbootbase", map_to_sysmem(state.base_ptr)); + if (!ret) + ret = env_set_hex("zbootaddr", state.load_address); + if (ret) + return ret; return 0; } -static int zboot_setup(void) +int zboot_setup(void) { struct boot_params *base_ptr = state.base_ptr; int ret; @@ -499,33 +413,7 @@ static int zboot_setup(void) return 0; } -static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - struct boot_params *base_ptr = state.base_ptr; - - if (!base_ptr) { - printf("base is not set: use 'zboot load' first\n"); - return CMD_RET_FAILURE; - } - if (zboot_setup()) { - puts("Setting up boot parameters failed ...\n"); - return CMD_RET_FAILURE; - } - - return 0; -} - -static int do_zboot_info(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - printf("Kernel loaded at %08lx, setup_base=%p\n", - state.load_address, state.base_ptr); - - return 0; -} - -static int zboot_go(void) +int zboot_go(void) { struct boot_params *params = state.base_ptr; struct setup_header *hdr = ¶ms->hdr; @@ -549,35 +437,12 @@ static int zboot_go(void) return ret; } -static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size, + ulong base, char *cmdline) { int ret; - ret = zboot_go(); - printf("Kernel returned! (err=%d)\n", ret); - - return CMD_RET_FAILURE; -} - -int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline) -{ - int ret; - - memset(&state, '\0', sizeof(state)); - - if (base) { - state.base_ptr = map_sysmem(base, 0); - state.load_address = addr; - } else { - state.bzimage_addr = addr; - } - state.bzimage_size = size; - state.initrd_addr = initrd; - state.initrd_size = initrd_size; - state.cmdline = cmdline; - + zboot_start(addr, size, initrd, initrd_size, base, cmdline); ret = zboot_load(); if (ret) return log_msg_ret("ld", ret); @@ -586,7 +451,7 @@ int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size, return log_msg_ret("set", ret); ret = zboot_go(); if (ret) - return log_msg_ret("set", ret); + return log_msg_ret("go", ret); return -EFAULT; } @@ -776,97 +641,25 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) print_num("Kernel info offset", hdr->kernel_info_offset); } -static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr, + ulong initrd_size, ulong base_addr, const char *cmdline) { - struct boot_params *base_ptr = state.base_ptr; - - if (argc > 1) - base_ptr = (void *)hextoul(argv[1], NULL); - if (!base_ptr) { - printf("No zboot setup_base\n"); - return CMD_RET_FAILURE; - } - zimage_dump(base_ptr, true); - - return 0; -} - -/* Note: This defines the complete_zboot() function */ -U_BOOT_SUBCMDS(zboot, - U_BOOT_CMD_MKENT(start, 8, 1, do_zboot_start, "", ""), - U_BOOT_CMD_MKENT(load, 1, 1, do_zboot_load, "", ""), - U_BOOT_CMD_MKENT(setup, 1, 1, do_zboot_setup, "", ""), - U_BOOT_CMD_MKENT(info, 1, 1, do_zboot_info, "", ""), - U_BOOT_CMD_MKENT(go, 1, 1, do_zboot_go, "", ""), - U_BOOT_CMD_MKENT(dump, 2, 1, do_zboot_dump, "", ""), -) - -int do_zboot_states(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[], int state_mask) -{ - int i; - - for (i = 0; i < ZBOOT_STATE_COUNT; i++) { - struct cmd_tbl *cmd = &zboot_subcmds[i]; - int mask = 1 << i; - int ret; + memset(&state, '\0', sizeof(state)); - if (mask & state_mask) { - ret = cmd->cmd(cmd, flag, argc, argv); - if (ret) - return ret; - } + state.bzimage_size = bzimage_size; + state.initrd_addr = initrd_addr; + state.initrd_size = initrd_size; + if (base_addr) { + state.base_ptr = map_sysmem(base_addr, 0); + state.load_address = bzimage_addr; + } else { + state.bzimage_addr = bzimage_addr; } - - return 0; + state.cmdline = cmdline; } -int do_zboot_parent(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[], int *repeatable) +void zboot_info(void) { - /* determine if we have a sub command */ - if (argc > 1) { - char *endp; - - hextoul(argv[1], &endp); - /* - * endp pointing to nul means that argv[1] was just a valid - * number, so pass it along to the normal processing - */ - if (*endp) - return do_zboot(cmdtp, flag, argc, argv, repeatable); - } - - do_zboot_states(cmdtp, flag, argc, argv, ZBOOT_STATE_START | - ZBOOT_STATE_LOAD | ZBOOT_STATE_SETUP | - ZBOOT_STATE_INFO | ZBOOT_STATE_GO); - - return CMD_RET_FAILURE; + printf("Kernel loaded at %08lx, setup_base=%p\n", + state.load_address, state.base_ptr); } - -U_BOOT_CMDREP_COMPLETE( - zboot, 8, do_zboot_parent, "Boot bzImage", - "[addr] [size] [initrd addr] [initrd size] [setup] [cmdline]\n" - " addr - The optional starting address of the bzimage.\n" - " If not set it defaults to the environment\n" - " variable \"fileaddr\".\n" - " size - The optional size of the bzimage. Defaults to\n" - " zero.\n" - " initrd addr - The address of the initrd image to use, if any.\n" - " initrd size - The size of the initrd image to use, if any.\n" - " setup - The address of the kernel setup region, if this\n" - " is not at addr\n" - " cmdline - Environment variable containing the kernel\n" - " command line, to override U-Boot's normal\n" - " cmdline generation\n" - "\n" - "Sub-commands to do part of the zboot sequence:\n" - "\tstart [addr [arg ...]] - specify arguments\n" - "\tload - load OS image\n" - "\tsetup - set up table\n" - "\tinfo - show summary info\n" - "\tgo - start OS\n" - "\tdump [addr] - dump info (optional address of boot params)", - complete_zboot -); diff --git a/arch/xtensa/lib/Makefile b/arch/xtensa/lib/Makefile index ad4fe32cb69..bb9157f30f0 100644 --- a/arch/xtensa/lib/Makefile +++ b/arch/xtensa/lib/Makefile @@ -3,6 +3,6 @@ # (C) Copyright 2007 - 2013 Tensilica Inc. # (C) Copyright 2014 - 2016 Cadence Design Systems Inc. -obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_BOOTM) += bootm.o obj-y += cache.o misc.o relocate.o time.o |