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-rw-r--r--arch/arm/mach-mvebu/Kconfig23
-rw-r--r--arch/arm/mach-mvebu/Makefile13
-rw-r--r--arch/arm/mach-mvebu/cpu.c11
-rw-r--r--arch/arm/mach-mvebu/include/mach/cpu.h21
-rw-r--r--arch/arm/mach-mvebu/kwbimage.cfg.in5
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c4
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h4
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c14
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h30
-rw-r--r--arch/arm/mach-mvebu/spl.c84
10 files changed, 118 insertions, 91 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 16c5e722955..cdb1776a66c 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -331,7 +331,7 @@ choice
depends on SPL
config MVEBU_SPL_BOOT_DEVICE_SPI
- bool "SPI NOR flash"
+ bool "NOR flash (SPI or parallel)"
imply ENV_IS_IN_SPI_FLASH
imply SPL_DM_SPI
imply SPL_SPI_FLASH_SUPPORT
@@ -339,8 +339,13 @@ config MVEBU_SPL_BOOT_DEVICE_SPI
imply SPL_SPI
select SPL_BOOTROM_SUPPORT
+config MVEBU_SPL_BOOT_DEVICE_NAND
+ bool "NAND flash (SPI or parallel)"
+ select MTD_RAW_NAND
+ select SPL_BOOTROM_SUPPORT
+
config MVEBU_SPL_BOOT_DEVICE_MMC
- bool "SDIO/MMC card"
+ bool "eMMC or SD card"
imply ENV_IS_IN_MMC
# GPIO needed for eMMC/SD card presence detection
imply SPL_DM_GPIO
@@ -348,6 +353,8 @@ config MVEBU_SPL_BOOT_DEVICE_MMC
imply SPL_GPIO
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC
+ select SUPPORT_EMMC_BOOT if SPL_MMC
+ select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_SATA
@@ -356,12 +363,24 @@ config MVEBU_SPL_BOOT_DEVICE_SATA
imply SPL_LIBDISK_SUPPORT
select SPL_BOOTROM_SUPPORT
+config MVEBU_SPL_BOOT_DEVICE_PEX
+ bool "PCI Express"
+ select SPL_BOOTROM_SUPPORT
+
config MVEBU_SPL_BOOT_DEVICE_UART
bool "UART"
select SPL_BOOTROM_SUPPORT
endchoice
+config MVEBU_SPL_NAND_BADBLK_LOCATION
+ hex "NAND Bad block indicator location"
+ depends on MVEBU_SPL_BOOT_DEVICE_NAND
+ range 0x0 0x1
+ help
+ Value 0x0 = SLC flash = BBI at page 0 or page 1
+ Value 0x1 = MLC flash = BBI at last page in the block
+
config MVEBU_EFUSE
bool "Enable eFuse support"
depends on HAVE_MVEBU_EFUSE
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index a9f506cf2fb..90f88337bc1 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -50,16 +50,29 @@ KWB_REPLACE += BOOT_FROM
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),)
KWB_CFG_BOOT_FROM=spi
endif
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),)
+ KWB_CFG_BOOT_FROM=nand
+endif
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),)
KWB_CFG_BOOT_FROM=sdio
endif
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA),)
KWB_CFG_BOOT_FROM=sata
endif
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_PEX),)
+ KWB_CFG_BOOT_FROM=pex
+endif
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),)
KWB_CFG_BOOT_FROM=uart
endif
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),)
+KWB_REPLACE += NAND_PAGE_SIZE NAND_BLKSZ NAND_BADBLK_LOCATION
+KWB_CFG_NAND_PAGE_SIZE = $(CONFIG_SYS_NAND_PAGE_SIZE)
+KWB_CFG_NAND_BLKSZ = $(CONFIG_SYS_NAND_BLOCK_SIZE)
+KWB_CFG_NAND_BADBLK_LOCATION = $(CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION)
+endif
+
ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
KWB_REPLACE += CSK_INDEX
KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 329d13691f0..bbe167ed634 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -25,7 +25,7 @@ static const struct mbus_win windows[] = {
{ MBUS_SPI_BASE, MBUS_SPI_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH },
- /* NOR */
+ /* BootROM */
{ MBUS_BOOTROM_BASE, MBUS_BOOTROM_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_BOOTROM },
@@ -35,6 +35,15 @@ static const struct mbus_win windows[] = {
#endif
};
+/* SPI0 CS0 Flash of size MBUS_SPI_SIZE is mapped to address MBUS_SPI_BASE */
+#if CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \
+ CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= MBUS_SPI_SIZE
+void *env_sf_get_env_addr(void)
+{
+ return (void *)MBUS_SPI_BASE + CONFIG_ENV_OFFSET;
+}
+#endif
+
void lowlevel_init(void)
{
/*
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index c17c2440f1b..904e7157ba6 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -66,17 +66,38 @@ enum cpu_attrib {
/*
* Default Device Address MAP BAR values
*/
+#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_ARMADA_38X
+#define MBUS_PCI_MEM_BASE 0x88000000
+#define MBUS_PCI_MEM_SIZE ((3 * 128) << 20)
+#else
+#define MBUS_PCI_MEM_BASE 0x80000000
+#define MBUS_PCI_MEM_SIZE ((4 * 128) << 20)
+#endif
+#else
#define MBUS_PCI_MAX_PORTS 6
#define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX
#define MBUS_PCI_MEM_SIZE ((MBUS_PCI_MAX_PORTS * 128) << 20)
#define MBUS_PCI_IO_BASE 0xF1100000
#define MBUS_PCI_IO_SIZE ((MBUS_PCI_MAX_PORTS * 64) << 10)
+#endif
+#ifdef CONFIG_SPL_BUILD
+#define MBUS_SPI_BASE 0xD4000000
+#define MBUS_SPI_SIZE (64 << 20)
+#else
#define MBUS_SPI_BASE 0xF4000000
#define MBUS_SPI_SIZE (8 << 20)
+#endif
+#ifndef CONFIG_SPL_BUILD
#define MBUS_DFX_BASE 0xF6000000
#define MBUS_DFX_SIZE (1 << 20)
+#endif
#define MBUS_BOOTROM_BASE 0xF8000000
+#ifdef CONFIG_SPL_BUILD
+#define MBUS_BOOTROM_SIZE (128 << 20)
+#else
#define MBUS_BOOTROM_SIZE (8 << 20)
+#endif
struct mbus_win {
u32 base;
diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in
index ccb09975817..90cf00c5b98 100644
--- a/arch/arm/mach-mvebu/kwbimage.cfg.in
+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in
@@ -11,6 +11,11 @@ VERSION 1
# Boot Media configurations
#@BOOT_FROM
+# NAND configuration
+#@NAND_PAGE_SIZE
+#@NAND_BLKSZ
+#@NAND_BADBLK_LOCATION
+
# Enable BootROM output via DEBUG flag on SoCs which require it
#@DEBUG
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 943ae019425..3349f4eb549 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -53,7 +53,7 @@ u8 serdes_lane_in_use_count[MAX_UNITS_ID][MAX_UNIT_NUMB] = {
*/
u8 serdes_unit_count[MAX_UNITS_ID] = { 0 };
-/* Selector mapping for A380-A0 and A390-Z1 */
+/* Selector mapping for A380-A0 */
u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {
/* 0 1 2 3 4 5 6 */
{ 0x1, 0x1, NA, NA, NA, NA, NA }, /* PEX0 */
@@ -812,7 +812,7 @@ u8 hws_ctrl_serdes_rev_get(void)
if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID)
return MV_SERDES_REV_1_2;
- /* for A39x-Z1, A38x-A0 */
+ /* for A38x-A0 */
return MV_SERDES_REV_2_1;
}
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
index dd229e1a470..6925a9d236e 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
@@ -15,12 +15,12 @@
#define SET_BIT(data, bit) ((data) | (0x1 << (bit)))
#define CLEAR_BIT(data, bit) ((data) & (~(0x1 << (bit))))
-#define MAX_SERDES_LANES 7 /* as in a39x */
+#define MAX_SERDES_LANES 7
/* Serdes revision */
/* Serdes revision 1.2 (for A38x-Z1) */
#define MV_SERDES_REV_1_2 0x0
-/* Serdes revision 2.1 (for A39x-Z1, A38x-A0) */
+/* Serdes revision 2.1 (for A38x-A0) */
#define MV_SERDES_REV_2_1 0x1
#define MV_SERDES_REV_NA 0xff
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
index 950680a5816..fb8ec11dfb9 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
@@ -145,10 +145,6 @@ u32 sys_env_id_index_get(u32 ctrl_model)
return MV_6811_INDEX;
case MV_6828_DEV_ID:
return MV_6828_INDEX;
- case MV_6920_DEV_ID:
- return MV_6920_INDEX;
- case MV_6928_DEV_ID:
- return MV_6928_INDEX;
default:
return MV_6820_INDEX;
}
@@ -183,11 +179,9 @@ u16 sys_env_model_get(void)
case MV_6810_DEV_ID:
case MV_6811_DEV_ID:
case MV_6828_DEV_ID:
- case MV_6920_DEV_ID:
- case MV_6928_DEV_ID:
return ctrl_id;
default:
- /* Device ID Default for A38x: 6820 , for A39x: 6920 */
+ /* Device ID Default for A38x: 6820 */
default_ctrl_id = MV_6820_DEV_ID;
printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
__func__, ctrl_id, default_ctrl_id);
@@ -201,8 +195,8 @@ u16 sys_env_model_get(void)
*/
u32 sys_env_device_id_get(void)
{
- char *device_id_str[7] = {
- "6810", "6820", "6811", "6828", "NONE", "6920", "6928"
+ char *device_id_str[4] = {
+ "6810", "6820", "6811", "6828",
};
if (g_dev_id != -1)
@@ -210,7 +204,7 @@ u32 sys_env_device_id_get(void)
g_dev_id = reg_read(DEVICE_SAMPLE_AT_RESET1_REG);
g_dev_id = g_dev_id >> SAR_DEV_ID_OFFS & SAR_DEV_ID_MASK;
- printf("Detected Device ID %s\n", device_id_str[g_dev_id]);
+ printf("Detected Device ID %s\n", g_dev_id < 4 ? device_id_str[g_dev_id] : "NONE");
return g_dev_id;
}
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
index 94c43b4dafa..20039f72d8b 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
@@ -198,22 +198,6 @@
#define A38X_MV_MARVELL_BOARD_NUM (A38X_MV_MAX_MARVELL_BOARD_ID - \
A38X_MARVELL_BOARD_ID_BASE)
-/* Customer boards for A39x */
-#define A39X_CUSTOMER_BOARD_ID_BASE 0x20
-#define A39X_CUSTOMER_BOARD_ID0 (A39X_CUSTOMER_BOARD_ID_BASE + 0)
-#define A39X_CUSTOMER_BOARD_ID1 (A39X_CUSTOMER_BOARD_ID_BASE + 1)
-#define A39X_MV_MAX_CUSTOMER_BOARD_ID (A39X_CUSTOMER_BOARD_ID_BASE + 2)
-#define A39X_MV_CUSTOMER_BOARD_NUM (A39X_MV_MAX_CUSTOMER_BOARD_ID - \
- A39X_CUSTOMER_BOARD_ID_BASE)
-
-/* Marvell boards for A39x */
-#define A39X_MARVELL_BOARD_ID_BASE 0x30
-#define A39X_DB_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 0)
-#define A39X_RD_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 1)
-#define A39X_MV_MAX_MARVELL_BOARD_ID (A39X_MARVELL_BOARD_ID_BASE + 2)
-#define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \
- A39X_MARVELL_BOARD_ID_BASE)
-
#define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE
#define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0
#define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1
@@ -236,8 +220,6 @@
#define MV_88F68XX_Z1_ID 0x0
#define MV_88F68XX_A0_ID 0x4
#define MV_88F68XX_B0_ID 0xa
-/* A39x revisions */
-#define MV_88F69XX_Z1_ID 0x2
#define MPP_CONTROL_REG(id) (0x18000 + (id * 4))
#define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00)
@@ -257,19 +239,12 @@
#define MV_6811_DEV_ID 0x6811
#define MV_6820_DEV_ID 0x6820
#define MV_6828_DEV_ID 0x6828
-/* Armada 39x Family */
-#define MV_6920_DEV_ID 0x6920
-#define MV_6928_DEV_ID 0x6928
enum {
MV_6810,
MV_6820,
MV_6811,
MV_6828,
- MV_NONE,
- MV_6920,
- MV_6928,
- MV_MAX_DEV_ID,
};
#define MV_6820_INDEX 0
@@ -277,17 +252,12 @@ enum {
#define MV_6811_INDEX 2
#define MV_6828_INDEX 3
-#define MV_6920_INDEX 0
-#define MV_6928_INDEX 1
-
#define MAX_DEV_ID_NUM 4
#define MV_6820_INDEX 0
#define MV_6810_INDEX 1
#define MV_6811_INDEX 2
#define MV_6828_INDEX 3
-#define MV_6920_INDEX 0
-#define MV_6928_INDEX 1
enum unit_id {
PEX_UNIT_ID,
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 424599286e5..6b8c72a71da 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -33,21 +33,44 @@
#endif
/*
- * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
- * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
- * header and figure out at which sector the U-Boot proper binary is stored.
- * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
- * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
- * kwbimage main header.
+ * When loading U-Boot via SPL from eMMC, the kwbimage main header is stored at
+ * sector 0 and either on HW boot partition or on data partition. Choice of HW
+ * partition depends on what is configured in eMMC EXT_CSC register.
+ * When loading U-Boot via SPL from SD card, the kwbimage main header is stored
+ * at sector 1.
+ * Therefore MBR/GPT partition booting, fixed sector number and fixed eMMC HW
+ * partition number are unsupported due to limitation of Marvell BootROM.
+ * Correct sector number must be determined as runtime in mvebu SPL code based
+ * on the detected boot source. Otherwise U-Boot SPL would not be able to load
+ * U-Boot proper.
+ * Runtime mvebu SPL sector calculation code expects:
+ * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0
+ * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
*/
#ifdef CONFIG_SPL_MMC
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT
+#error CONFIG_SYS_MMCSD_FS_BOOT is unsupported
+#endif
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#error CONFIG_SYS_MMCSD_FS_BOOT_PARTITION is unsupported
+#endif
+#ifdef CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG
+#error CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG is unsupported
+#endif
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
+#error CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION is unsupported
+#endif
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
#endif
-#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
+#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR must be enabled for SD/eMMC boot support
+#endif
+#if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) || \
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
#endif
-#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \
+#if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) || \
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
#endif
@@ -98,7 +121,12 @@ struct kwbimage_main_hdr_v1 {
#ifdef CONFIG_SPL_MMC
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
{
- return MMCSD_MODE_RAW;
+ return IS_SD(mmc) ? MMCSD_MODE_RAW : MMCSD_MODE_EMMCBOOT;
+}
+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
+ unsigned long raw_sect)
+{
+ return IS_SD(mmc) ? 1 : 0;
}
#endif
@@ -169,9 +197,7 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
}
if (IS_ENABLED(CONFIG_SPL_MMC) &&
- (bootdev->boot_device == BOOT_DEVICE_MMC1 ||
- bootdev->boot_device == BOOT_DEVICE_MMC2 ||
- bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
+ (bootdev->boot_device == BOOT_DEVICE_MMC1) &&
mhdr->blockid != IBR_HDR_SDIO_ID) {
printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
mhdr->blockid);
@@ -182,26 +208,9 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
/*
* For SATA srcaddr is specified in number of sectors.
- * The main header is must be stored at sector number 1.
- * This expects that sector size is 512 bytes and recalculates
- * data offset to bytes relative to the main header.
- */
- if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
- if (spl_image->offset < 1) {
- printf("ERROR: Wrong srcaddr (0x%08x) in SATA kwbimage\n",
- spl_image->offset);
- return -EINVAL;
- }
- spl_image->offset -= 1;
- spl_image->offset *= 512;
- }
-
- /*
- * For SDIO (eMMC) srcaddr is specified in number of sectors.
- * This expects that sector size is 512 bytes and recalculates
- * data offset to bytes.
+ * This expects that sector size is 512 bytes.
*/
- if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID)
+ if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID)
spl_image->offset *= 512;
if (spl_image->offset % 4 != 0) {
@@ -299,19 +308,6 @@ int board_return_to_bootrom(struct spl_image_info *spl_image,
hang();
}
-/*
- * SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM.
- * Proper U-Boot removes this direct mapping. So it is available only in SPL.
- */
-#if defined(CONFIG_SPL_ENV_IS_IN_SPI_FLASH) && \
- CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \
- CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= 64*1024*1024
-void *env_sf_get_env_addr(void)
-{
- return (void *)0xD4000000 + CONFIG_ENV_OFFSET;
-}
-#endif
-
void board_init_f(ulong dummy)
{
int ret;
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-19 16:12:38 +0000