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-rw-r--r--arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi4
-rw-r--r--arch/arm/dts/r8a7790-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a7791-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a7792-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a7793-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a7794-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77951-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77960-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77965-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77970-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77980-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77990-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77995-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a779x-u-boot.dtsi2
-rw-r--r--arch/arm/dts/stm32mp15-u-boot.dtsi3
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi4
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c2
-rw-r--r--arch/arm/mach-renesas/Kconfig.324
-rw-r--r--arch/arm/mach-renesas/include/mach/boot0.h2
-rw-r--r--arch/arm/mach-renesas/memmap-gen3.c2
-rw-r--r--arch/arm/mach-stm32mp/stm32mp1/cpu.c7
21 files changed, 35 insertions, 19 deletions
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
index aacf181e2dd..4202d1e5654 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
@@ -203,3 +203,7 @@
&sysclk {
bootph-all;
};
+
+&usb0 {
+ dr_mode = "host";
+};
diff --git a/arch/arm/dts/r8a7790-u-boot.dtsi b/arch/arm/dts/r8a7790-u-boot.dtsi
index 45e2fa6f9f0..2a7d76bd7b1 100644
--- a/arch/arm/dts/r8a7790-u-boot.dtsi
+++ b/arch/arm/dts/r8a7790-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7790 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7790 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a7791-u-boot.dtsi b/arch/arm/dts/r8a7791-u-boot.dtsi
index 7143ffc1658..bb0e2fd106c 100644
--- a/arch/arm/dts/r8a7791-u-boot.dtsi
+++ b/arch/arm/dts/r8a7791-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7791 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7791 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a7792-u-boot.dtsi b/arch/arm/dts/r8a7792-u-boot.dtsi
index 214cfde1f89..ebbdcb7efd5 100644
--- a/arch/arm/dts/r8a7792-u-boot.dtsi
+++ b/arch/arm/dts/r8a7792-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7792 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7792 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a7793-u-boot.dtsi b/arch/arm/dts/r8a7793-u-boot.dtsi
index fb947462c54..08f2248e1f3 100644
--- a/arch/arm/dts/r8a7793-u-boot.dtsi
+++ b/arch/arm/dts/r8a7793-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7793 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7793 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a7794-u-boot.dtsi b/arch/arm/dts/r8a7794-u-boot.dtsi
index 53b54c88917..303afaeb4ce 100644
--- a/arch/arm/dts/r8a7794-u-boot.dtsi
+++ b/arch/arm/dts/r8a7794-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7794 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7794 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77951-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi
index 4cbec591479..c16c5116592 100644
--- a/arch/arm/dts/r8a77951-u-boot.dtsi
+++ b/arch/arm/dts/r8a77951-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7795 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7795 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi
index 15a91474324..2245be2aa76 100644
--- a/arch/arm/dts/r8a77960-u-boot.dtsi
+++ b/arch/arm/dts/r8a77960-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A7796 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A7796 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi
index 54107d1ae35..f39acc237d3 100644
--- a/arch/arm/dts/r8a77965-u-boot.dtsi
+++ b/arch/arm/dts/r8a77965-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A77965 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A77965 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi
index d252c2e8e6c..7900c641ba1 100644
--- a/arch/arm/dts/r8a77970-u-boot.dtsi
+++ b/arch/arm/dts/r8a77970-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A77970 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A77970 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi
index 9f7bf499bc0..aa7e058c585 100644
--- a/arch/arm/dts/r8a77980-u-boot.dtsi
+++ b/arch/arm/dts/r8a77980-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A77980 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A77980 SoC
*
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi
index 50bbbe18647..b701f68db81 100644
--- a/arch/arm/dts/r8a77990-u-boot.dtsi
+++ b/arch/arm/dts/r8a77990-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A77990 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A77990 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi
index 347b59ac42c..f4bafb6d088 100644
--- a/arch/arm/dts/r8a77995-u-boot.dtsi
+++ b/arch/arm/dts/r8a77995-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar R8A77995 SoC
+ * Device Tree Source extras for U-Boot on R-Car R8A77995 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi
index 001ac59adb9..d1441f1f9df 100644
--- a/arch/arm/dts/r8a779x-u-boot.dtsi
+++ b/arch/arm/dts/r8a779x-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source extras for U-Boot on RCar Gen3
+ * Device Tree Source extras for U-Boot on R-Car Gen3
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi
index 66d4c40c6a8..3f57bd5fe0f 100644
--- a/arch/arm/dts/stm32mp15-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15-u-boot.dtsi
@@ -186,6 +186,9 @@
bootph-all;
#address-cells = <1>;
#size-cells = <0>;
+ clock-names = "hse", "hsi", "csi", "lse", "lsi";
+ clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
+ <&clk_lse>, <&clk_lsi>;
};
&usart1 {
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 08439342cb2..ab162f39473 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -112,6 +112,10 @@
};
&rcc {
+ clock-names = "hse", "hsi", "csi", "lse", "lsi";
+ clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
+ <&clk_lse>, <&clk_lsi>;
+
st,clksrc = <
CLK_MPU_PLL1P
CLK_AXI_PLL2P
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 9588b8b28bf..85dc8b51a14 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -362,7 +362,7 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
* space below the 4G address boundary (which is 3GiB big),
* even when the effective available memory is bigger.
*/
- top_addr = clamp_val((u64)PHYS_SDRAM + gd->ram_size, 0, 0xffffffff);
+ top_addr = clamp_val((u64)PHYS_SDRAM + gd->ram_size, 0, SZ_4G);
/*
* rom_pointer[0] stores the TEE memory start address.
diff --git a/arch/arm/mach-renesas/Kconfig.32 b/arch/arm/mach-renesas/Kconfig.32
index 693a5abba0d..bbc61ccf480 100644
--- a/arch/arm/mach-renesas/Kconfig.32
+++ b/arch/arm/mach-renesas/Kconfig.32
@@ -1,11 +1,11 @@
if RCAR_32
config ARCH_RENESAS_BOARD_STRING
- string "Renesas RCar Gen2 board name"
+ string "Renesas R-Car Gen2 board name"
default "Board"
config RCAR_GEN2
- bool "Renesas RCar Gen2"
+ bool "Renesas R-Car Gen2"
select PHY
select PHY_RCAR_GEN2
select TMU_TIMER
diff --git a/arch/arm/mach-renesas/include/mach/boot0.h b/arch/arm/mach-renesas/include/mach/boot0.h
index fe88a2e0373..2128eccd8a4 100644
--- a/arch/arm/mach-renesas/include/mach/boot0.h
+++ b/arch/arm/mach-renesas/include/mach/boot0.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Specialty padding for the RCar Gen2 SPL JTAG loading
+ * Specialty padding for the R-Car Gen2 SPL JTAG loading
*/
#ifndef __BOOT0_H
diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c
index c50700df078..d24419f5daa 100644
--- a/arch/arm/mach-renesas/memmap-gen3.c
+++ b/arch/arm/mach-renesas/memmap-gen3.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Renesas RCar Gen3 memory map tables
+ * Renesas R-Car Gen3 memory map tables
*
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
*/
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 62cc98910a7..cb1b84c9af9 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -53,6 +53,7 @@ void dram_bank_mmu_setup(int bank)
struct bd_info *bd = gd->bd;
int i;
phys_addr_t start;
+ phys_addr_t addr;
phys_size_t size;
bool use_lmb = false;
enum dcache_option option;
@@ -77,8 +78,12 @@ void dram_bank_mmu_setup(int bank)
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
+ addr = i << MMU_SECTION_SHIFT;
option = DCACHE_DEFAULT_OPTION;
- if (use_lmb && lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP))
+ if (use_lmb &&
+ (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
+ addr >= gd->ram_top)
+ )
option = 0; /* INVALID ENTRY in TLB */
set_section_dcache(i, option);
}
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-24 10:25:03 +0000