summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/mpc5xxx/i2c.c5
-rw-r--r--arch/powerpc/cpu/mpc5xxx/usb_ohci.c3
-rw-r--r--arch/powerpc/cpu/mpc8220/fec.c6
-rw-r--r--arch/powerpc/cpu/mpc8220/i2c.c6
-rw-r--r--arch/powerpc/cpu/mpc8260/i2c.c573
-rw-r--r--arch/powerpc/cpu/mpc8260/speed.c11
-rw-r--r--arch/powerpc/cpu/mpc8260/spi.c4
-rw-r--r--arch/powerpc/cpu/mpc8xx/cpu.c3
-rw-r--r--arch/powerpc/cpu/mpc8xx/fec.c47
-rw-r--r--arch/powerpc/cpu/mpc8xx/i2c.c373
-rw-r--r--arch/powerpc/cpu/mpc8xx/spi.c4
-rw-r--r--arch/powerpc/lib/bat_rw.c3
-rw-r--r--arch/powerpc/lib/board.c458
13 files changed, 738 insertions, 758 deletions
diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
index f9d293b7ce7..b423d2fe341 100644
--- a/arch/powerpc/cpu/mpc5xxx/i2c.c
+++ b/arch/powerpc/cpu/mpc5xxx/i2c.c
@@ -100,14 +100,11 @@ static int wait_for_bb(void)
status = mpc_reg_in(&regs->msr);
while (timeout-- && (status & I2C_BB)) {
-#if 1
- volatile int temp;
mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
- temp = mpc_reg_in(&regs->mdr);
+ (void)mpc_reg_in(&regs->mdr);
mpc_reg_out(&regs->mcr, 0, I2C_STA);
mpc_reg_out(&regs->mcr, 0, 0);
mpc_reg_out(&regs->mcr, I2C_EN, 0);
-#endif
udelay(15);
status = mpc_reg_in(&regs->msr);
}
diff --git a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
index 2fc1180b782..d250c199f83 100644
--- a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
+++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
@@ -748,10 +748,9 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf
static void dl_transfer_length(td_t * td)
{
- __u32 tdINFO, tdBE, tdCBP;
+ __u32 tdBE, tdCBP;
urb_priv_t *lurb_priv = &urb_priv;
- tdINFO = ohci_cpu_to_le32 (td->hwINFO);
tdBE = ohci_cpu_to_le32 (td->hwBE);
tdCBP = ohci_cpu_to_le32 (td->hwCBP);
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index bcda8a2b277..2053fea5713 100644
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
@@ -772,8 +772,8 @@ static int mpc8220_fec_recv (struct eth_device *dev)
frame = (NBUF *) pRbd->dataPointer;
frame_length = pRbd->dataLength - 4;
-#if (0)
- {
+ /* DEBUG code */
+ if (_DEBUG) {
int i;
printf ("recv data hdr:");
@@ -781,7 +781,7 @@ static int mpc8220_fec_recv (struct eth_device *dev)
printf ("%x ", *(frame->head + i));
printf ("\n");
}
-#endif
+
/*
* Fill the buffer and pass it to upper layers
*/
diff --git a/arch/powerpc/cpu/mpc8220/i2c.c b/arch/powerpc/cpu/mpc8220/i2c.c
index 76ecdf11e21..2f35d20c87e 100644
--- a/arch/powerpc/cpu/mpc8220/i2c.c
+++ b/arch/powerpc/cpu/mpc8220/i2c.c
@@ -105,15 +105,13 @@ static int wait_for_bb (void)
status = mpc_reg_in (&regs->sr);
while (timeout-- && (status & I2C_BB)) {
-#if 1
- volatile int temp;
mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
- temp = mpc_reg_in (&regs->dr);
+ (void)mpc_reg_in (&regs->dr);
mpc_reg_out (&regs->cr, 0, I2C_STA);
mpc_reg_out (&regs->cr, 0, 0);
mpc_reg_out (&regs->cr, I2C_EN, 0);
-#endif
+
udelay (1000);
status = mpc_reg_in (&regs->sr);
}
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index d2bdcc2d827..7382cbadc7e 100644
--- a/arch/powerpc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
@@ -31,13 +31,10 @@
#include <asm/cpm_8260.h>
#include <i2c.h>
-/* define to enable debug messages */
-#undef DEBUG_I2C
-
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
+static unsigned int i2c_bus_num __attribute__ ((section(".data"))) = 0;
#endif /* CONFIG_I2C_MULTI_BUS */
/* uSec to wait between polls of the i2c */
@@ -51,52 +48,50 @@ static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
*/
#define TOUT_LOOP 5
-/*-----------------------------------------------------------------------
+/*
* Set default values
*/
#ifndef CONFIG_SYS_I2C_SPEED
#define CONFIG_SYS_I2C_SPEED 50000
#endif
-/*-----------------------------------------------------------------------
- */
-typedef void (*i2c_ecb_t)(int, int, void *); /* error callback function */
+typedef void (*i2c_ecb_t) (int, int, void *); /* error callback function */
/* This structure keeps track of the bd and buffer space usage. */
typedef struct i2c_state {
- int rx_idx; /* index to next free Rx BD */
- int tx_idx; /* index to next free Tx BD */
- void *rxbd; /* pointer to next free Rx BD */
- void *txbd; /* pointer to next free Tx BD */
- int tx_space; /* number of Tx bytes left */
- unsigned char *tx_buf; /* pointer to free Tx area */
- i2c_ecb_t err_cb; /* error callback function */
- void *cb_data; /* private data to be passed */
+ int rx_idx; /* index to next free Rx BD */
+ int tx_idx; /* index to next free Tx BD */
+ void *rxbd; /* pointer to next free Rx BD */
+ void *txbd; /* pointer to next free Tx BD */
+ int tx_space; /* number of Tx bytes left */
+ unsigned char *tx_buf; /* pointer to free Tx area */
+ i2c_ecb_t err_cb; /* error callback function */
+ void *cb_data; /* private data to be passed */
} i2c_state_t;
/* flags for i2c_send() and i2c_receive() */
-#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
-#define I2CF_START_COND 0x02 /* tx: generate start condition */
-#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
+#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
+#define I2CF_START_COND 0x02 /* tx: generate start condition */
+#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
/* return codes */
-#define I2CERR_NO_BUFFERS 1 /* no more BDs or buffer space */
-#define I2CERR_MSG_TOO_LONG 2 /* tried to send/receive to much data */
-#define I2CERR_TIMEOUT 3 /* timeout in i2c_doio() */
-#define I2CERR_QUEUE_EMPTY 4 /* i2c_doio called without send/receive */
-#define I2CERR_IO_ERROR 5 /* had an error during comms */
+#define I2CERR_NO_BUFFERS 1 /* no more BDs or buffer space */
+#define I2CERR_MSG_TOO_LONG 2 /* tried to send/receive to much data */
+#define I2CERR_TIMEOUT 3 /* timeout in i2c_doio() */
+#define I2CERR_QUEUE_EMPTY 4 /* i2c_doio called without send/rcv */
+#define I2CERR_IO_ERROR 5 /* had an error during comms */
/* error callback flags */
-#define I2CECB_RX_ERR 0x10 /* this is a receive error */
-#define I2CECB_RX_OV 0x02 /* receive overrun error */
-#define I2CECB_RX_MASK 0x0f /* mask for error bits */
-#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
-#define I2CECB_TX_CL 0x01 /* transmit collision error */
-#define I2CECB_TX_UN 0x02 /* transmit underflow error */
-#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
-#define I2CECB_TX_MASK 0x0f /* mask for error bits */
-#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
+#define I2CECB_RX_ERR 0x10 /* this is a receive error */
+#define I2CECB_RX_OV 0x02 /* receive overrun error */
+#define I2CECB_RX_MASK 0x0f /* mask for error bits */
+#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
+#define I2CECB_TX_CL 0x01 /* transmit collision error */
+#define I2CECB_TX_UN 0x02 /* transmit underflow error */
+#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
+#define I2CECB_TX_MASK 0x0f /* mask for error bits */
+#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
#define ERROR_I2C_NONE 0
#define ERROR_I2C_LENGTH 1
@@ -111,13 +106,13 @@ typedef struct i2c_state {
#define NUM_TX_BDS 4
#define MAX_TX_SPACE 256
-typedef struct I2C_BD
-{
- unsigned short status;
- unsigned short length;
- unsigned char *addr;
+typedef struct I2C_BD {
+ unsigned short status;
+ unsigned short length;
+ unsigned char *addr;
} I2C_BD;
-#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
+
+#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
#define BD_I2C_TX_CL 0x0001 /* collision error */
#define BD_I2C_TX_UN 0x0002 /* underflow error */
@@ -126,12 +121,6 @@ typedef struct I2C_BD
#define BD_I2C_RX_ERR BD_SC_OV
-#ifdef DEBUG_I2C
-#define PRINTD(x) printf x
-#else
-#define PRINTD(x)
-#endif
-
/*
* Returns the best value of I2BRG to meet desired clock speed of I2C with
* input parameters (clock speed, filter, and predivider value).
@@ -140,32 +129,32 @@ typedef struct I2C_BD
*/
static inline int
i2c_roundrate(int hz, int speed, int filter, int modval,
- int *brgval, int *totspeed)
+ int *brgval, int *totspeed)
{
- int moddiv = 1 << (5-(modval & 3)), brgdiv, div;
+ int moddiv = 1 << (5 - (modval & 3)), brgdiv, div;
- PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
- hz, speed, filter, modval));
+ debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
+ hz, speed, filter, modval);
- div = moddiv * speed;
- brgdiv = (hz + div - 1) / div;
+ div = moddiv * speed;
+ brgdiv = (hz + div - 1) / div;
- PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv));
+ debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv);
- *brgval = ((brgdiv + 1) / 2) - 3 - (2*filter);
+ *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter);
- if ((*brgval < 0) || (*brgval > 255)) {
- PRINTD(("\t\trejected brgval=%d\n", *brgval));
- return -1;
- }
+ if ((*brgval < 0) || (*brgval > 255)) {
+ debug("\t\trejected brgval=%d\n", *brgval);
+ return -1;
+ }
- brgdiv = 2 * (*brgval + 3 + (2 * filter));
- div = moddiv * brgdiv ;
- *totspeed = hz / div;
+ brgdiv = 2 * (*brgval + 3 + (2 * filter));
+ div = moddiv * brgdiv;
+ *totspeed = hz / div;
- PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed));
+ debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed);
- return 0;
+ return 0;
}
/*
@@ -173,84 +162,87 @@ i2c_roundrate(int hz, int speed, int filter, int modval,
*/
static int i2c_setrate(int hz, int speed)
{
- immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
- volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
- int brgval,
- modval, /* 0-3 */
- bestspeed_diff = speed,
- bestspeed_brgval=0,
- bestspeed_modval=0,
- bestspeed_filter=0,
- totspeed,
- filter = 0; /* Use this fixed value */
-
- for (modval = 0; modval < 4; modval++)
- {
- if (i2c_roundrate (hz, speed, filter, modval, &brgval, &totspeed) == 0)
- {
- int diff = speed - totspeed ;
-
- if ((diff >= 0) && (diff < bestspeed_diff))
- {
- bestspeed_diff = diff ;
- bestspeed_modval = modval;
- bestspeed_brgval = brgval;
- bestspeed_filter = filter;
+ immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+ volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
+ int brgval,
+ modval, /* 0-3 */
+ bestspeed_diff = speed,
+ bestspeed_brgval = 0,
+ bestspeed_modval = 0,
+ bestspeed_filter = 0,
+ totspeed,
+ filter = 0; /* Use this fixed value */
+
+ for (modval = 0; modval < 4; modval++) {
+ if (i2c_roundrate(hz, speed, filter, modval, &brgval, &totspeed)
+ == 0) {
+ int diff = speed - totspeed;
+
+ if ((diff >= 0) && (diff < bestspeed_diff)) {
+ bestspeed_diff = diff;
+ bestspeed_modval = modval;
+ bestspeed_brgval = brgval;
+ bestspeed_filter = filter;
}
}
}
- PRINTD(("[I2C] Best is:\n"));
- PRINTD(("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
- hz, speed,
- bestspeed_filter, bestspeed_modval, bestspeed_brgval,
- bestspeed_diff));
+ debug("[I2C] Best is:\n");
+ debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
+ hz, speed, bestspeed_filter, bestspeed_modval, bestspeed_brgval,
+ bestspeed_diff);
- i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
- i2c->i2c_i2brg = bestspeed_brgval & 0xff;
+ i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) |
+ (bestspeed_filter << 3);
+ i2c->i2c_i2brg = bestspeed_brgval & 0xff;
- PRINTD(("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod, i2c->i2c_i2brg));
+ debug("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod,
+ i2c->i2c_i2brg);
- return 1 ;
+ return 1;
}
void i2c_init(int speed, int slaveadd)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm;
- volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
+ volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
volatile iic_t *iip;
ulong rbase, tbase;
volatile I2C_BD *rxbd, *txbd;
uint dpaddr;
#ifdef CONFIG_SYS_I2C_INIT_BOARD
- /* call board specific i2c bus reset routine before accessing the */
- /* environment, which might be in a chip on that bus. For details */
- /* about this problem see doc/I2C_Edge_Conditions. */
+ /*
+ * call board specific i2c bus reset routine before accessing the
+ * environment, which might be in a chip on that bus. For details
+ * about this problem see doc/I2C_Edge_Conditions.
+ */
i2c_init_board();
#endif
- dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE]));
+ dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE]));
if (dpaddr == 0) {
- /* need to allocate dual port ram */
- dpaddr = m8260_cpm_dpalloc(64 +
- (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) +
- MAX_TX_SPACE, 64);
- *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])) = dpaddr;
+ /* need to allocate dual port ram */
+ dpaddr = m8260_cpm_dpalloc(64 +
+ (NUM_RX_BDS * sizeof(I2C_BD)) +
+ (NUM_TX_BDS * sizeof(I2C_BD)) +
+ MAX_TX_SPACE, 64);
+ *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])) =
+ dpaddr;
}
/*
* initialise data in dual port ram:
*
- * dpaddr -> parameter ram (64 bytes)
+ * dpaddr -> parameter ram (64 bytes)
* rbase -> rx BD (NUM_RX_BDS * sizeof(I2C_BD) bytes)
* tbase -> tx BD (NUM_TX_BDS * sizeof(I2C_BD) bytes)
* tx buffer (MAX_TX_SPACE bytes)
*/
iip = (iic_t *)&immap->im_dprambase[dpaddr];
- memset((void*)iip, 0, sizeof(iic_t));
+ memset((void *)iip, 0, sizeof(iic_t));
rbase = dpaddr + 64;
tbase = rbase + NUM_RX_BDS * sizeof(I2C_BD);
@@ -266,8 +258,8 @@ void i2c_init(int speed, int slaveadd)
* and current CPU rate (we assume sccr dfbgr field is 0;
* divide BRGCLK by 1)
*/
- PRINTD(("[I2C] Setting rate...\n"));
- i2c_setrate (gd->brg_clk, CONFIG_SYS_I2C_SPEED) ;
+ debug("[I2C] Setting rate...\n");
+ i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED);
/* Set I2C controller in master mode */
i2c->i2c_i2com = 0x01;
@@ -275,13 +267,15 @@ void i2c_init(int speed, int slaveadd)
/* Initialize Tx/Rx parameters */
iip->iic_rbase = rbase;
iip->iic_tbase = tbase;
- rxbd = (I2C_BD *)((unsigned char *)&immap->im_dprambase[iip->iic_rbase]);
- txbd = (I2C_BD *)((unsigned char *)&immap->im_dprambase[iip->iic_tbase]);
+ rxbd = (I2C_BD *)((unsigned char *) &immap->
+ im_dprambase[iip->iic_rbase]);
+ txbd = (I2C_BD *)((unsigned char *) &immap->
+ im_dprambase[iip->iic_tbase]);
- PRINTD(("[I2C] rbase = %04x\n", iip->iic_rbase));
- PRINTD(("[I2C] tbase = %04x\n", iip->iic_tbase));
- PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
+ debug("[I2C] rbase = %04x\n", iip->iic_rbase);
+ debug("[I2C] tbase = %04x\n", iip->iic_tbase);
+ debug("[I2C] rxbd = %08x\n", (int) rxbd);
+ debug("[I2C] txbd = %08x\n", (int) txbd);
/* Set big endian byte order */
iip->iic_tfcr = 0x10;
@@ -290,13 +284,12 @@ void i2c_init(int speed, int slaveadd)
/* Set maximum receive size. */
iip->iic_mrblr = I2C_RXTX_LEN;
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_I2C_PAGE,
- CPM_CR_I2C_SBLOCK,
- 0x00,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- do {
- __asm__ __volatile__ ("eieio");
- } while (cp->cp_cpcr & CPM_CR_FLG);
+ cp->cp_cpcr = mk_cr_cmd(CPM_CR_I2C_PAGE,
+ CPM_CR_I2C_SBLOCK,
+ 0x00, CPM_CR_INIT_TRX) | CPM_CR_FLG;
+ do {
+ __asm__ __volatile__("eieio");
+ } while (cp->cp_cpcr & CPM_CR_FLG);
/* Clear events and interrupts */
i2c->i2c_i2cer = 0xff;
@@ -306,147 +299,136 @@ void i2c_init(int speed, int slaveadd)
static
void i2c_newio(i2c_state_t *state)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile iic_t *iip;
uint dpaddr;
- PRINTD(("[I2C] i2c_newio\n"));
+ debug("[I2C] i2c_newio\n");
- dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE]));
+ dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE]));
iip = (iic_t *)&immap->im_dprambase[dpaddr];
state->rx_idx = 0;
state->tx_idx = 0;
- state->rxbd = (void*)&immap->im_dprambase[iip->iic_rbase];
- state->txbd = (void*)&immap->im_dprambase[iip->iic_tbase];
+ state->rxbd = (void *)&immap->im_dprambase[iip->iic_rbase];
+ state->txbd = (void *)&immap->im_dprambase[iip->iic_tbase];
state->tx_space = MAX_TX_SPACE;
- state->tx_buf = (uchar*)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
+ state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
state->err_cb = NULL;
state->cb_data = NULL;
- PRINTD(("[I2C] rxbd = %08x\n", (int)state->rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)state->txbd));
- PRINTD(("[I2C] tx_buf = %08x\n", (int)state->tx_buf));
+ debug("[I2C] rxbd = %08x\n", (int)state->rxbd);
+ debug("[I2C] txbd = %08x\n", (int)state->txbd);
+ debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf);
/* clear the buffer memory */
- memset((char *)state->tx_buf, 0, MAX_TX_SPACE);
+ memset((char *) state->tx_buf, 0, MAX_TX_SPACE);
}
static
int i2c_send(i2c_state_t *state,
- unsigned char address,
- unsigned char secondary_address,
- unsigned int flags,
- unsigned short size,
- unsigned char *dataout)
+ unsigned char address,
+ unsigned char secondary_address,
+ unsigned int flags, unsigned short size, unsigned char *dataout)
{
volatile I2C_BD *txbd;
- int i,j;
+ int i, j;
- PRINTD(("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
- address, secondary_address, flags, size));
+ debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
+ address, secondary_address, flags, size);
/* trying to send message larger than BD */
if (size > I2C_RXTX_LEN)
- return I2CERR_MSG_TOO_LONG;
+ return I2CERR_MSG_TOO_LONG;
/* no more free bds */
if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size))
- return I2CERR_NO_BUFFERS;
+ return I2CERR_NO_BUFFERS;
txbd = (I2C_BD *)state->txbd;
txbd->addr = state->tx_buf;
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
-
- if (flags & I2CF_START_COND)
- {
- PRINTD(("[I2C] Formatting addresses...\n"));
- if (flags & I2CF_ENABLE_SECONDARY)
- {
- txbd->length = size + 2; /* Length of message plus dest addresses */
- txbd->addr[0] = address << 1;
- txbd->addr[1] = secondary_address;
- i = 2;
- }
- else
- {
- txbd->length = size + 1; /* Length of message plus dest address */
- txbd->addr[0] = address << 1; /* Write destination address to BD */
- i = 1;
+ debug("[I2C] txbd = %08x\n", (int) txbd);
+
+ if (flags & I2CF_START_COND) {
+ debug("[I2C] Formatting addresses...\n");
+ if (flags & I2CF_ENABLE_SECONDARY) {
+ /* Length of message plus dest addresses */
+ txbd->length = size + 2;
+ txbd->addr[0] = address << 1;
+ txbd->addr[1] = secondary_address;
+ i = 2;
+ } else {
+ /* Length of message plus dest address */
+ txbd->length = size + 1;
+ /* Write destination address to BD */
+ txbd->addr[0] = address << 1;
+ i = 1;
+ }
+ } else {
+ txbd->length = size; /* Length of message */
+ i = 0;
}
- }
- else
- {
- txbd->length = size; /* Length of message */
- i = 0;
- }
/* set up txbd */
txbd->status = BD_SC_READY;
if (flags & I2CF_START_COND)
- txbd->status |= BD_I2C_TX_START;
+ txbd->status |= BD_I2C_TX_START;
if (flags & I2CF_STOP_COND)
- txbd->status |= BD_SC_LAST | BD_SC_WRAP;
+ txbd->status |= BD_SC_LAST | BD_SC_WRAP;
/* Copy data to send into buffer */
- PRINTD(("[I2C] copy data...\n"));
- for(j = 0; j < size; i++, j++)
- txbd->addr[i] = dataout[j];
+ debug("[I2C] copy data...\n");
+ for (j = 0; j < size; i++, j++)
+ txbd->addr[i] = dataout[j];
- PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- txbd->length,
- txbd->status,
- txbd->addr[0],
- txbd->addr[1]));
+ debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]);
/* advance state */
state->tx_buf += txbd->length;
state->tx_space -= txbd->length;
state->tx_idx++;
- state->txbd = (void*)(txbd + 1);
+ state->txbd = (void *) (txbd + 1);
return 0;
}
static
int i2c_receive(i2c_state_t *state,
- unsigned char address,
- unsigned char secondary_address,
- unsigned int flags,
- unsigned short size_to_expect,
- unsigned char *datain)
+ unsigned char address,
+ unsigned char secondary_address,
+ unsigned int flags,
+ unsigned short size_to_expect, unsigned char *datain)
{
volatile I2C_BD *rxbd, *txbd;
- PRINTD(("[I2C] i2c_receive %02d %02d %02d\n", address, secondary_address, flags));
+ debug("[I2C] i2c_receive %02d %02d %02d\n", address,
+ secondary_address, flags);
/* Expected to receive too much */
if (size_to_expect > I2C_RXTX_LEN)
- return I2CERR_MSG_TOO_LONG;
+ return I2CERR_MSG_TOO_LONG;
/* no more free bds */
if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS
- || state->tx_space < 2)
- return I2CERR_NO_BUFFERS;
+ || state->tx_space < 2)
+ return I2CERR_NO_BUFFERS;
- rxbd = (I2C_BD *)state->rxbd;
- txbd = (I2C_BD *)state->txbd;
+ rxbd = (I2C_BD *) state->rxbd;
+ txbd = (I2C_BD *) state->txbd;
- PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
+ debug("[I2C] rxbd = %08x\n", (int) rxbd);
+ debug("[I2C] txbd = %08x\n", (int) txbd);
txbd->addr = state->tx_buf;
/* set up TXBD for destination address */
- if (flags & I2CF_ENABLE_SECONDARY)
- {
+ if (flags & I2CF_ENABLE_SECONDARY) {
txbd->length = 2;
- txbd->addr[0] = address << 1; /* Write data */
- txbd->addr[1] = secondary_address; /* Internal address */
+ txbd->addr[0] = address << 1; /* Write data */
+ txbd->addr[1] = secondary_address; /* Internal address */
txbd->status = BD_SC_READY;
- }
- else
- {
+ } else {
txbd->length = 1 + size_to_expect;
txbd->addr[0] = (address << 1) | 0x01;
txbd->status = BD_SC_READY;
@@ -459,30 +441,23 @@ int i2c_receive(i2c_state_t *state,
rxbd->addr = datain;
txbd->status |= BD_I2C_TX_START;
- if (flags & I2CF_STOP_COND)
- {
+ if (flags & I2CF_STOP_COND) {
txbd->status |= BD_SC_LAST | BD_SC_WRAP;
rxbd->status |= BD_SC_WRAP;
}
- PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- txbd->length,
- txbd->status,
- txbd->addr[0],
- txbd->addr[1]));
- PRINTD(("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- rxbd->length,
- rxbd->status,
- rxbd->addr[0],
- rxbd->addr[1]));
+ debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]);
+ debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ rxbd->length, rxbd->status, rxbd->addr[0], rxbd->addr[1]);
/* advance state */
state->tx_buf += txbd->length;
state->tx_space -= txbd->length;
state->tx_idx++;
- state->txbd = (void*)(txbd + 1);
+ state->txbd = (void *) (txbd + 1);
state->rx_idx++;
- state->rxbd = (void*)(rxbd + 1);
+ state->rxbd = (void *) (rxbd + 1);
return 0;
}
@@ -491,27 +466,27 @@ int i2c_receive(i2c_state_t *state,
static
int i2c_doio(i2c_state_t *state)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile iic_t *iip;
- volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
+ volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
volatile I2C_BD *txbd, *rxbd;
- int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0;
+ int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0;
uint dpaddr;
- PRINTD(("[I2C] i2c_doio\n"));
+ debug("[I2C] i2c_doio\n");
if (state->tx_idx <= 0 && state->rx_idx <= 0) {
- PRINTD(("[I2C] No I/O is queued\n"));
+ debug("[I2C] No I/O is queued\n");
return I2CERR_QUEUE_EMPTY;
}
- dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE]));
+ dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE]));
iip = (iic_t *)&immap->im_dprambase[dpaddr];
iip->iic_rbptr = iip->iic_rbase;
iip->iic_tbptr = iip->iic_tbase;
/* Enable I2C */
- PRINTD(("[I2C] Enabling I2C...\n"));
+ debug("[I2C] Enabling I2C...\n");
i2c->i2c_i2mod |= 0x01;
/* Begin transmission */
@@ -519,90 +494,100 @@ int i2c_doio(i2c_state_t *state)
/* Loop until transmit & receive completed */
- if ((n = state->tx_idx) > 0) {
+ n = state->tx_idx;
+
+ if (n > 0) {
- txbd = ((I2C_BD*)state->txbd) - n;
+ txbd = ((I2C_BD *) state->txbd) - n;
for (i = 0; i < n; i++) {
txtimeo += TOUT_LOOP * txbd->length;
txbd++;
}
- txbd--; /* wait until last in list is done */
+ txbd--; /* wait until last in list is done */
- PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd));
+ debug("[I2C] Transmitting...(txbd=0x%08lx)\n",
+ (ulong) txbd);
udelay(START_DELAY_US); /* give it time to start */
- while((txbd->status & BD_SC_READY) && (++txcnt < txtimeo)) {
+ while ((txbd->status & BD_SC_READY) && (++txcnt < txtimeo)) {
udelay(DELAY_US);
if (ctrlc())
- return (-1);
- __asm__ __volatile__ ("eieio");
+ return -1;
+ __asm__ __volatile__("eieio");
}
}
- if (txcnt < txtimeo && (n = state->rx_idx) > 0) {
+ n = state->rx_idx;
- rxbd = ((I2C_BD*)state->rxbd) - n;
+ if (txcnt < txtimeo && n > 0) {
+
+ rxbd = ((I2C_BD *) state->rxbd) - n;
for (i = 0; i < n; i++) {
rxtimeo += TOUT_LOOP * rxbd->length;
rxbd++;
}
- rxbd--; /* wait until last in list is done */
+ rxbd--; /* wait until last in list is done */
- PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd));
+ debug("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong) rxbd);
udelay(START_DELAY_US); /* give it time to start */
- while((rxbd->status & BD_SC_EMPTY) && (++rxcnt < rxtimeo)) {
+ while ((rxbd->status & BD_SC_EMPTY) && (++rxcnt < rxtimeo)) {
udelay(DELAY_US);
if (ctrlc())
- return (-1);
- __asm__ __volatile__ ("eieio");
+ return -1;
+ __asm__ __volatile__("eieio");
}
}
/* Turn off I2C */
i2c->i2c_i2mod &= ~0x01;
- if ((n = state->tx_idx) > 0) {
+ n = state->tx_idx;
+
+ if (n > 0) {
for (i = 0; i < n; i++) {
- txbd = ((I2C_BD*)state->txbd) - (n - i);
- if ((b = txbd->status & BD_I2C_TX_ERR) != 0) {
+ txbd = ((I2C_BD *) state->txbd) - (n - i);
+ b = txbd->status & BD_I2C_TX_ERR;
+ if (b != 0) {
if (state->err_cb != NULL)
- (*state->err_cb)(I2CECB_TX_ERR|b, i,
- state->cb_data);
+ (*state->err_cb) (I2CECB_TX_ERR | b,
+ i, state->cb_data);
if (rc == 0)
rc = I2CERR_IO_ERROR;
}
}
}
- if ((n = state->rx_idx) > 0) {
+ n = state->rx_idx;
+
+ if (n > 0) {
for (i = 0; i < n; i++) {
- rxbd = ((I2C_BD*)state->rxbd) - (n - i);
- if ((b = rxbd->status & BD_I2C_RX_ERR) != 0) {
+ rxbd = ((I2C_BD *) state->rxbd) - (n - i);
+ b = rxbd->status & BD_I2C_RX_ERR;
+ if (b != 0) {
if (state->err_cb != NULL)
- (*state->err_cb)(I2CECB_RX_ERR|b, i,
- state->cb_data);
+ (*state->err_cb) (I2CECB_RX_ERR | b,
+ i, state->cb_data);
if (rc == 0)
rc = I2CERR_IO_ERROR;
}
}
}
- if ((txtimeo > 0 && txcnt >= txtimeo) || \
+ if ((txtimeo > 0 && txcnt >= txtimeo) ||
(rxtimeo > 0 && rxcnt >= rxtimeo)) {
if (state->err_cb != NULL)
- (*state->err_cb)(I2CECB_TIMEOUT, -1, state->cb_data);
+ (*state->err_cb) (I2CECB_TIMEOUT, -1, state->cb_data);
if (rc == 0)
rc = I2CERR_TIMEOUT;
}
- return (rc);
+ return rc;
}
-static void
-i2c_probe_callback(int flags, int xnum, void *data)
+static void i2c_probe_callback(int flags, int xnum, void *data)
{
/*
* the only acceptable errors are a transmit NAK or a receive
@@ -610,14 +595,13 @@ i2c_probe_callback(int flags, int xnum, void *data)
* means the device must have responded to the slave address
* even though the transfer failed
*/
- if (flags == (I2CECB_TX_ERR|I2CECB_TX_NAK))
- *(int *)data |= 1;
- if (flags == (I2CECB_RX_ERR|I2CECB_RX_OV))
- *(int *)data |= 2;
+ if (flags == (I2CECB_TX_ERR | I2CECB_TX_NAK))
+ *(int *) data |= 1;
+ if (flags == (I2CECB_RX_ERR | I2CECB_RX_OV))
+ *(int *) data |= 2;
}
-int
-i2c_probe(uchar chip)
+int i2c_probe(uchar chip)
{
i2c_state_t state;
int rc, err_flag;
@@ -629,31 +613,31 @@ i2c_probe(uchar chip)
state.cb_data = (void *) &err_flag;
err_flag = 0;
- rc = i2c_receive(&state, chip, 0, I2CF_START_COND|I2CF_STOP_COND, 1, buf);
+ rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1,
+ buf);
if (rc != 0)
- return (rc); /* probe failed */
+ return rc; /* probe failed */
rc = i2c_doio(&state);
if (rc == 0)
- return (0); /* device exists - read succeeded */
+ return 0; /* device exists - read succeeded */
if (rc == I2CERR_TIMEOUT)
- return (-1); /* device does not exist - timeout */
+ return -1; /* device does not exist - timeout */
if (rc != I2CERR_IO_ERROR || err_flag == 0)
- return (rc); /* probe failed */
+ return rc; /* probe failed */
if (err_flag & 1)
- return (-1); /* device does not exist - had transmit NAK */
+ return -1; /* device does not exist - had transmit NAK */
- return (0); /* device exists - had receive overrun */
+ return 0; /* device exists - had receive overrun */
}
-int
-i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
i2c_state_t state;
uchar xaddr[4];
@@ -661,27 +645,28 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
- /*
- * EEPROM chips that implement "address overflow" are ones
- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
- * and the extra bits end up in the "chip address" bit slots.
- * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
- * chips.
- *
- * Note that we consider the length of the address field to still
- * be one byte because the extra address bits are hidden in the
- * chip address.
- */
+ /*
+ * EEPROM chips that implement "address overflow" are ones
+ * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
+ * and the extra bits end up in the "chip address" bit slots.
+ * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
+ * chips.
+ *
+ * Note that we consider the length of the address field to still
+ * be one byte because the extra address bits are hidden in the
+ * chip address.
+ */
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
i2c_newio(&state);
- rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
+ rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
+ &xaddr[4 - alen]);
if (rc != 0) {
printf("i2c_read: i2c_send failed (%d)\n", rc);
return 1;
@@ -701,8 +686,7 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
return 0;
}
-int
-i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
i2c_state_t state;
uchar xaddr[4];
@@ -710,27 +694,28 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
- /*
- * EEPROM chips that implement "address overflow" are ones
- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
- * and the extra bits end up in the "chip address" bit slots.
- * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
- * chips.
- *
- * Note that we consider the length of the address field to still
- * be one byte because the extra address bits are hidden in the
- * chip address.
- */
+ /*
+ * EEPROM chips that implement "address overflow" are ones
+ * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
+ * and the extra bits end up in the "chip address" bit slots.
+ * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
+ * chips.
+ *
+ * Note that we consider the length of the address field to still
+ * be one byte because the extra address bits are hidden in the
+ * chip address.
+ */
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
i2c_newio(&state);
- rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
+ rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
+ &xaddr[4 - alen]);
if (rc != 0) {
printf("i2c_write: first i2c_send failed (%d)\n", rc);
return 1;
@@ -765,7 +750,7 @@ int i2c_set_bus_num(unsigned int bus)
if (bus < CONFIG_SYS_MAX_I2C_BUS) {
i2c_bus_num = bus;
} else {
- int ret;
+ int ret;
ret = i2x_mux_select_mux(bus);
if (ret == 0)
@@ -781,5 +766,5 @@ int i2c_set_bus_num(unsigned int bus)
return 0;
}
-#endif /* CONFIG_I2C_MULTI_BUS */
-#endif /* CONFIG_HARD_I2C */
+#endif /* CONFIG_I2C_MULTI_BUS */
+#endif /* CONFIG_HARD_I2C */
diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index 0e1c2b06597..bb50dee9602 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -110,7 +110,7 @@ int get_clocks (void)
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
ulong clkin;
ulong sccr, dfbrg;
- ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf;
+ ulong scmr, corecnf, plldf, pllmf;
corecnf_t *cp;
#if !defined(CONFIG_8260_CLKIN)
@@ -130,9 +130,6 @@ int get_clocks (void)
corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
cp = &corecnf_tab[corecnf];
- busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
- cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
-
/* HiP7, HiP7 Rev01, HiP7 RevA */
if ((get_pvr () == PVR_8260_HIP7) ||
(get_pvr () == PVR_8260_HIP7R1) ||
@@ -144,12 +141,6 @@ int get_clocks (void)
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
}
-#if 0
- if (gd->vco_out / (busdf + 1) != clkin) {
- /* aaarrrggghhh!!! */
- return (1);
- }
-#endif
gd->cpm_clk = gd->vco_out / 2;
gd->bus_clk = clkin;
diff --git a/arch/powerpc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c
index f5d2ac35a6a..dc98ea73f26 100644
--- a/arch/powerpc/cpu/mpc8260/spi.c
+++ b/arch/powerpc/cpu/mpc8260/spi.c
@@ -276,11 +276,9 @@ void spi_init_r (void)
{
volatile spi_t *spi;
volatile immap_t *immr;
- volatile cpm8260_t *cp;
volatile cbd_t *tbdf, *rbdf;
immr = (immap_t *) CONFIG_SYS_IMMR;
- cp = (cpm8260_t *) &immr->im_cpm;
spi = (spi_t *)&immr->im_dprambase[PROFF_SPI];
@@ -358,7 +356,6 @@ ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)
ssize_t spi_xfer (size_t count)
{
volatile immap_t *immr;
- volatile cpm8260_t *cp;
volatile spi_t *spi;
cbd_t *tbdf, *rbdf;
int tm;
@@ -366,7 +363,6 @@ ssize_t spi_xfer (size_t count)
DPRINT (("*** spi_xfer entered ***\n"));
immr = (immap_t *) CONFIG_SYS_IMMR;
- cp = (cpm8260_t *) &immr->im_cpm;
spi = (spi_t *)&immr->im_dprambase[PROFF_SPI];
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 142cfa5b988..5cbf9a688ed 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -40,6 +40,7 @@
#include <commproc.h>
#include <netdev.h>
#include <asm/cache.h>
+#include <linux/compiler.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
@@ -185,7 +186,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
uint k, m;
char buf[32];
char pre = 'X';
- char *mid = "xx";
+ __maybe_unused char *mid = "xx";
char *suf;
/* the highest 16 bits should be 0x0050 for a 8xx */
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index a2d2bd6d8dd..f2a2c3a7369 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -378,35 +378,39 @@ static void fec_pin_init(int fecidx)
{
bd_t *bd = gd->bd;
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
- volatile fec_t *fecp;
-
- /*
- * only two FECs please
- */
- if ((unsigned int)fecidx >= 2)
- hang();
-
- if (fecidx == 0)
- fecp = &immr->im_cpm.cp_fec1;
- else
- fecp = &immr->im_cpm.cp_fec2;
/*
* Set MII speed to 2.5 MHz or slightly below.
- * * According to the MPC860T (Rev. D) Fast ethernet controller user
- * * manual (6.2.14),
- * * the MII management interface clock must be less than or equal
- * * to 2.5 MHz.
- * * This MDC frequency is equal to system clock / (2 * MII_SPEED).
- * * Then MII_SPEED = system_clock / 2 * 2,5 MHz.
+ *
+ * According to the MPC860T (Rev. D) Fast ethernet controller user
+ * manual (6.2.14),
+ * the MII management interface clock must be less than or equal
+ * to 2.5 MHz.
+ * This MDC frequency is equal to system clock / (2 * MII_SPEED).
+ * Then MII_SPEED = system_clock / 2 * 2,5 MHz.
*
* All MII configuration is done via FEC1 registers:
*/
immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
- /* our PHYs are the limit at 2.5 MHz */
- fecp->fec_mii_speed <<= 1;
+ {
+ volatile fec_t *fecp;
+
+ /*
+ * only two FECs please
+ */
+ if ((unsigned int)fecidx >= 2)
+ hang();
+
+ if (fecidx == 0)
+ fecp = &immr->im_cpm.cp_fec1;
+ else
+ fecp = &immr->im_cpm.cp_fec2;
+
+ /* our PHYs are the limit at 2.5 MHz */
+ fecp->fec_mii_speed <<= 1;
+ }
#endif
#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
@@ -1010,11 +1014,10 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr,
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
- short rdreg; /* register working value */
#ifdef MII_DEBUG
printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
#endif
- rdreg = mii_send(mk_mii_write(addr, reg, value));
+ (void)mii_send(mk_mii_write(addr, reg, value));
#ifdef MII_DEBUG
printf ("0x%04x\n", value);
diff --git a/arch/powerpc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c
index 1ca51fddef8..3e5ea3a0a23 100644
--- a/arch/powerpc/cpu/mpc8xx/i2c.c
+++ b/arch/powerpc/cpu/mpc8xx/i2c.c
@@ -39,9 +39,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* define to enable debug messages */
-#undef DEBUG_I2C
-
/* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */
#define TOUT_LOOP 1000000
@@ -50,13 +47,13 @@ DECLARE_GLOBAL_DATA_PTR;
#define MAX_TX_SPACE 256
#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
-typedef struct I2C_BD
-{
- unsigned short status;
- unsigned short length;
- unsigned char *addr;
+typedef struct I2C_BD {
+ unsigned short status;
+ unsigned short length;
+ unsigned char *addr;
} I2C_BD;
-#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
+
+#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
#define BD_I2C_TX_CL 0x0001 /* collision error */
#define BD_I2C_TX_UN 0x0002 /* underflow error */
@@ -65,47 +62,41 @@ typedef struct I2C_BD
#define BD_I2C_RX_ERR BD_SC_OV
-typedef void (*i2c_ecb_t)(int, int); /* error callback function */
+typedef void (*i2c_ecb_t) (int, int); /* error callback function */
/* This structure keeps track of the bd and buffer space usage. */
typedef struct i2c_state {
- int rx_idx; /* index to next free Rx BD */
- int tx_idx; /* index to next free Tx BD */
- void *rxbd; /* pointer to next free Rx BD */
- void *txbd; /* pointer to next free Tx BD */
- int tx_space; /* number of Tx bytes left */
- unsigned char *tx_buf; /* pointer to free Tx area */
- i2c_ecb_t err_cb; /* error callback function */
+ int rx_idx; /* index to next free Rx BD */
+ int tx_idx; /* index to next free Tx BD */
+ void *rxbd; /* pointer to next free Rx BD */
+ void *txbd; /* pointer to next free Tx BD */
+ int tx_space; /* number of Tx bytes left */
+ unsigned char *tx_buf; /* pointer to free Tx area */
+ i2c_ecb_t err_cb; /* error callback function */
} i2c_state_t;
/* flags for i2c_send() and i2c_receive() */
-#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
-#define I2CF_START_COND 0x02 /* tx: generate start condition */
-#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
+#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
+#define I2CF_START_COND 0x02 /* tx: generate start condition */
+#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
/* return codes */
-#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */
-#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */
-#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */
-#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */
+#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */
+#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */
+#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */
+#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */
/* error callback flags */
-#define I2CECB_RX_ERR 0x10 /* this is a receive error */
-#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */
-#define I2CECB_RX_MASK 0x0f /* mask for error bits */
-#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
-#define I2CECB_TX_CL 0x01 /* transmit collision error */
-#define I2CECB_TX_UN 0x02 /* transmit underflow error */
-#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
-#define I2CECB_TX_MASK 0x0f /* mask for error bits */
-#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
-
-#ifdef DEBUG_I2C
-#define PRINTD(x) printf x
-#else
-#define PRINTD(x)
-#endif
+#define I2CECB_RX_ERR 0x10 /* this is a receive error */
+#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */
+#define I2CECB_RX_MASK 0x0f /* mask for error bits */
+#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
+#define I2CECB_TX_CL 0x01 /* transmit collision error */
+#define I2CECB_TX_UN 0x02 /* transmit underflow error */
+#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
+#define I2CECB_TX_MASK 0x0f /* mask for error bits */
+#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
/*
* Returns the best value of I2BRG to meet desired clock speed of I2C with
@@ -115,53 +106,53 @@ typedef struct i2c_state {
*/
static inline int
i2c_roundrate(int hz, int speed, int filter, int modval,
- int *brgval, int *totspeed)
+ int *brgval, int *totspeed)
{
- int moddiv = 1 << (5-(modval & 3)), brgdiv, div;
+ int moddiv = 1 << (5 - (modval & 3)), brgdiv, div;
- PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
- hz, speed, filter, modval));
+ debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
+ hz, speed, filter, modval);
- div = moddiv * speed;
- brgdiv = (hz + div - 1) / div;
+ div = moddiv * speed;
+ brgdiv = (hz + div - 1) / div;
- PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv));
+ debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv);
- *brgval = ((brgdiv + 1) / 2) - 3 - (2*filter);
+ *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter);
- if ((*brgval < 0) || (*brgval > 255)) {
- PRINTD(("\t\trejected brgval=%d\n", *brgval));
- return -1;
- }
+ if ((*brgval < 0) || (*brgval > 255)) {
+ debug("\t\trejected brgval=%d\n", *brgval);
+ return -1;
+ }
- brgdiv = 2 * (*brgval + 3 + (2 * filter));
- div = moddiv * brgdiv ;
- *totspeed = hz / div;
+ brgdiv = 2 * (*brgval + 3 + (2 * filter));
+ div = moddiv * brgdiv;
+ *totspeed = hz / div;
- PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed));
+ debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed);
- return 0;
+ return 0;
}
/*
* Sets the I2C clock predivider and divider to meet required clock speed.
*/
-static int
-i2c_setrate (int hz, int speed)
+static int i2c_setrate(int hz, int speed)
{
- immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+ immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile i2c8xx_t *i2c = (i2c8xx_t *) & immap->im_i2c;
- int brgval,
- modval, /* 0-3 */
- bestspeed_diff = speed,
- bestspeed_brgval = 0,
- bestspeed_modval = 0,
- bestspeed_filter = 0,
- totspeed,
- filter = 0; /* Use this fixed value */
+ int brgval,
+ modval, /* 0-3 */
+ bestspeed_diff = speed,
+ bestspeed_brgval = 0,
+ bestspeed_modval = 0,
+ bestspeed_filter = 0,
+ totspeed,
+ filter = 0; /* Use this fixed value */
for (modval = 0; modval < 4; modval++) {
- if (i2c_roundrate(hz,speed,filter,modval,&brgval,&totspeed) == 0) {
+ if (i2c_roundrate
+ (hz, speed, filter, modval, &brgval, &totspeed) == 0) {
int diff = speed - totspeed;
if ((diff >= 0) && (diff < bestspeed_diff)) {
@@ -173,30 +164,31 @@ i2c_setrate (int hz, int speed)
}
}
- PRINTD (("[I2C] Best is:\n"));
- PRINTD (("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
+ debug("[I2C] Best is:\n");
+ debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
hz,
speed,
bestspeed_filter,
bestspeed_modval,
bestspeed_brgval,
- bestspeed_diff));
+ bestspeed_diff);
- i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
+ i2c->i2c_i2mod |=
+ ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
i2c->i2c_i2brg = bestspeed_brgval & 0xff;
- PRINTD (("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod,
- i2c->i2c_i2brg));
+ debug("[I2C] i2mod=%08x i2brg=%08x\n",
+ i2c->i2c_i2mod,
+ i2c->i2c_i2brg);
return 1;
}
-void
-i2c_init(int speed, int slaveaddr)
+void i2c_init(int speed, int slaveaddr)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
- volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
+ volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
ulong rbase, tbase;
volatile I2C_BD *rxbd, *txbd;
@@ -219,10 +211,10 @@ i2c_init(int speed, int slaveaddr)
#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = iip->iic_rbase;
if (dpaddr == 0) {
- /* need to allocate dual port ram */
- dpaddr = dpram_alloc_align(
- (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) +
- MAX_TX_SPACE, 8);
+ /* need to allocate dual port ram */
+ dpaddr = dpram_alloc_align((NUM_RX_BDS * sizeof(I2C_BD)) +
+ (NUM_TX_BDS * sizeof(I2C_BD)) +
+ MAX_TX_SPACE, 8);
}
#else
dpaddr = CPM_I2C_BASE;
@@ -255,25 +247,25 @@ i2c_init(int speed, int slaveaddr)
* and current CPU rate (we assume sccr dfbgr field is 0;
* divide BRGCLK by 1)
*/
- PRINTD(("[I2C] Setting rate...\n"));
- i2c_setrate (gd->cpu_clk, CONFIG_SYS_I2C_SPEED) ;
+ debug("[I2C] Setting rate...\n");
+ i2c_setrate(gd->cpu_clk, CONFIG_SYS_I2C_SPEED);
/* Set I2C controller in master mode */
i2c->i2c_i2com = 0x01;
/* Set SDMA bus arbitration level to 5 (SDCR) */
- immap->im_siu_conf.sc_sdcr = 0x0001 ;
+ immap->im_siu_conf.sc_sdcr = 0x0001;
/* Initialize Tx/Rx parameters */
iip->iic_rbase = rbase;
iip->iic_tbase = tbase;
- rxbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_rbase]);
- txbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_tbase]);
+ rxbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_rbase]);
+ txbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_tbase]);
- PRINTD(("[I2C] rbase = %04x\n", iip->iic_rbase));
- PRINTD(("[I2C] tbase = %04x\n", iip->iic_tbase));
- PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
+ debug("[I2C] rbase = %04x\n", iip->iic_rbase);
+ debug("[I2C] tbase = %04x\n", iip->iic_tbase);
+ debug("[I2C] rxbd = %08x\n", (int)rxbd);
+ debug("[I2C] txbd = %08x\n", (int)txbd);
/* Set big endian byte order */
iip->iic_tfcr = 0x10;
@@ -286,14 +278,14 @@ i2c_init(int speed, int slaveaddr)
/*
* Initialize required parameters if using microcode patch.
*/
- iip->iic_rbptr = iip->iic_rbase;
- iip->iic_tbptr = iip->iic_tbase;
+ iip->iic_rbptr = iip->iic_rbase;
+ iip->iic_tbptr = iip->iic_tbase;
iip->iic_rstate = 0;
iip->iic_tstate = 0;
#else
cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG;
do {
- __asm__ __volatile__ ("eieio");
+ __asm__ __volatile__("eieio");
} while (cp->cp_cpcr & CPM_CR_FLG);
#endif
@@ -302,29 +294,28 @@ i2c_init(int speed, int slaveaddr)
i2c->i2c_i2cmr = 0x00;
}
-static void
-i2c_newio(i2c_state_t *state)
+static void i2c_newio(i2c_state_t *state)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
- PRINTD(("[I2C] i2c_newio\n"));
+ debug("[I2C] i2c_newio\n");
#ifdef CONFIG_SYS_I2C_UCODE_PATCH
iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
#endif
state->rx_idx = 0;
state->tx_idx = 0;
- state->rxbd = (void*)&cp->cp_dpmem[iip->iic_rbase];
- state->txbd = (void*)&cp->cp_dpmem[iip->iic_tbase];
+ state->rxbd = (void *)&cp->cp_dpmem[iip->iic_rbase];
+ state->txbd = (void *)&cp->cp_dpmem[iip->iic_tbase];
state->tx_space = MAX_TX_SPACE;
- state->tx_buf = (uchar*)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
+ state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
state->err_cb = NULL;
- PRINTD(("[I2C] rxbd = %08x\n", (int)state->rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)state->txbd));
- PRINTD(("[I2C] tx_buf = %08x\n", (int)state->tx_buf));
+ debug("[I2C] rxbd = %08x\n", (int)state->rxbd);
+ debug("[I2C] txbd = %08x\n", (int)state->txbd);
+ debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf);
/* clear the buffer memory */
memset((char *)state->tx_buf, 0, MAX_TX_SPACE);
@@ -334,69 +325,71 @@ static int
i2c_send(i2c_state_t *state,
unsigned char address,
unsigned char secondary_address,
- unsigned int flags,
- unsigned short size,
- unsigned char *dataout)
+ unsigned int flags, unsigned short size, unsigned char *dataout)
{
volatile I2C_BD *txbd;
- int i,j;
+ int i, j;
- PRINTD(("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
- address, secondary_address, flags, size));
+ debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
+ address, secondary_address, flags, size);
/* trying to send message larger than BD */
if (size > I2C_RXTX_LEN)
- return I2CERR_MSG_TOO_LONG;
+ return I2CERR_MSG_TOO_LONG;
/* no more free bds */
if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size))
- return I2CERR_NO_BUFFERS;
+ return I2CERR_NO_BUFFERS;
- txbd = (I2C_BD *)state->txbd;
+ txbd = (I2C_BD *) state->txbd;
txbd->addr = state->tx_buf;
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
+ debug("[I2C] txbd = %08x\n", (int)txbd);
if (flags & I2CF_START_COND) {
- PRINTD(("[I2C] Formatting addresses...\n"));
+ debug("[I2C] Formatting addresses...\n");
if (flags & I2CF_ENABLE_SECONDARY) {
- txbd->length = size + 2; /* Length of msg + dest addr */
+ /* Length of msg + dest addr */
+ txbd->length = size + 2;
+
txbd->addr[0] = address << 1;
txbd->addr[1] = secondary_address;
i = 2;
} else {
- txbd->length = size + 1; /* Length of msg + dest addr */
- txbd->addr[0] = address << 1; /* Write dest addr to BD */
+ /* Length of msg + dest addr */
+ txbd->length = size + 1;
+ /* Write dest addr to BD */
+ txbd->addr[0] = address << 1;
i = 1;
}
} else {
- txbd->length = size; /* Length of message */
+ txbd->length = size; /* Length of message */
i = 0;
}
/* set up txbd */
txbd->status = BD_SC_READY;
if (flags & I2CF_START_COND)
- txbd->status |= BD_I2C_TX_START;
+ txbd->status |= BD_I2C_TX_START;
if (flags & I2CF_STOP_COND)
- txbd->status |= BD_SC_LAST | BD_SC_WRAP;
+ txbd->status |= BD_SC_LAST | BD_SC_WRAP;
/* Copy data to send into buffer */
- PRINTD(("[I2C] copy data...\n"));
+ debug("[I2C] copy data...\n");
for(j = 0; j < size; i++, j++)
- txbd->addr[i] = dataout[j];
+ txbd->addr[i] = dataout[j];
- PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- txbd->length,
- txbd->status,
- txbd->addr[0],
- txbd->addr[1]));
+ debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ txbd->length,
+ txbd->status,
+ txbd->addr[0],
+ txbd->addr[1]);
/* advance state */
state->tx_buf += txbd->length;
state->tx_space -= txbd->length;
state->tx_idx++;
- state->txbd = (void*)(txbd + 1);
+ state->txbd = (void *) (txbd + 1);
return 0;
}
@@ -406,35 +399,35 @@ i2c_receive(i2c_state_t *state,
unsigned char address,
unsigned char secondary_address,
unsigned int flags,
- unsigned short size_to_expect,
- unsigned char *datain)
+ unsigned short size_to_expect, unsigned char *datain)
{
volatile I2C_BD *rxbd, *txbd;
- PRINTD(("[I2C] i2c_receive %02d %02d %02d\n", address, secondary_address, flags));
+ debug("[I2C] i2c_receive %02d %02d %02d\n",
+ address, secondary_address, flags);
/* Expected to receive too much */
if (size_to_expect > I2C_RXTX_LEN)
- return I2CERR_MSG_TOO_LONG;
+ return I2CERR_MSG_TOO_LONG;
/* no more free bds */
if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS
- || state->tx_space < 2)
- return I2CERR_NO_BUFFERS;
+ || state->tx_space < 2)
+ return I2CERR_NO_BUFFERS;
- rxbd = (I2C_BD *)state->rxbd;
- txbd = (I2C_BD *)state->txbd;
+ rxbd = (I2C_BD *) state->rxbd;
+ txbd = (I2C_BD *) state->txbd;
- PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd));
- PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
+ debug("[I2C] rxbd = %08x\n", (int)rxbd);
+ debug("[I2C] txbd = %08x\n", (int)txbd);
txbd->addr = state->tx_buf;
/* set up TXBD for destination address */
if (flags & I2CF_ENABLE_SECONDARY) {
txbd->length = 2;
- txbd->addr[0] = address << 1; /* Write data */
- txbd->addr[1] = secondary_address; /* Internal address */
+ txbd->addr[0] = address << 1; /* Write data */
+ txbd->addr[1] = secondary_address; /* Internal address */
txbd->status = BD_SC_READY;
} else {
txbd->length = 1 + size_to_expect;
@@ -454,24 +447,24 @@ i2c_receive(i2c_state_t *state,
rxbd->status |= BD_SC_WRAP;
}
- PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- txbd->length,
- txbd->status,
- txbd->addr[0],
- txbd->addr[1]));
- PRINTD(("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
- rxbd->length,
- rxbd->status,
- rxbd->addr[0],
- rxbd->addr[1]));
+ debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ txbd->length,
+ txbd->status,
+ txbd->addr[0],
+ txbd->addr[1]);
+ debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
+ rxbd->length,
+ rxbd->status,
+ rxbd->addr[0],
+ rxbd->addr[1]);
/* advance state */
state->tx_buf += txbd->length;
state->tx_space -= txbd->length;
state->tx_idx++;
- state->txbd = (void*)(txbd + 1);
+ state->txbd = (void *) (txbd + 1);
state->rx_idx++;
- state->rxbd = (void*)(rxbd + 1);
+ state->rxbd = (void *) (rxbd + 1);
return 0;
}
@@ -479,21 +472,21 @@ i2c_receive(i2c_state_t *state,
static int i2c_doio(i2c_state_t *state)
{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
- volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
+ volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
volatile I2C_BD *txbd, *rxbd;
volatile int j = 0;
- PRINTD(("[I2C] i2c_doio\n"));
+ debug("[I2C] i2c_doio\n");
#ifdef CONFIG_SYS_I2C_UCODE_PATCH
iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
#endif
if (state->tx_idx <= 0 && state->rx_idx <= 0) {
- PRINTD(("[I2C] No I/O is queued\n"));
+ debug("[I2C] No I/O is queued\n");
return I2CERR_QUEUE_EMPTY;
}
@@ -501,7 +494,7 @@ static int i2c_doio(i2c_state_t *state)
iip->iic_tbptr = iip->iic_tbase;
/* Enable I2C */
- PRINTD(("[I2C] Enabling I2C...\n"));
+ debug("[I2C] Enabling I2C...\n");
i2c->i2c_i2mod |= 0x01;
/* Begin transmission */
@@ -511,23 +504,29 @@ static int i2c_doio(i2c_state_t *state)
if (state->tx_idx > 0) {
txbd = ((I2C_BD*)state->txbd) - 1;
- PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd));
- while((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) {
- if (ctrlc()) {
+
+ debug("[I2C] Transmitting...(txbd=0x%08lx)\n",
+ (ulong)txbd);
+
+ while ((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) {
+ if (ctrlc())
return (-1);
- }
- __asm__ __volatile__ ("eieio");
+
+ __asm__ __volatile__("eieio");
}
}
if ((state->rx_idx > 0) && (j < TOUT_LOOP)) {
rxbd = ((I2C_BD*)state->rxbd) - 1;
- PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd));
- while((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) {
- if (ctrlc()) {
+
+ debug("[I2C] Receiving...(rxbd=0x%08lx)\n",
+ (ulong)rxbd);
+
+ while ((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) {
+ if (ctrlc())
return (-1);
- }
- __asm__ __volatile__ ("eieio");
+
+ __asm__ __volatile__("eieio");
}
}
@@ -544,22 +543,24 @@ static int i2c_doio(i2c_state_t *state)
if ((n = state->tx_idx) > 0) {
for (i = 0; i < n; i++) {
- txbd = ((I2C_BD*)state->txbd) - (n - i);
+ txbd = ((I2C_BD *) state->txbd) - (n - i);
if ((b = txbd->status & BD_I2C_TX_ERR) != 0)
- (*state->err_cb)(I2CECB_TX_ERR|b, i);
+ (*state->err_cb) (I2CECB_TX_ERR | b,
+ i);
}
}
if ((n = state->rx_idx) > 0) {
for (i = 0; i < n; i++) {
- rxbd = ((I2C_BD*)state->rxbd) - (n - i);
+ rxbd = ((I2C_BD *) state->rxbd) - (n - i);
if ((b = rxbd->status & BD_I2C_RX_ERR) != 0)
- (*state->err_cb)(I2CECB_RX_ERR|b, i);
+ (*state->err_cb) (I2CECB_RX_ERR | b,
+ i);
}
}
if (j >= TOUT_LOOP)
- (*state->err_cb)(I2CECB_TIMEOUT, 0);
+ (*state->err_cb) (I2CECB_TIMEOUT, 0);
}
return (j >= TOUT_LOOP) ? I2CERR_TIMEOUT : 0;
@@ -567,8 +568,7 @@ static int i2c_doio(i2c_state_t *state)
static int had_tx_nak;
-static void
-i2c_test_callback(int flags, int xnum)
+static void i2c_test_callback(int flags, int xnum)
{
if ((flags & I2CECB_TX_ERR) && (flags & I2CECB_TX_NAK))
had_tx_nak = 1;
@@ -587,7 +587,8 @@ int i2c_probe(uchar chip)
state.err_cb = i2c_test_callback;
had_tx_nak = 0;
- rc = i2c_receive(&state, chip, 0, I2CF_START_COND|I2CF_STOP_COND, 1, buf);
+ rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1,
+ buf);
if (rc != 0)
return (rc);
@@ -612,8 +613,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
@@ -626,12 +627,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
* be one byte because the extra address bits are hidden in the
* chip address.
*/
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
+ chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
i2c_newio(&state);
- rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
+ rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
+ &xaddr[4 - alen]);
if (rc != 0) {
printf("i2c_read: i2c_send failed (%d)\n", rc);
return 1;
@@ -659,8 +661,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
@@ -673,12 +675,13 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
* be one byte because the extra address bits are hidden in the
* chip address.
*/
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
+ chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
i2c_newio(&state);
- rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
+ rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
+ &xaddr[4 - alen]);
if (rc != 0) {
printf("i2c_write: first i2c_send failed (%d)\n", rc);
return 1;
@@ -698,4 +701,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
return 0;
}
-#endif /* CONFIG_HARD_I2C */
+#endif /* CONFIG_HARD_I2C */
diff --git a/arch/powerpc/cpu/mpc8xx/spi.c b/arch/powerpc/cpu/mpc8xx/spi.c
index b2ac23e5ea4..db34852d605 100644
--- a/arch/powerpc/cpu/mpc8xx/spi.c
+++ b/arch/powerpc/cpu/mpc8xx/spi.c
@@ -139,14 +139,10 @@ void spi_init_f (void)
volatile spi_t *spi;
volatile immap_t *immr;
- volatile cpic8xx_t *cpi;
volatile cpm8xx_t *cp;
- volatile iop8xx_t *iop;
volatile cbd_t *tbdf, *rbdf;
immr = (immap_t *) CONFIG_SYS_IMMR;
- cpi = (cpic8xx_t *)&immr->im_cpic;
- iop = (iop8xx_t *) &immr->im_ioport;
cp = (cpm8xx_t *) &immr->im_cpm;
#ifdef CONFIG_SYS_SPI_UCODE_PATCH
diff --git a/arch/powerpc/lib/bat_rw.c b/arch/powerpc/lib/bat_rw.c
index c48c2401515..113c293c036 100644
--- a/arch/powerpc/lib/bat_rw.c
+++ b/arch/powerpc/lib/bat_rw.c
@@ -26,6 +26,7 @@
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/io.h>
+#include <linux/compiler.h>
#ifdef CONFIG_ADDR_MAP
#include <addr_map.h>
@@ -35,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR;
int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)
{
- int batn = -1;
+ __maybe_unused int batn = -1;
sync();
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 3a1b3756e16..ff5888e4ccb 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2010
+ * (C) Copyright 2000-2011
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -88,7 +88,7 @@
#endif
#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
-extern int update_flash_size (int flash_size);
+extern int update_flash_size(int flash_size);
#endif
#if defined(CONFIG_SC3)
@@ -96,7 +96,7 @@ extern void sc3_read_eeprom(void);
#endif
#if defined(CONFIG_CMD_DOC)
-void doc_init (void);
+void doc_init(void);
#endif
#if defined(CONFIG_HARD_I2C) || \
defined(CONFIG_SOFT_I2C)
@@ -130,9 +130,8 @@ ulong monitor_flash_len;
#include <bedbug/type.h>
#endif
-/************************************************************************
- * Utilities *
- ************************************************************************
+/*
+ * Utilities
*/
/*
@@ -147,16 +146,16 @@ ulong monitor_flash_len;
* argument, and returns an integer return code, where 0 means
* "continue" and != 0 means "fatal error, hang the system".
*/
-typedef int (init_fnc_t) (void);
+typedef int (init_fnc_t)(void);
-/************************************************************************
- * Init Utilities *
- ************************************************************************
+/*
+ * Init Utilities
+ *
* Some of this code should be moved into the core functions,
* but let's get it working (again) first...
*/
-static int init_baudrate (void)
+static int init_baudrate(void)
{
gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
@@ -168,7 +167,9 @@ void __board_add_ram_info(int use_default)
{
/* please define platform specific board_add_ram_info() */
}
-void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
+
+void board_add_ram_info(int)
+ __attribute__ ((weak, alias("__board_add_ram_info")));
int __board_flash_wp_on(void)
{
@@ -179,80 +180,86 @@ int __board_flash_wp_on(void)
*/
return 0;
}
-int board_flash_wp_on(void) __attribute__((weak, alias("__board_flash_wp_on")));
+
+int board_flash_wp_on(void)
+ __attribute__ ((weak, alias("__board_flash_wp_on")));
void __cpu_secondary_init_r(void)
{
}
+
void cpu_secondary_init_r(void)
-__attribute__((weak, alias("__cpu_secondary_init_r")));
+ __attribute__ ((weak, alias("__cpu_secondary_init_r")));
-static int init_func_ram (void)
+static int init_func_ram(void)
{
#ifdef CONFIG_BOARD_TYPES
int board_type = gd->board_type;
#else
int board_type = 0; /* use dummy arg */
#endif
- puts ("DRAM: ");
+ puts("DRAM: ");
- if ((gd->ram_size = initdram (board_type)) > 0) {
- print_size (gd->ram_size, "");
+ gd->ram_size = initdram(board_type);
+
+ if (gd->ram_size > 0) {
+ print_size(gd->ram_size, "");
board_add_ram_info(0);
putc('\n');
- return (0);
+ return 0;
}
- puts (failed);
- return (1);
+ puts(failed);
+ return 1;
}
/***********************************************************************/
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
-static int init_func_i2c (void)
+static int init_func_i2c(void)
{
- puts ("I2C: ");
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- puts ("ready\n");
- return (0);
+ puts("I2C: ");
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ puts("ready\n");
+ return 0;
}
#endif
#if defined(CONFIG_HARD_SPI)
-static int init_func_spi (void)
+static int init_func_spi(void)
{
- puts ("SPI: ");
- spi_init ();
- puts ("ready\n");
- return (0);
+ puts("SPI: ");
+ spi_init();
+ puts("ready\n");
+ return 0;
}
#endif
/***********************************************************************/
#if defined(CONFIG_WATCHDOG)
-static int init_func_watchdog_init (void)
+static int init_func_watchdog_init(void)
{
- puts (" Watchdog enabled\n");
- WATCHDOG_RESET ();
- return (0);
+ puts(" Watchdog enabled\n");
+ WATCHDOG_RESET();
+ return 0;
}
-# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
-static int init_func_watchdog_reset (void)
+#define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
+
+static int init_func_watchdog_reset(void)
{
- WATCHDOG_RESET ();
- return (0);
+ WATCHDOG_RESET();
+ return 0;
}
-# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
+
+#define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
#else
-# define INIT_FUNC_WATCHDOG_INIT /* undef */
-# define INIT_FUNC_WATCHDOG_RESET /* undef */
+#define INIT_FUNC_WATCHDOG_INIT /* undef */
+#define INIT_FUNC_WATCHDOG_RESET /* undef */
#endif /* CONFIG_WATCHDOG */
-/************************************************************************
- * Initialization sequence *
- ************************************************************************
+/*
+ * Initialization sequence
*/
init_fnc_t *init_sequence[] = {
@@ -280,8 +287,10 @@ init_fnc_t *init_sequence[] = {
#endif
env_init,
#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
- get_clocks_866, /* get CPU and bus clocks according to the environment variable */
- sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
+ /* get CPU and bus clocks according to the environment variable */
+ get_clocks_866,
+ /* adjust sdram refresh rate according to the new clock */
+ sdram_adjust_866,
init_timebase,
#endif
init_baudrate,
@@ -317,14 +326,12 @@ init_fnc_t *init_sequence[] = {
#ifdef CONFIG_POST
post_init_f,
#endif
- INIT_FUNC_WATCHDOG_RESET
- init_func_ram,
+ INIT_FUNC_WATCHDOG_RESET init_func_ram,
#if defined(CONFIG_SYS_DRAM_TEST)
testdram,
#endif /* CONFIG_SYS_DRAM_TEST */
INIT_FUNC_WATCHDOG_RESET
-
- NULL, /* Terminate this list */
+ NULL, /* Terminate this list */
};
ulong get_effective_memsize(void)
@@ -334,12 +341,11 @@ ulong get_effective_memsize(void)
#else
/* limit stack to what we can reasonable map */
return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
- CONFIG_MAX_MEM_MAPPED : gd->ram_size);
+ CONFIG_MAX_MEM_MAPPED : gd->ram_size);
#endif
}
-/************************************************************************
- *
+/*
* This is the first part of the initialization sequence that is
* implemented in C, but still running from ROM.
*
@@ -350,8 +356,6 @@ ulong get_effective_memsize(void)
*
* Be aware of the restrictions: global data is read-only, BSS is not
* initialized, and stack space is limited to a few kB.
- *
- ************************************************************************
*/
#ifdef CONFIG_LOGBUFFER
@@ -361,13 +365,14 @@ unsigned long logbuffer_base(void)
}
#endif
-void board_init_f (ulong bootflag)
+void board_init_f(ulong bootflag)
{
bd_t *bd;
ulong len, addr, addr_sp;
ulong *s;
gd_t *id;
init_fnc_t **init_fnc_ptr;
+
#ifdef CONFIG_PRAM
ulong reg;
#endif
@@ -375,20 +380,18 @@ void board_init_f (ulong bootflag)
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
/* compiler optimization barrier needed for GCC >= 3.4 */
- __asm__ __volatile__("": : :"memory");
+ __asm__ __volatile__("":::"memory");
#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
!defined(CONFIG_MPC86xx)
/* Clear initial global data */
- memset ((void *) gd, 0, sizeof (gd_t));
+ memset((void *) gd, 0, sizeof(gd_t));
#endif
- for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
- if ((*init_fnc_ptr) () != 0) {
- hang ();
- }
- }
+ for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
+ if ((*init_fnc_ptr) () != 0)
+ hang();
#ifdef CONFIG_POST
post_bootmode_init();
@@ -432,7 +435,7 @@ void board_init_f (ulong bootflag)
*/
if (addr > determine_mp_bootpg()) {
addr = determine_mp_bootpg();
- debug ("Reserving MP boot page to %08lx\n", addr);
+ debug("Reserving MP boot page to %08lx\n", addr);
}
#endif
@@ -440,7 +443,8 @@ void board_init_f (ulong bootflag)
#ifndef CONFIG_ALT_LB_ADDR
/* reserve kernel log buffer */
addr -= (LOGBUFF_RESERVE);
- debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
+ debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
+ addr);
#endif
#endif
@@ -449,27 +453,27 @@ void board_init_f (ulong bootflag)
* reserve protected RAM
*/
reg = getenv_ulong("pram", 10, CONFIG_PRAM);
- addr -= (reg << 10); /* size is in kB */
+ addr -= (reg << 10); /* size is in kB */
debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
#endif /* CONFIG_PRAM */
/* round down to next 4 kB limit */
addr &= ~(4096 - 1);
- debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
+ debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
#ifdef CONFIG_LCD
#ifdef CONFIG_FB_ADDR
gd->fb_base = CONFIG_FB_ADDR;
#else
/* reserve memory for LCD display (always full pages) */
- addr = lcd_setmem (addr);
+ addr = lcd_setmem(addr);
gd->fb_base = addr;
#endif /* CONFIG_FB_ADDR */
#endif /* CONFIG_LCD */
#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
/* reserve memory for video display (always full pages) */
- addr = video_setmem (addr);
+ addr = video_setmem(addr);
gd->fb_base = addr;
#endif /* CONFIG_VIDEO */
@@ -484,29 +488,29 @@ void board_init_f (ulong bootflag)
addr &= ~(65536 - 1);
#endif
- debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
+ debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
/*
* reserve memory for malloc() arena
*/
addr_sp = addr - TOTAL_MALLOC_LEN;
- debug ("Reserving %dk for malloc() at: %08lx\n",
- TOTAL_MALLOC_LEN >> 10, addr_sp);
+ debug("Reserving %dk for malloc() at: %08lx\n",
+ TOTAL_MALLOC_LEN >> 10, addr_sp);
/*
* (permanently) allocate a Board Info struct
* and a permanent copy of the "global" data
*/
- addr_sp -= sizeof (bd_t);
+ addr_sp -= sizeof(bd_t);
bd = (bd_t *) addr_sp;
memset(bd, 0, sizeof(bd_t));
gd->bd = bd;
- debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
- sizeof (bd_t), addr_sp);
- addr_sp -= sizeof (gd_t);
+ debug("Reserving %zu Bytes for Board Info at: %08lx\n",
+ sizeof(bd_t), addr_sp);
+ addr_sp -= sizeof(gd_t);
id = (gd_t *) addr_sp;
- debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
- sizeof (gd_t), addr_sp);
+ debug("Reserving %zu Bytes for Global Data at: %08lx\n",
+ sizeof(gd_t), addr_sp);
/*
* Finally, we set up a new (bigger) stack.
@@ -516,22 +520,22 @@ void board_init_f (ulong bootflag)
*/
addr_sp -= 16;
addr_sp &= ~0xF;
- s = (ulong *)addr_sp;
+ s = (ulong *) addr_sp;
*s-- = 0;
*s-- = 0;
- addr_sp = (ulong)s;
- debug ("Stack Pointer at: %08lx\n", addr_sp);
+ addr_sp = (ulong) s;
+ debug("Stack Pointer at: %08lx\n", addr_sp);
/*
* Save local variables to board info struct
*/
- bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
- bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
+ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
+ bd->bi_memsize = gd->ram_size; /* size in bytes */
#ifdef CONFIG_SYS_SRAM_BASE
- bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */
- bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */
+ bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
+ bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
#endif
#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
@@ -546,33 +550,34 @@ void board_init_f (ulong bootflag)
#endif
#if defined(CONFIG_MPC8220)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
- bd->bi_inpfreq = gd->inp_clk;
- bd->bi_pcifreq = gd->pci_clk;
- bd->bi_vcofreq = gd->vco_clk;
- bd->bi_pevfreq = gd->pev_clk;
- bd->bi_flbfreq = gd->flb_clk;
+ bd->bi_inpfreq = gd->inp_clk;
+ bd->bi_pcifreq = gd->pci_clk;
+ bd->bi_vcofreq = gd->vco_clk;
+ bd->bi_pevfreq = gd->pev_clk;
+ bd->bi_flbfreq = gd->flb_clk;
/* store bootparam to sram (backward compatible), here? */
{
- u32 *sram = (u32 *)CONFIG_SYS_SRAM_BASE;
+ u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
+
*sram++ = gd->ram_size;
*sram++ = gd->bus_clk;
*sram++ = gd->inp_clk;
*sram++ = gd->cpu_clk;
*sram++ = gd->vco_clk;
*sram++ = gd->flb_clk;
- *sram++ = 0xb8c3ba11; /* boot signature */
+ *sram++ = 0xb8c3ba11; /* boot signature */
}
#endif
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
bd->bi_cpmfreq = gd->cpm_clk;
bd->bi_brgfreq = gd->brg_clk;
bd->bi_sccfreq = gd->scc_clk;
- bd->bi_vco = gd->vco_out;
+ bd->bi_vco = gd->vco_out;
#endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC512X)
bd->bi_ipsfreq = gd->ips_clk;
@@ -584,50 +589,46 @@ void board_init_f (ulong bootflag)
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
#ifdef CONFIG_SYS_EXTBDINFO
- strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
- strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
+ strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
+ strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
+ sizeof(bd->bi_r_version));
bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
bd->bi_plb_busfreq = gd->bus_clk;
#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
- bd->bi_pci_busfreq = get_PCI_freq ();
- bd->bi_opbfreq = get_OPB_freq ();
+ bd->bi_pci_busfreq = get_PCI_freq();
+ bd->bi_opbfreq = get_OPB_freq();
#elif defined(CONFIG_XILINX_405)
- bd->bi_pci_busfreq = get_PCI_freq ();
+ bd->bi_pci_busfreq = get_PCI_freq();
#endif
#endif
- debug ("New Stack Pointer is: %08lx\n", addr_sp);
+ debug("New Stack Pointer is: %08lx\n", addr_sp);
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
- gd->relocaddr = addr; /* Record relocation address, useful for debug */
+ gd->relocaddr = addr; /* Store relocation addr, useful for debug */
- memcpy (id, (void *)gd, sizeof (gd_t));
+ memcpy(id, (void *) gd, sizeof(gd_t));
- relocate_code (addr_sp, id, addr);
+ relocate_code(addr_sp, id, addr);
/* NOTREACHED - relocate_code() does not return */
}
-/************************************************************************
- *
+/*
* This is the next part if the initialization sequence: we are now
* running from RAM and have a "normal" C environment, i. e. global
* data can be written, BSS has been cleared, the stack size in not
* that critical any more, etc.
- *
- ************************************************************************
*/
-void board_init_r (gd_t *id, ulong dest_addr)
+void board_init_r(gd_t *id, ulong dest_addr)
{
bd_t *bd;
ulong malloc_start;
-#if defined(CONFIG_SYS_FLASH_CHECKSUM) || defined(CONFIG_CMD_NET)
- char *s;
-#endif
+
#ifndef CONFIG_SYS_NO_FLASH
ulong flash_size;
#endif
@@ -663,38 +664,38 @@ void board_init_r (gd_t *id, ulong dest_addr)
serial_initialize();
#endif
- debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
+ debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
/*
* Setup trap handlers
*/
- trap_init (dest_addr);
+ trap_init(dest_addr);
#ifdef CONFIG_ADDR_MAP
init_addr_map();
#endif
#if defined(CONFIG_BOARD_EARLY_INIT_R)
- board_early_init_r ();
+ board_early_init_r();
#endif
monitor_flash_len = (ulong)&__init_end - dest_addr;
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
#ifdef CONFIG_LOGBUFFER
- logbuff_init_ptrs ();
+ logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
- post_output_backlog ();
+ post_output_backlog();
#endif
WATCHDOG_RESET();
#if defined(CONFIG_SYS_DELAYED_ICACHE)
- icache_enable (); /* it's time to enable the instruction cache */
+ icache_enable(); /* it's time to enable the instruction cache */
#endif
#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
@@ -706,85 +707,89 @@ void board_init_r (gd_t *id, ulong dest_addr)
* Do early PCI configuration _before_ the flash gets initialised,
* because PCU ressources are crucial for flash access on some boards.
*/
- pci_init ();
+ pci_init();
#endif
#if defined(CONFIG_WINBOND_83C553)
/*
* Initialise the ISA bridge
*/
- initialise_w83c553f ();
+ initialise_w83c553f();
#endif
- asm ("sync ; isync");
+ asm("sync ; isync");
- mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
+ mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
#if !defined(CONFIG_SYS_NO_FLASH)
- puts ("Flash: ");
+ puts("Flash: ");
if (board_flash_wp_on()) {
printf("Uninitialized - Write Protect On\n");
/* Since WP is on, we can't find real size. Set to 0 */
flash_size = 0;
- } else if ((flash_size = flash_init ()) > 0) {
-# ifdef CONFIG_SYS_FLASH_CHECKSUM
+ } else if ((flash_size = flash_init()) > 0) {
+#ifdef CONFIG_SYS_FLASH_CHECKSUM
char *s;
- print_size (flash_size, "");
+ print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
- s = getenv ("flashchecksum");
+ s = getenv("flashchecksum");
if (s && (*s == 'y')) {
- printf (" CRC: %08X",
- crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size)
- );
+ printf(" CRC: %08X",
+ crc32(0,
+ (const unsigned char *)
+ CONFIG_SYS_FLASH_BASE, flash_size)
+ );
}
- putc ('\n');
-# else /* !CONFIG_SYS_FLASH_CHECKSUM */
- print_size (flash_size, "\n");
-# endif /* CONFIG_SYS_FLASH_CHECKSUM */
+ putc('\n');
+#else /* !CONFIG_SYS_FLASH_CHECKSUM */
+ print_size(flash_size, "\n");
+#endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
- puts (failed);
- hang ();
+ puts(failed);
+ hang();
}
- bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */
- bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
+ /* update start of FLASH memory */
+ bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+ /* size of FLASH memory (final value) */
+ bd->bi_flashsize = flash_size;
#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
/* Make a update of the Memctrl. */
- update_flash_size (flash_size);
+ update_flash_size(flash_size);
#endif
-# if defined(CONFIG_OXC) || defined(CONFIG_RMU)
+#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
-# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
- bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
-# endif
+#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
+ bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
+#endif
#endif /* !CONFIG_SYS_NO_FLASH */
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
/* initialize higher level parts of CPU like time base and timers */
- cpu_init_r ();
+ cpu_init_r();
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
#ifdef CONFIG_SPI
-# if !defined(CONFIG_ENV_IS_IN_EEPROM)
- spi_init_f ();
-# endif
- spi_init_r ();
+#if !defined(CONFIG_ENV_IS_IN_EEPROM)
+ spi_init_f();
+#endif
+ spi_init_r();
#endif
#if defined(CONFIG_CMD_NAND)
- WATCHDOG_RESET ();
- puts ("NAND: ");
+ WATCHDOG_RESET();
+ puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
@@ -794,13 +799,13 @@ void board_init_r (gd_t *id, ulong dest_addr)
* Thus It is required that operations like pin multiplexer
* be put in board_init.
*/
- WATCHDOG_RESET ();
- puts ("MMC: ");
- mmc_initialize (bd);
+ WATCHDOG_RESET();
+ puts("MMC: ");
+ mmc_initialize(bd);
#endif
/* relocate environment function pointers etc. */
- env_relocate ();
+ env_relocate();
/*
* after non-volatile devices & environment is setup and cpu code have
@@ -826,21 +831,22 @@ void board_init_r (gd_t *id, ulong dest_addr)
* "i2cfast" into account
*/
{
- char *s = getenv ("i2cfast");
+ char *s = getenv("i2cfast");
+
if (s && ((*s == 'y') || (*s == 'Y'))) {
bd->bi_iic_fast[0] = 1;
bd->bi_iic_fast[1] = 1;
}
}
-#endif /* CONFIG_I2CFAST */
-#endif /* CONFIG_405GP, CONFIG_405EP */
-#endif /* CONFIG_SYS_EXTBDINFO */
+#endif /* CONFIG_I2CFAST */
+#endif /* CONFIG_405GP, CONFIG_405EP */
+#endif /* CONFIG_SYS_EXTBDINFO */
#if defined(CONFIG_SC3)
sc3_read_eeprom();
#endif
-#if defined (CONFIG_ID_EEPROM) || defined (CONFIG_SYS_I2C_MAC_OFFSET)
+#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
mac_read_from_eeprom();
#endif
@@ -872,60 +878,60 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif /* CONFIG_CMD_NET */
/* IP Address */
- bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
+ bd->bi_ip_addr = getenv_IPaddr("ipaddr");
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
* Do pci configuration
*/
- pci_init ();
+ pci_init();
#endif
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize stdio devices */
- stdio_init ();
+ stdio_init();
/* Initialize the jump table for applications */
- jumptable_init ();
+ jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
- api_init ();
+ api_init();
#endif
/* Initialize the console (after the relocation and devices init) */
- console_init_r ();
+ console_init_r();
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
- misc_init_r ();
+ misc_init_r();
#endif
#ifdef CONFIG_HERMES
if (bd->bi_ethspeed != 0xFFFF)
- hermes_start_lxt980 ((int) bd->bi_ethspeed);
+ hermes_start_lxt980((int) bd->bi_ethspeed);
#endif
#if defined(CONFIG_CMD_KGDB)
- WATCHDOG_RESET ();
- puts ("KGDB: ");
- kgdb_init ();
+ WATCHDOG_RESET();
+ puts("KGDB: ");
+ kgdb_init();
#endif
- debug ("U-Boot relocated to %08lx\n", dest_addr);
+ debug("U-Boot relocated to %08lx\n", dest_addr);
/*
* Enable Interrupts
*/
- interrupt_init ();
+ interrupt_init();
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
- status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
- udelay (20);
+ udelay(20);
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
@@ -938,74 +944,74 @@ void board_init_r (gd_t *id, ulong dest_addr)
}
#endif
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
#if defined(CONFIG_CMD_SCSI)
- WATCHDOG_RESET ();
- puts ("SCSI: ");
- scsi_init ();
+ WATCHDOG_RESET();
+ puts("SCSI: ");
+ scsi_init();
#endif
#if defined(CONFIG_CMD_DOC)
- WATCHDOG_RESET ();
- puts ("DOC: ");
- doc_init ();
+ WATCHDOG_RESET();
+ puts("DOC: ");
+ doc_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
- WATCHDOG_RESET ();
- puts ("Net: ");
- eth_initialize (bd);
+ WATCHDOG_RESET();
+ puts("Net: ");
+ eth_initialize(bd);
#endif
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
- WATCHDOG_RESET ();
- debug ("Reset Ethernet PHY\n");
- reset_phy ();
+ WATCHDOG_RESET();
+ debug("Reset Ethernet PHY\n");
+ reset_phy();
#endif
#ifdef CONFIG_POST
- post_run (NULL, POST_RAM | post_bootmode_get(0));
+ post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_CMD_PCMCIA) \
&& !defined(CONFIG_CMD_IDE)
- WATCHDOG_RESET ();
- puts ("PCMCIA:");
- pcmcia_init ();
+ WATCHDOG_RESET();
+ puts("PCMCIA:");
+ pcmcia_init();
#endif
#if defined(CONFIG_CMD_IDE)
- WATCHDOG_RESET ();
-# ifdef CONFIG_IDE_8xx_PCCARD
- puts ("PCMCIA:");
-# else
- puts ("IDE: ");
+ WATCHDOG_RESET();
+#ifdef CONFIG_IDE_8xx_PCCARD
+ puts("PCMCIA:");
+#else
+ puts("IDE: ");
#endif
#if defined(CONFIG_START_IDE)
if (board_start_ide())
- ide_init ();
+ ide_init();
#else
- ide_init ();
+ ide_init();
#endif
#endif
#ifdef CONFIG_LAST_STAGE_INIT
- WATCHDOG_RESET ();
+ WATCHDOG_RESET();
/*
* Some parts can be only initialized if all others (like
* Interrupts) are up and running (i.e. the PC-style ISA
* keyboard).
*/
- last_stage_init ();
+ last_stage_init();
#endif
#if defined(CONFIG_CMD_BEDBUG)
- WATCHDOG_RESET ();
- bedbug_init ();
+ WATCHDOG_RESET();
+ bedbug_init();
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
@@ -1023,46 +1029,49 @@ void board_init_r (gd_t *id, ulong dest_addr)
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
- pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
+ pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
- sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
- setenv ("mem", (char *)memsz);
+ sprintf((char *) memsz, "%ldk",
+ (bd->bi_memsize / 1024) - pram);
+ setenv("mem", (char *) memsz);
}
#endif
#ifdef CONFIG_PS2KBD
- puts ("PS/2: ");
+ puts("PS/2: ");
kbd_init();
#endif
#ifdef CONFIG_MODEM_SUPPORT
- {
- extern int do_mdm_init;
- do_mdm_init = gd->do_mdm_init;
- }
+ {
+ extern int do_mdm_init;
+
+ do_mdm_init = gd->do_mdm_init;
+ }
#endif
/* Initialization complete - start the monitor */
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
- WATCHDOG_RESET ();
- main_loop ();
+ WATCHDOG_RESET();
+ main_loop();
}
/* NOTREACHED - no way out of command loop except booting */
}
-void hang (void)
+void hang(void)
{
- puts ("### ERROR ### Please RESET the board ###\n");
+ puts("### ERROR ### Please RESET the board ###\n");
show_boot_progress(-30);
- for (;;);
+ for (;;)
+ ;
}
-#if 0 /* We could use plain global data, but the resulting code is bigger */
+#if 0 /* We could use plain global data, but the resulting code is bigger */
/*
* Pointer to initial global data area
*
@@ -1070,7 +1079,8 @@ void hang (void)
*/
#undef XTRN_DECLARE_GLOBAL_DATA_PTR
#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
-DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
-#endif /* 0 */
+DECLARE_GLOBAL_DATA_PTR =
+ (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
+#endif /* 0 */
/************************************************************************/
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-31 11:23:43 +0000