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-rw-r--r--arch/arm/dts/zynq-7000.dtsi2
-rw-r--r--arch/arm/dts/zynqmp-e-a2197-00-revA.dts5
-rw-r--r--arch/arm/dts/zynqmp-sck-kd-g-revA.dtso16
-rw-r--r--arch/arm/dts/zynqmp-sck-kr-g-revA.dtso25
-rw-r--r--arch/arm/dts/zynqmp-sck-kr-g-revB.dtso8
-rw-r--r--arch/arm/dts/zynqmp.dtsi131
6 files changed, 111 insertions, 76 deletions
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index f8c786ab0b7..75dfd2f069d 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -44,7 +44,7 @@
};
};
- fpga_full: fpga-full {
+ fpga_full: fpga-region {
compatible = "fpga-region";
fpga-mgr = <&devcfg>;
#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index f1b0a4aa65d..0b97fa3f28a 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -449,6 +449,7 @@
factory-fout = <156250000>;
clock-frequency = <156250000>;
clock-output-names = "si570_zsfp_clk";
+ silabs,skip-recall;
};
};
i2c@6 { /* USER_SI570_1 */
@@ -463,6 +464,7 @@
factory-fout = <100000000>;
clock-frequency = <100000000>;
clock-output-names = "si570_user1";
+ silabs,skip-recall;
};
};
@@ -560,6 +562,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_lpddr4_clk2";
+ silabs,skip-recall;
};
};
i2c@5 { /* LPDDR4_SI570_CLK1 */
@@ -574,6 +577,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_lpddr4_clk1";
+ silabs,skip-recall;
};
};
i2c@6 { /* HSDP_SI570 */
@@ -588,6 +592,7 @@
factory-fout = <156250000>;
clock-frequency = <156250000>;
clock-output-names = "si570_hsdp_clk";
+ silabs,skip-recall;
};
};
i2c@7 { /* 8A34001 - U219B and J310 connector */
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 766f78303ee..5202b7c4819 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -32,6 +32,18 @@
#clock-cells = <0>;
clock-frequency = <26000000>;
};
+
+ clk_25_0: clock4 { /* u92/u91 - GEM2 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ clk_25_1: clock5 { /* u92/u91 - GEM3 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
};
&can0 {
@@ -354,3 +366,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
};
+
+&zynqmp_dpsub {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 7717abf7bd8..ce7c5eb6d34 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -25,37 +25,43 @@
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
- si5332_0: si5332-0 { /* u17 - GEM0/1 */
+ clk_27: clock0 { /* u86 - DP */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
+
+ clk_125: si5332-0 { /* u17 - GEM0/1 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
- si5332_1: si5332-1 { /* u17 - DP */
+ clk_74: si5332-5 { /* u17 - SLVC-EC */
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <27000000>;
+ clock-frequency = <74250000>;
};
- si5332_2: si5332-2 { /* u17 - USB */
+ clk_26: si5332-2 { /* u17 - USB */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
- si5332_3: si5332-3 { /* u17 - SFP+ */
+ clk_156: si5332-3 { /* u17 - SFP+ */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <156250000>;
};
- si5332_4: si5332-4 { /* u17 - GEM2 */
+ clk_25_0: si5332-1 { /* u17 - GEM2 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
- si5332_5: si5332-5 { /* u17 - GEM3 */
+ clk_25_1: si5332-4 { /* u17 - GEM3 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
@@ -115,7 +121,7 @@
&psgtr {
status = "okay";
/* gem0/1, dp, usb */
- clocks = <&si5332_0>, <&si5332_1>, <&si5332_2>;
+ clocks = <&clk_125>, <&clk_27>, <&clk_26>;
clock-names = "ref0", "ref1", "ref2";
};
@@ -168,12 +174,13 @@
phys = <&psgtr 3 PHY_TYPE_USB3 1 2>;
reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>;
assigned-clock-rates = <250000000>, <20000000>;
-
+#if 0
usbhub1: usb-hub { /* u84 */
i2c-bus = <&usbhub_i2c1>;
compatible = "microchip,usb5744";
reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 21187396326..6c29f657413 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -60,6 +60,12 @@
#clock-cells = <0>;
clock-frequency = <25000000>;
};
+
+ clk_74: clock6 { /* u88 - SLVC-EC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <74250000>;
+ };
};
&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -169,11 +175,13 @@
reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>;
assigned-clock-rates = <250000000>, <20000000>;
+#if 0
usbhub1: usb-hub { /* u84 */
i2c-bus = <&usbhub_i2c1>;
compatible = "microchip,usb5744";
reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 63238c08780..b50b83b7723 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -207,68 +207,71 @@
mbox-names = "tx", "rx";
};
- nvmem-firmware {
+ soc-nvmem {
compatible = "xlnx,zynqmp-nvmem-fw";
- #address-cells = <1>;
- #size-cells = <1>;
-
- soc_revision: soc-revision@0 {
- reg = <0x0 0x4>;
- };
- /* efuse access */
- efuse_dna: efuse-dna@c {
- reg = <0xc 0xc>;
- };
- efuse_usr0: efuse-usr0@20 {
- reg = <0x20 0x4>;
- };
- efuse_usr1: efuse-usr1@24 {
- reg = <0x24 0x4>;
- };
- efuse_usr2: efuse-usr2@28 {
- reg = <0x28 0x4>;
- };
- efuse_usr3: efuse-usr3@2c {
- reg = <0x2c 0x4>;
- };
- efuse_usr4: efuse-usr4@30 {
- reg = <0x30 0x4>;
- };
- efuse_usr5: efuse-usr5@34 {
- reg = <0x34 0x4>;
- };
- efuse_usr6: efuse-usr6@38 {
- reg = <0x38 0x4>;
- };
- efuse_usr7: efuse-usr7@3c {
- reg = <0x3c 0x4>;
- };
- efuse_miscusr: efuse-miscusr@40 {
- reg = <0x40 0x4>;
- };
- efuse_chash: efuse-chash@50 {
- reg = <0x50 0x4>;
- };
- efuse_pufmisc: efuse-pufmisc@54 {
- reg = <0x54 0x4>;
- };
- efuse_sec: efuse-sec@58 {
- reg = <0x58 0x4>;
- };
- efuse_spkid: efuse-spkid@5c {
- reg = <0x5c 0x4>;
- };
- efuse_aeskey: efuse-aeskey@60 {
- reg = <0x60 0x20>;
- };
- efuse_ppk0hash: efuse-ppk0hash@a0 {
- reg = <0xa0 0x30>;
- };
- efuse_ppk1hash: efuse-ppk1hash@d0 {
- reg = <0xd0 0x30>;
- };
- efuse_pufuser: efuse-pufuser@100 {
- reg = <0x100 0x7F>;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc_revision: soc-revision@0 {
+ reg = <0x0 0x4>;
+ };
+ /* efuse access */
+ efuse_dna: efuse-dna@c {
+ reg = <0xc 0xc>;
+ };
+ efuse_usr0: efuse-usr0@20 {
+ reg = <0x20 0x4>;
+ };
+ efuse_usr1: efuse-usr1@24 {
+ reg = <0x24 0x4>;
+ };
+ efuse_usr2: efuse-usr2@28 {
+ reg = <0x28 0x4>;
+ };
+ efuse_usr3: efuse-usr3@2c {
+ reg = <0x2c 0x4>;
+ };
+ efuse_usr4: efuse-usr4@30 {
+ reg = <0x30 0x4>;
+ };
+ efuse_usr5: efuse-usr5@34 {
+ reg = <0x34 0x4>;
+ };
+ efuse_usr6: efuse-usr6@38 {
+ reg = <0x38 0x4>;
+ };
+ efuse_usr7: efuse-usr7@3c {
+ reg = <0x3c 0x4>;
+ };
+ efuse_miscusr: efuse-miscusr@40 {
+ reg = <0x40 0x4>;
+ };
+ efuse_chash: efuse-chash@50 {
+ reg = <0x50 0x4>;
+ };
+ efuse_pufmisc: efuse-pufmisc@54 {
+ reg = <0x54 0x4>;
+ };
+ efuse_sec: efuse-sec@58 {
+ reg = <0x58 0x4>;
+ };
+ efuse_spkid: efuse-spkid@5c {
+ reg = <0x5c 0x4>;
+ };
+ efuse_aeskey: efuse-aeskey@60 {
+ reg = <0x60 0x20>;
+ };
+ efuse_ppk0hash: efuse-ppk0hash@a0 {
+ reg = <0xa0 0x30>;
+ };
+ efuse_ppk1hash: efuse-ppk1hash@d0 {
+ reg = <0xd0 0x30>;
+ };
+ efuse_pufuser: efuse-pufuser@100 {
+ reg = <0x100 0x7F>;
+ };
};
};
@@ -303,11 +306,7 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
- edac {
- compatible = "arm,cortex-a53-edac";
- };
-
- fpga_full: fpga-full {
+ fpga_full: fpga-region {
compatible = "fpga-region";
fpga-mgr = <&zynqmp_pcap>;
#address-cells = <2>;
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-07 20:42:18 +0000