diff options
Diffstat (limited to 'arch')
91 files changed, 471 insertions, 3634 deletions
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 532a8131c59..fe6ad7b849a 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -10,12 +10,5 @@ dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index f9c2083677a..d2d3e346a36 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -10,6 +10,7 @@ #include <env.h> #include <init.h> #include <hang.h> +#include <lmb.h> #include <log.h> #include <net.h> #include <vsprintf.h> @@ -1525,8 +1526,8 @@ int dram_init_banksize(void) return 0; } -#if CONFIG_IS_ENABLED(EFI_LOADER) -void efi_add_known_memory(void) +#if CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP) +void lmb_arch_add_memory(void) { int i; phys_addr_t ram_start; @@ -1548,8 +1549,7 @@ void efi_add_known_memory(void) gd->arch.resv_ram < ram_start + ram_size) ram_size = gd->arch.resv_ram - ram_start; #endif - efi_add_memory_map(ram_start, ram_size, - EFI_CONVENTIONAL_MEMORY); + lmb_add(ram_start, ram_size); } } #endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 123e121e7e7..8b9ced128b6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -961,8 +961,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mp-dhcom-som-overlay-eth2xfast.dtbo \ imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo \ imx8mp-dhcom-drc02.dtb \ - imx8mp-dhcom-pdk2.dtb \ - imx8mp-dhcom-pdk3.dtb \ imx8mp-dhcom-pdk3-overlay-rev100.dtbo \ imx8mp-dhcom-picoitx.dtb \ imx8mp-icore-mx8mp-edimm2.2.dtb \ @@ -1142,7 +1140,6 @@ dtb-$(CONFIG_ASPEED_AST2600) += \ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb dtb-$(CONFIG_STM32MP13X) += \ - stm32mp135f-dhcor-dhsbc.dtb \ stm32mp135f-dk.dtb dtb-$(CONFIG_STM32MP15X) += \ @@ -1158,13 +1155,7 @@ dtb-$(CONFIG_STM32MP15X) += \ stm32mp157c-ed1-scmi.dtb \ stm32mp157c-ev1.dtb \ stm32mp157c-ev1-scmi.dtb \ - stm32mp157c-odyssey.dtb \ - stm32mp15xx-dhcom-drc02.dtb \ - stm32mp15xx-dhcom-pdk2.dtb \ - stm32mp15xx-dhcom-picoitx.dtb \ - stm32mp15xx-dhcor-avenger96.dtb \ - stm32mp15xx-dhcor-drc-compact.dtb \ - stm32mp15xx-dhcor-testbench.dtb + stm32mp157c-odyssey.dtb dtb-$(CONFIG_STM32MP25X) += \ stm32mp257f-ev1.dtb @@ -1306,16 +1297,8 @@ dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \ include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - # Add any required device tree compiler flags here DTC_FLAGS += -a 0x8 DTC_FLAGS_imx8mp-dhcom-som-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format DTC_FLAGS_imx8mp-dhcom-pdk3-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb *.dtbo *_HS diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2.dts b/arch/arm/dts/imx8mp-dhcom-pdk2.dts deleted file mode 100644 index 8f4eff37c40..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-pdk2.dts +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2022 Marek Vasut <marex@denx.de> - * - * DHCOM iMX8MP variant: - * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 - * DHCOM PCB number: 660-100 or newer - * PDK2 PCB number: 516-400 or newer - */ - -/dts-v1/; - -#include <dt-bindings/leds/common.h> -#include <dt-bindings/phy/phy-imx8-pcie.h> -#include "imx8mp-dhcom-som.dtsi" - -/ { - model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)"; - compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som", - "fsl,imx8mp"; - - chosen { - stdout-path = &uart1; - }; - - gpio-keys { - compatible = "gpio-keys"; - - button-0 { - gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ - label = "TA1-GPIO-A"; - linux,code = <KEY_A>; - pinctrl-0 = <&pinctrl_dhcom_a>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-1 { - gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ - label = "TA2-GPIO-B"; - linux,code = <KEY_B>; - pinctrl-0 = <&pinctrl_dhcom_b>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-2 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ - label = "TA3-GPIO-C"; - linux,code = <KEY_C>; - pinctrl-0 = <&pinctrl_dhcom_c>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-3 { - gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */ - label = "TA4-GPIO-D"; - linux,code = <KEY_D>; - pinctrl-0 = <&pinctrl_dhcom_d>; - pinctrl-names = "default"; - wakeup-source; - }; - }; - - led { - compatible = "gpio-leds"; - - led-0 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */ - pinctrl-0 = <&pinctrl_dhcom_e>; - pinctrl-names = "default"; - }; - - led-1 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */ - pinctrl-0 = <&pinctrl_dhcom_f>; - pinctrl-names = "default"; - }; - - led-2 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; /* GPIO H */ - pinctrl-0 = <&pinctrl_dhcom_h>; - pinctrl-names = "default"; - }; - - led-3 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */ - pinctrl-0 = <&pinctrl_dhcom_i>; - pinctrl-names = "default"; - }; - }; -}; - -&fec { /* Second ethernet */ - pinctrl-0 = <&pinctrl_fec_rgmii>; - phy-handle = <ðphypdk>; - phy-mode = "rgmii"; - - mdio { - ethphypdk: ethernet-phy@7 { /* KSZ 9021 */ - compatible = "ethernet-phy-ieee802.3-c22"; - pinctrl-0 = <&pinctrl_ethphy1>; - pinctrl-names = "default"; - interrupt-parent = <&gpio4>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - max-speed = <100>; - reg = <7>; - reset-assert-us = <1000>; - reset-deassert-us = <1000>; - reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; - rxc-skew-ps = <3000>; - rxd0-skew-ps = <0>; - rxd1-skew-ps = <0>; - rxd2-skew-ps = <0>; - rxd3-skew-ps = <0>; - rxdv-skew-ps = <0>; - txc-skew-ps = <3000>; - txd0-skew-ps = <0>; - txd1-skew-ps = <0>; - txd2-skew-ps = <0>; - txd3-skew-ps = <0>; - txen-skew-ps = <0>; - }; - }; -}; - -&flexcan1 { - status = "okay"; -}; - -&usb3_1 { - fsl,over-current-active-low; -}; - -&iomuxc { - /* - * GPIO_A,B,C,D are connected to buttons. - * GPIO_E,F,H,I are connected to LEDs. - * GPIO_M is connected to CLKOUT2. - */ - pinctrl-0 = <&pinctrl_hog_base - &pinctrl_dhcom_g &pinctrl_dhcom_j - &pinctrl_dhcom_k &pinctrl_dhcom_l - &pinctrl_dhcom_int>; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3.dts b/arch/arm/dts/imx8mp-dhcom-pdk3.dts deleted file mode 100644 index 867d238f2b5..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-pdk3.dts +++ /dev/null @@ -1,317 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2023 Marek Vasut <marex@denx.de> - * - * DHCOM iMX8MP variant: - * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 - * DHCOM PCB number: 660-100 or newer - * PDK3 PCB number: 669-100 or newer - */ - -/dts-v1/; - -#include <dt-bindings/leds/common.h> -#include <dt-bindings/phy/phy-imx8-pcie.h> -#include "imx8mp-dhcom-som.dtsi" - -/ { - model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (3)"; - compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som", - "fsl,imx8mp"; - - chosen { - stdout-path = &uart1; - }; - - clk_ext_audio_codec: clock-codec { - #clock-cells = <0>; - clock-frequency = <24000000>; - compatible = "fixed-clock"; - }; - - clk_xtal25: clk-xtal25 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - usb_c_0_hs_ep: endpoint { - remote-endpoint = <&dwc3_0_hs_ep>; - }; - }; - - port@1 { - reg = <1>; - - usb_c_0_ss_ep: endpoint { - remote-endpoint = <&ptn5150_in_ep>; - }; - }; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - button-0 { - gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ - label = "TA1-GPIO-A"; - linux,code = <KEY_A>; - pinctrl-0 = <&pinctrl_dhcom_a>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-1 { - gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ - label = "TA2-GPIO-B"; - linux,code = <KEY_B>; - pinctrl-0 = <&pinctrl_dhcom_b>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-2 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ - label = "TA3-GPIO-C"; - linux,code = <KEY_C>; - pinctrl-0 = <&pinctrl_dhcom_c>; - pinctrl-names = "default"; - wakeup-source; - }; - - button-3 { - gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; /* GPIO E */ - label = "TA4-GPIO-E"; - linux,code = <KEY_E>; - pinctrl-0 = <&pinctrl_dhcom_e>; - pinctrl-names = "default"; - wakeup-source; - }; - }; - - led { - compatible = "gpio-leds"; - - led-0 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <0>; - gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; /* GPIO D */ - pinctrl-0 = <&pinctrl_dhcom_d>; - pinctrl-names = "default"; - }; - - led-1 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */ - pinctrl-0 = <&pinctrl_dhcom_f>; - pinctrl-names = "default"; - }; - - led-2 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */ - pinctrl-0 = <&pinctrl_dhcom_g>; - pinctrl-names = "default"; - }; - - led-3 { - color = <LED_COLOR_ID_GREEN>; - default-state = "off"; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <3>; - gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */ - pinctrl-0 = <&pinctrl_dhcom_i>; - pinctrl-names = "default"; - }; - }; - - reg_avdd: regulator-avdd { /* AUDIO_VDD */ - compatible = "regulator-fixed"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "AUDIO_VDD"; - }; -}; - -&i2c5 { - i2cmux@70 { - compatible = "nxp,pca9540"; - reg = <0x70>; - #address-cells = <1>; - #size-cells = <0>; - - i2cmuxed0: i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - typec@3d { - compatible = "nxp,ptn5150"; - reg = <0x3d>; - interrupt-parent = <&gpio4>; - interrupts = <25 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ptn5150>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - ptn5150_in_ep: endpoint { - remote-endpoint = <&usb_c_0_ss_ep>; - }; - }; - - port@1 { - reg = <1>; - - ptn5150_out_ep: endpoint { - remote-endpoint = <&dwc3_0_ss_ep>; - }; - }; - }; - }; - - power-sensor@40 { - compatible = "ti,ina238"; - reg = <0x40>; - shunt-resistor = <20000>; /* 0.02 R */ - ti,shunt-gain = <1>; /* Drop cca. 40mV */ - }; - - eeprom_board: eeprom@54 { - compatible = "atmel,24c04"; - pagesize = <16>; - reg = <0x54>; - }; - - pcieclk: clk@6b { - compatible = "skyworks,si52144"; - reg = <0x6b>; - clocks = <&clk_xtal25>; - #clock-cells = <1>; - }; - }; - - i2cmuxed1: i2c@1 { /* HDMI DDC I2C */ - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; - }; -}; - -&fec { /* Second ethernet */ - pinctrl-0 = <&pinctrl_fec_rgmii>; - phy-handle = <ðphypdk>; - phy-mode = "rgmii-id"; - - mdio { - ethphypdk: ethernet-phy@7 { /* Micrel KSZ9131RNXI */ - compatible = "ethernet-phy-id0022.1642", - "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio4>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&pinctrl_ethphy1>; - pinctrl-names = "default"; - reg = <7>; - reset-assert-us = <1000>; - /* RESET_N signal rise time ~100ms */ - reset-deassert-us = <120000>; - reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; - status = "okay"; - }; - }; -}; - -&flexcan1 { - status = "okay"; -}; - -&pcie_phy { - clocks = <&pcieclk 1>; - clock-names = "ref"; - fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; - status = "okay"; -}; - -&pcie { - fsl,max-link-speed = <3>; - reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&usb_dwc3_0 { - usb-role-switch; - - port { - #address-cells = <1>; - #size-cells = <0>; - - dwc3_0_hs_ep: endpoint@0 { - reg = <0>; - remote-endpoint = <&usb_c_0_hs_ep>; - }; - - dwc3_0_ss_ep: endpoint@1 { - reg = <1>; - remote-endpoint = <&ptn5150_out_ep>; - }; - }; -}; - -&usb3_1 { - fsl,disable-port-power-control; - fsl,permanently-attached; -}; - -&usb_dwc3_1 { - /* This port has USB5734 Hub connected to it, PWR/OC pins are unused */ - /delete-property/ pinctrl-names; - /delete-property/ pinctrl-0; -}; - -&iomuxc { - /* - * GPIO_A,B,C,E are connected to buttons. - * GPIO_D,F,G,I are connected to LEDs. - * GPIO_H is connected to USB Hub RESET_N. - * GPIO_M is connected to CLKOUT2. - */ - pinctrl-0 = <&pinctrl_hog_base - &pinctrl_dhcom_h &pinctrl_dhcom_j &pinctrl_dhcom_k - &pinctrl_dhcom_l - &pinctrl_dhcom_int>; - - pinctrl_ptn5150: ptn5150grp { - fsl,pins = < - MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40000000 - >; - }; -}; diff --git a/arch/arm/dts/k3-am62-r5-lp-sk.dts b/arch/arm/dts/k3-am62-r5-lp-sk.dts index ec5d3f4ba2c..b8e5f49a1fc 100644 --- a/arch/arm/dts/k3-am62-r5-lp-sk.dts +++ b/arch/arm/dts/k3-am62-r5-lp-sk.dts @@ -25,7 +25,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1200000000>; diff --git a/arch/arm/dts/k3-am625-r5-beagleplay.dts b/arch/arm/dts/k3-am625-r5-beagleplay.dts index f0b66f0cb94..9e0a6ed6784 100644 --- a/arch/arm/dts/k3-am625-r5-beagleplay.dts +++ b/arch/arm/dts/k3-am625-r5-beagleplay.dts @@ -24,7 +24,8 @@ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1250000000>; diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index 0912b953db0..d2dd75469c1 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -25,7 +25,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1200000000>; diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts index bc05dcb5efb..464227b3b25 100644 --- a/arch/arm/dts/k3-am62a7-r5-sk.dts +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts @@ -23,7 +23,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1200000000>; diff --git a/arch/arm/dts/k3-am62p5-r5-sk.dts b/arch/arm/dts/k3-am62p5-r5-sk.dts index 658f2cf730a..baf1a83dc12 100644 --- a/arch/arm/dts/k3-am62p5-r5-sk.dts +++ b/arch/arm/dts/k3-am62p5-r5-sk.dts @@ -26,7 +26,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1200000000>; diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index be8596987ba..933f75095b1 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -22,7 +22,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1000000000>; diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 2186152a0b8..6e31dfd97c5 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -22,7 +22,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1000000000>; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index dea2ba85dcb..ab5195eb15c 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -22,7 +22,8 @@ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 202 0>; assigned-clock-rates = <800000000>; ti,sci = <&dmsc>; diff --git a/arch/arm/dts/k3-am69-r5-sk.dts b/arch/arm/dts/k3-am69-r5-sk.dts index 4d6aab5ccc3..13809f82d99 100644 --- a/arch/arm/dts/k3-am69-r5-sk.dts +++ b/arch/arm/dts/k3-am69-r5-sk.dts @@ -26,7 +26,8 @@ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <2000000000>; diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index fac108ce14b..f096b102793 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -23,7 +23,8 @@ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 1>; + clocks = <&k3_clks 61 1>, <&k3_clks 202 2>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>; assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>; assigned-clock-rates = <2000000000>, <200000000>; diff --git a/arch/arm/dts/k3-j721e-r5.dtsi b/arch/arm/dts/k3-j721e-r5.dtsi index fd0d921272c..688a6cf4089 100644 --- a/arch/arm/dts/k3-j721e-r5.dtsi +++ b/arch/arm/dts/k3-j721e-r5.dtsi @@ -20,7 +20,8 @@ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 1>; + clocks = <&k3_clks 61 1>, <&k3_clks 202 2>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>; assigned-clock-rates = <2000000000>, <200000000>; ti,sci = <&dmsc>; diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts index e92b1917df4..506ad9b7910 100644 --- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts @@ -10,3 +10,12 @@ #include "k3-j721s2-ddr.dtsi" #include "k3-j721s2-common-proc-board-u-boot.dtsi" #include "k3-j721s2-r5.dtsi" + +&tps659411 { + bootph-pre-ram; +}; + +&wkup_vtm0 { + bootph-pre-ram; + vdd-supply-2 = <&bucka1234>; +}; diff --git a/arch/arm/dts/k3-j721s2-r5.dtsi b/arch/arm/dts/k3-j721s2-r5.dtsi index caf696c2d96..634676c8491 100644 --- a/arch/arm/dts/k3-j721s2-r5.dtsi +++ b/arch/arm/dts/k3-j721s2-r5.dtsi @@ -20,7 +20,8 @@ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 1>; + clocks = <&k3_clks 61 1>, <&k3_clks 202 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>; assigned-clock-parents = <&k3_clks 61 3>; assigned-clock-rates = <200000000>, <2000000000>; diff --git a/arch/arm/dts/k3-j722s-binman.dtsi b/arch/arm/dts/k3-j722s-binman.dtsi index 28087a3b6fb..6b521166575 100644 --- a/arch/arm/dts/k3-j722s-binman.dtsi +++ b/arch/arm/dts/k3-j722s-binman.dtsi @@ -8,6 +8,56 @@ #if IS_ENABLED(CONFIG_TARGET_J722S_R5_EVM) &binman { + tiboot3-j722s-hs-evm.bin { + filename = "tiboot3-j722s-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>, + <&combined_dm_cfg>, <&sysfw_inner_cert>; + combined; + dm-data; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl>; + content-sysfw = <&ti_fs_enc>; + content-sysfw-data = <&combined_tifs_cfg>; + content-sysfw-inner-cert = <&sysfw_inner_cert>; + content-dm-data = <&combined_dm_cfg>; + load = <0x43c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x67000>; + load-dm-data = <0x43c7a800>; + }; + + u_boot_spl: u-boot-spl { + no-expanded; + }; + + ti_fs_enc: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + combined_tifs_cfg: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + + sysfw_inner_cert: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + + combined_dm_cfg: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + +&binman { tiboot3-j722s-hs-fs-evm.bin { filename = "tiboot3-j722s-hs-fs-evm.bin"; symlink = "tiboot3.bin"; diff --git a/arch/arm/dts/k3-j722s-r5-evm.dts b/arch/arm/dts/k3-j722s-r5-evm.dts index aff83cd5d91..69785ec78e9 100644 --- a/arch/arm/dts/k3-j722s-r5-evm.dts +++ b/arch/arm/dts/k3-j722s-r5-evm.dts @@ -25,7 +25,8 @@ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <1200000000>; diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts index d2c75229363..8b8b0e70047 100644 --- a/arch/arm/dts/k3-j784s4-r5-evm.dts +++ b/arch/arm/dts/k3-j784s4-r5-evm.dts @@ -26,7 +26,8 @@ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 0>; + clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; + clock-names = "gtc", "core"; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <2000000000>; diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 4dd17ff408c..b0ad1158854 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2023 Collabora Ltd. */ +#include <dt-bindings/usb/pd.h> #include "rk3588-u-boot.dtsi" &fspim2_pins { @@ -10,6 +11,33 @@ bootph-some-ram; }; +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio3>; + interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + status = "okay"; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "sink"; + try-power-role = "sink"; + op-sink-microwatt = <1000000>; + sink-pdos = + <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>, + <PDO_VAR(5000, 20000, 5000)>; + }; + }; +}; + &sdhci { cap-mmc-highspeed; mmc-hs200-1_8v; diff --git a/arch/arm/dts/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/dts/stm32mp135f-dhcor-dhsbc.dts deleted file mode 100644 index fc1c48ad56d..00000000000 --- a/arch/arm/dts/stm32mp135f-dhcor-dhsbc.dts +++ /dev/null @@ -1,383 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2024 Marek Vasut <marex@denx.de> - * - * DHCOR STM32MP13 variant: - * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG - * DHCOR PCB number: 718-100 or newer - * DHSBC PCB number: 719-100 or newer - */ - -/dts-v1/; - -#include <dt-bindings/regulator/st,stm32mp13-regulator.h> -#include "stm32mp135.dtsi" -#include "stm32mp13xf.dtsi" -#include "stm32mp13xx-dhcor-som.dtsi" - -/ { - model = "DH electronics STM32MP135F DHCOR DHSBC"; - compatible = "dh,stm32mp135f-dhcor-dhsbc", - "dh,stm32mp135f-dhcor-som", - "st,stm32mp135"; - - aliases { - ethernet0 = ð1; - ethernet1 = ð2; - serial2 = &usart1; - serial3 = &usart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&adc_1 { - pinctrl-names = "default"; - pinctrl-0 = <&adc1_pins_a &adc1_usb_cc_pins_b>; - vdda-supply = <&vdd_adc>; - vref-supply = <&vdd_adc>; - status = "okay"; - - adc1: adc@0 { - status = "okay"; - - /* - * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in2 & in11. - * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: - * 5 * (5.1 + 47kOhms) * 5pF => 1.3us. - * Use arbitrary margin here (e.g. 5us). - * - * The pinmux pins must be set as ANALOG, use datasheet - * DS13483 Table 7. STM32MP135C/F ball definitions to - * find out which 'pin name' maps to which 'additional - * functions', which lists the mapping between pin and - * ADC channel. In this case, PA5 maps to ADC1_INP2 and - * PF13 maps to ADC1_INP11 . - */ - channel@2 { - reg = <2>; - st,min-sample-time-ns = <5000>; - }; - - channel@11 { - reg = <11>; - st,min-sample-time-ns = <5000>; - }; - - /* Expansion connector: INP12:pin29 */ - channel@12 { - reg = <12>; - st,min-sample-time-ns = <5000>; - }; - }; -}; - -ð1 { - status = "okay"; - pinctrl-0 = <ð1_rgmii_pins_a>; - pinctrl-1 = <ð1_rgmii_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - phy-mode = "rgmii-id"; - phy-handle = <ðphy1>; - st,ext-phyclk; - nvmem-cells = <ðernet_mac1_address>; - nvmem-cell-names = "mac-address"; - - mdio1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - - ethphy1: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916", - "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpiog>; - interrupts = <12 IRQ_TYPE_LEVEL_LOW>; - reg = <1>; - reset-assert-us = <15000>; - reset-deassert-us = <55000>; - reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>; - }; - }; -}; - -ð2 { - status = "okay"; - pinctrl-0 = <ð2_rgmii_pins_a>; - pinctrl-1 = <ð2_rgmii_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - phy-mode = "rgmii-id"; - phy-handle = <ðphy2>; - st,ext-phyclk; - nvmem-cells = <ðernet_mac2_address>; - nvmem-cell-names = "mac-address"; - - mdio1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - - ethphy2: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916", - "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpiog>; - interrupts = <15 IRQ_TYPE_LEVEL_LOW>; - reg = <1>; - reset-assert-us = <15000>; - reset-deassert-us = <55000>; - reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gpioa { - gpio-line-names = "", "", "", "", - "", "DHSBC_USB_PWR_CC1", "", "", - "", "", "", "DHSBC_nETH1_RST", - "", "DHCOR_HW-CODING_0", "", ""; -}; - -&gpiob { - gpio-line-names = "", "", "", "", - "", "", "", "DHCOR_BT_HOST_WAKE", - "", "", "", "", - "", "DHSBC_nTPM_CS", "", ""; -}; - -&gpioc { - gpio-line-names = "", "", "", "DHSBC_USB_5V_MEAS", - "", "", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiod { - gpio-line-names = "", "", "", "", - "", "DHCOR_RAM-CODING_0", "", "", - "", "DHCOR_RAM-CODING_1", "", "", - "", "", "", ""; -}; - -&gpioe { - gpio-line-names = "", "", "", "", - "", "", "", "", - "", "DHSBC_nTPM_RST", "", "", - "DHSBC_nTPM_PIRQ", "", "DHCOR_WL_HOST_WAKE", ""; -}; - -&gpiof { - gpio-line-names = "", "", "DHSBC_USB_PWR_nFLT", "", - "", "", "", "", - "", "", "", "", - "DHCOR_WL_REG_ON", "DHSBC_USB_PWR_CC2", "", ""; -}; - -&gpiog { - gpio-line-names = "", "", "", "", - "", "", "", "", - "DHSBC_nETH2_RST", "DHCOR_BT_DEV_WAKE", "", "", - "DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB"; -}; - -&gpioi { - gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1", - "DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT", - "DHSBC_BOOT0", "DHSBC_BOOT1", - "DHSBC_BOOT2", "DHSBC_USB-C_DATA_VBUS"; -}; - -&i2c1 { /* Expansion connector: SDA:pin27 SCL:pin28 */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c1_pins_a>; - pinctrl-1 = <&i2c1_sleep_pins_a>; - i2c-scl-rising-time-ns = <96>; - i2c-scl-falling-time-ns = <3>; - clock-frequency = <400000>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; -}; - -&i2c5 { /* Expansion connector: SDA:pin3 SCL:pin5 */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c5_pins_b>; - pinctrl-1 = <&i2c5_sleep_pins_b>; - i2c-scl-rising-time-ns = <96>; - i2c-scl-falling-time-ns = <3>; - clock-frequency = <400000>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; -}; - -&m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&m_can1_pins_a>; - pinctrl-1 = <&m_can1_sleep_pins_a>; - status = "okay"; -}; - -&m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&m_can2_pins_a>; - pinctrl-1 = <&m_can2_sleep_pins_a>; - status = "okay"; -}; - -&pwr_regulators { - vdd-supply = <&vdd>; - vdd_3v3_usbfs-supply = <&vdd_usb>; - status = "okay"; -}; - -&sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */ - clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>; - clock-names = "pclk", "x8k", "x11k"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sai1a_pins_a &sai1b_pins_a>; - pinctrl-1 = <&sai1a_sleep_pins_a &sai1b_sleep_pins_a>; -}; - -&scmi_voltd { - status = "disabled"; -}; - -&spi2 { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&spi2_pins_a>; - pinctrl-1 = <&spi2_sleep_pins_a>; - cs-gpios = <&gpiob 13 0>; - status = "okay"; - - st33htph: tpm@0 { - compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; - reg = <0>; - spi-max-frequency = <24000000>; - }; -}; - -&spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&spi3_pins_a>; - pinctrl-1 = <&spi3_sleep_pins_a>; - cs-gpios = <&gpiof 3 0>; - status = "disabled"; -}; - -&timers5 { /* Expansion connector: CH3:pin31 */ - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; - - pwm { - pinctrl-0 = <&pwm5_pins_a>; - pinctrl-1 = <&pwm5_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - status = "okay"; - }; - timer@4 { - status = "okay"; - }; -}; - -&timers13 { /* Expansion connector: CH1:pin32 */ - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; - - pwm { - pinctrl-0 = <&pwm13_pins_a>; - pinctrl-1 = <&pwm13_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - status = "okay"; - }; - timer@12 { - status = "okay"; - }; -}; - -&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */ - pinctrl-names = "default", "sleep", "idle"; - pinctrl-0 = <&usart1_pins_b>; - pinctrl-1 = <&usart1_sleep_pins_b>; - pinctrl-2 = <&usart1_idle_pins_b>; - status = "okay"; -}; - -&usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */ - pinctrl-names = "default", "sleep", "idle"; - pinctrl-0 = <&usart2_pins_b>; - pinctrl-1 = <&usart2_sleep_pins_b>; - pinctrl-2 = <&usart2_idle_pins_b>; - uart-has-rtscts; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbh_ohci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbotg_hs { - dr_mode = "peripheral"; - phys = <&usbphyc_port1 0>; - phy-names = "usb2-phy"; - usb33d-supply = <&usb33>; - status = "okay"; -}; - -&usbphyc { - status = "okay"; - vdda1v1-supply = <®11>; - vdda1v8-supply = <®18>; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; - st,current-boost-microamp = <1000>; - st,decrease-hs-slew-rate; - st,tune-hs-dc-level = <2>; - st,enable-hs-rftime-reduction; - st,trim-hs-current = <11>; - st,trim-hs-impedance = <2>; - st,tune-squelch-level = <1>; - st,enable-hs-rx-gain-eq; - st,no-hs-ftime-ctrl; - st,no-lsfs-sc; - connector { - compatible = "usb-a-connector"; - vbus-supply = <&vbus_sw>; - }; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; - st,current-boost-microamp = <1000>; - st,decrease-hs-slew-rate; - st,tune-hs-dc-level = <2>; - st,enable-hs-rftime-reduction; - st,trim-hs-current = <11>; - st,trim-hs-impedance = <2>; - st,tune-squelch-level = <1>; - st,enable-hs-rx-gain-eq; - st,no-hs-ftime-ctrl; - st,no-lsfs-sc; - connector { - compatible = "gpio-usb-b-connector", "usb-b-connector"; - vbus-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; - label = "Type-C"; - self-powered; - type = "micro"; - }; -}; diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index fe56f05616a..66d4c40c6a8 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -56,6 +56,24 @@ status = "okay"; }; }; + + cpu0_opp_table: cpu0-opp-table { + compatible = "operating-points-v2"; + opp-shared; + bootph-pre-ram; + opp-650000000 { + bootph-pre-ram; + opp-hz = /bits/ 64 <650000000>; + opp-microvolt = <1200000>; + opp-supported-hw = <0x1>; + }; + opp-800000000 { + bootph-pre-ram; + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1350000>; + opp-supported-hw = <0x2>; + }; + }; }; &bsec { @@ -82,14 +100,10 @@ bootph-all; }; -&cpu0_opp_table { - bootph-pre-ram; - opp-650000000 { - bootph-pre-ram; - }; - opp-800000000 { - bootph-pre-ram; - }; +&cpu0 { + nvmem-cells = <&part_number_otp>; + nvmem-cell-names = "part_number"; + operating-points-v2 = <&cpu0_opp_table>; }; &gpioa { diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi b/arch/arm/dts/stm32mp151a-dhcor-testbench-u-boot.dtsi index 31995c058eb..31995c058eb 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi +++ b/arch/arm/dts/stm32mp151a-dhcor-testbench-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02-u-boot.dtsi b/arch/arm/dts/stm32mp153c-dhcom-drc02-u-boot.dtsi index f83cfe90b84..f83cfe90b84 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02-u-boot.dtsi +++ b/arch/arm/dts/stm32mp153c-dhcom-drc02-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp153c-dhcor-drc-compact-u-boot.dtsi index 038c3a92eb1..038c3a92eb1 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi +++ b/arch/arm/dts/stm32mp153c-dhcor-drc-compact-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dhcor-avenger96-u-boot.dtsi index ab4d66c9619..ab4d66c9619 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dhcor-avenger96-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi b/arch/arm/dts/stm32mp157c-dhcom-pdk2-u-boot.dtsi index 2324926f9df..2324926f9df 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-dhcom-pdk2-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi b/arch/arm/dts/stm32mp157c-dhcom-picoitx-u-boot.dtsi index 0bcaec50198..0bcaec50198 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-dhcom-picoitx-u-boot.dtsi diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts deleted file mode 100644 index 90625bf6b60..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ -/dts-v1/; - -#include "stm32mp151.dtsi" -#include "stm32mp15xc.dtsi" -#include "stm32mp15xx-dhcom-som.dtsi" -#include "stm32mp15xx-dhcom-drc02.dtsi" - -/ { - model = "DH Electronics STM32MP15xx DHCOM DRC02"; - compatible = "dh,stm32mp15xx-dhcom-drc02", - "dh,stm32mp15xx-dhcom-som", - "st,stm32mp1xx"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi deleted file mode 100644 index 35b1034aa3c..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi +++ /dev/null @@ -1,169 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -#include <dt-bindings/input/input.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&adc { - status = "disabled"; -}; - -&dac { - status = "disabled"; -}; - -&gpiob { - /* - * NOTE: On DRC02, the RS485_RX_En is controlled by a separate - * GPIO line, however the STM32 UART driver assumes RX happens - * during TX anyway and that it only controls drive enable DE - * line. Hence, the RX is always enabled here. - */ - rs485-rx-en-hog { - gpio-hog; - gpios = <8 0>; - output-low; - line-name = "rs485-rx-en"; - }; -}; - -&gpiod { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-B", "", - "", "", "", "DRC02-Out1", - "DRC02-Out2", "", "", ""; -}; - -&gpioi { - gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I", - "DHCOM-R", "DHCOM-M", "", "", - "DRC02-In2", "", "", "", - "", "", "", ""; - - /* - * NOTE: The USB Hub on the DRC02 needs a reset signal to be - * pulled high in order to be detected by the USB Controller. - * This signal should be handled by USB power sequencing in - * order to reset the Hub when USB bus is powered down, but - * so far there is no such functionality. - */ - usb-hub-hog { - gpio-hog; - gpios = <2 0>; - output-high; - line-name = "usb-hub-reset"; - }; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c04"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -&i2c4 { - touchscreen@49 { - status = "disabled"; - }; -}; - -&i2c5 { /* TP7/TP8 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; -}; - -&sdmmc3 { - /* - * On DRC02, the SoM does not have SDIO WiFi. The pins - * are used for on-board microSD slot instead. - */ - /delete-property/broken-cd; - cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; - disable-wp; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>; - cs-gpios = <&gpioz 3 0>; - /* Use PIO for the display */ - /delete-property/dmas; - /delete-property/dma-names; - status = "disabled"; /* Enable once there is display driver */ - /* - * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are - * also connected to the display board connector. - */ -}; - -&usart3 { - pinctrl-names = "default"; - pinctrl-0 = <&usart3_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -/* - * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1), - * however the STM32MP1 pinmux cannot map them to UART4 . - */ - -&uart8 { /* RS485 */ - linux,rs485-enabled-at-boot-time; - pinctrl-names = "default"; - pinctrl-0 = <&uart8_pins_a>; - rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts deleted file mode 100644 index b2e450aa13b..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2019 Marek Vasut <marex@denx.de> - */ -/dts-v1/; - -#include "stm32mp151.dtsi" -#include "stm32mp15xc.dtsi" -#include "stm32mp15xx-dhcom-som.dtsi" -#include "stm32mp15xx-dhcom-pdk2.dtsi" - -/ { - model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)"; - compatible = "dh,stm32mp15xx-dhcom-pdk2", - "dh,stm32mp15xx-dhcom-som", - "st,stm32mp15x"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi deleted file mode 100644 index 5f586f02406..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi +++ /dev/null @@ -1,329 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> - */ - -#include <dt-bindings/input/input.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - clk_ext_audio_codec: clock-codec { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - }; - - display_bl: display-bl { - compatible = "pwm-backlight"; - pwms = <&pwm2 3 500000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; - default-brightness-level = <8>; - enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>; - power-supply = <®_panel_bl>; - status = "okay"; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - poll-interval = <20>; - - /* - * The EXTi IRQ line 3 is shared with ethernet, - * so mark this as polled GPIO key. - */ - button-0 { - label = "TA1-GPIO-A"; - linux,code = <KEY_A>; - gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; - }; - - /* - * The EXTi IRQ line 6 is shared with touchscreen, - * so mark this as polled GPIO key. - */ - button-1 { - label = "TA2-GPIO-B"; - linux,code = <KEY_B>; - gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; - }; - - /* - * The EXTi IRQ line 0 is shared with PMIC, - * so mark this as polled GPIO key. - */ - button-2 { - label = "TA3-GPIO-C"; - linux,code = <KEY_C>; - gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - button-3 { - label = "TA4-GPIO-D"; - linux,code = <KEY_D>; - gpios = <&gpiod 12 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - }; - - led { - compatible = "gpio-leds"; - - led-0 { - label = "green:led5"; - gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; - default-state = "off"; - status = "disabled"; - }; - - led-1 { - label = "green:led6"; - gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-2 { - label = "green:led7"; - gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-3 { - label = "green:led8"; - gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - panel { - compatible = "edt,etm0700g0edh6"; - backlight = <&display_bl>; - power-supply = <®_panel_bl>; - - port { - lcd_panel_in: endpoint { - remote-endpoint = <&lcd_display_out>; - }; - }; - }; - - reg_panel_bl: regulator-panel-bl { - compatible = "regulator-fixed"; - regulator-name = "panel_backlight"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <®_panel_supply>; - }; - - reg_panel_supply: regulator-panel-supply { - compatible = "regulator-fixed"; - regulator-name = "panel_supply"; - regulator-min-microvolt = <24000000>; - regulator-max-microvolt = <24000000>; - }; - - sound { - compatible = "audio-graph-card"; - routing = - "MIC_IN", "Capture", - "Capture", "Mic Bias", - "Playback", "HP_OUT"; - dais = <&sai2a_port &sai2b_port>; - status = "okay"; - }; -}; - -&cec { - pinctrl-names = "default"; - pinctrl-0 = <&cec_pins_a>; - status = "okay"; -}; - -&i2c2 { /* Header X22 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&i2c5 { /* Header X21 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; - - sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - #sound-dai-cells = <0>; - clocks = <&clk_ext_audio_codec>; - VDDA-supply = <&v3v3>; - VDDIO-supply = <&vdd>; - - sgtl5000_port: port { - #address-cells = <1>; - #size-cells = <0>; - - sgtl5000_tx_endpoint: endpoint@0 { - reg = <0>; - remote-endpoint = <&sai2a_endpoint>; - frame-master = <&sgtl5000_tx_endpoint>; - bitclock-master = <&sgtl5000_tx_endpoint>; - }; - - sgtl5000_rx_endpoint: endpoint@1 { - reg = <1>; - remote-endpoint = <&sai2b_endpoint>; - frame-master = <&sgtl5000_rx_endpoint>; - bitclock-master = <&sgtl5000_rx_endpoint>; - }; - }; - - }; - - touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&gpioc>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ - }; -}; - -<dc { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <<dc_pins_b>; - pinctrl-1 = <<dc_sleep_pins_b>; - status = "okay"; - - port { - lcd_display_out: endpoint { - remote-endpoint = <&lcd_panel_in>; - }; - }; -}; - -&sai2 { - clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>; - clock-names = "pclk", "x8k", "x11k"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sai2a_pins_b &sai2b_pins_b>; - pinctrl-1 = <&sai2a_sleep_pins_b &sai2b_sleep_pins_b>; - status = "okay"; - - sai2a: audio-controller@4400b004 { - #clock-cells = <0>; - dma-names = "tx"; - clocks = <&rcc SAI2_K>; - clock-names = "sai_ck"; - status = "okay"; - - sai2a_port: port { - sai2a_endpoint: endpoint { - remote-endpoint = <&sgtl5000_tx_endpoint>; - format = "i2s"; - mclk-fs = <512>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <16>; - }; - }; - }; - - sai2b: audio-controller@4400b024 { - dma-names = "rx"; - st,sync = <&sai2a 2>; - clocks = <&rcc SAI2_K>, <&sai2a>; - clock-names = "sai_ck", "MCLK"; - status = "okay"; - - sai2b_port: port { - sai2b_endpoint: endpoint { - remote-endpoint = <&sgtl5000_rx_endpoint>; - format = "i2s"; - mclk-fs = <512>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <16>; - }; - }; - }; -}; - -&timers2 { - /* spare dmas for other usage (un-delete to enable pwm capture) */ - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; - pwm2: pwm { - pinctrl-0 = <&pwm2_pins_a>; - pinctrl-names = "default"; - status = "okay"; - }; - timer@1 { - status = "okay"; - }; -}; - -&usart3 { - pinctrl-names = "default"; - pinctrl-0 = <&usart3_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart8 { - pinctrl-names = "default"; - pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; - uart-has-rtscts; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbotg_hs { - dr_mode = "otg"; - pinctrl-0 = <&usbotg_hs_pins_a>; - pinctrl-names = "default"; - phy-names = "usb2-phy"; - phys = <&usbphyc_port1 0>; - vbus-supply = <&vbus_otg>; - status = "okay"; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts deleted file mode 100644 index 3e908102f61..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ -/dts-v1/; - -#include "stm32mp157.dtsi" -#include "stm32mp15xc.dtsi" -#include "stm32mp15xx-dhcom-som.dtsi" -#include "stm32mp15xx-dhcom-picoitx.dtsi" - -/ { - model = "DH Electronics STM32MP15xx DHCOM PicoITX"; - compatible = "dh,stm32mp15xx-dhcom-picoitx", - "dh,stm32mp15xx-dhcom-som", - "st,stm32mp1xx"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi deleted file mode 100644 index abc595350e7..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi +++ /dev/null @@ -1,151 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -#include <dt-bindings/input/input.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - led { - compatible = "gpio-leds"; - - led-0 { - label = "yellow:led"; - gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; -}; - -&adc { - status = "disabled"; -}; - -&dac { - status = "disabled"; -}; - -&fmc { - status = "disabled"; -}; - -&gpioa { - /* - * NOTE: The USB Port on the PicoITX needs a PWR_EN signal to enable - * port power. This signal should be handled by USB power sequencing - * in order to turn on port power when USB bus is powered up, but so - * far there is no such functionality. - */ - usb-port-power-hog { - gpio-hog; - gpios = <13 0>; - output-low; - line-name = "usb-port-power"; - }; -}; - -&gpioc { - gpio-line-names = "", "", "", "", - "", "", "PicoITX-In1", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiod { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-B", "", - "", "", "", "PicoITX-Out1", - "PicoITX-Out2", "", "", ""; -}; - -&gpiog { - gpio-line-names = "PicoITX-In2", "", "", "", - "", "", "", "", - "DHCOM-L", "", "", "", - "", "", "", ""; -}; - -&i2c2 { /* On board-to-board connector (optional) */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; -}; - -&i2c5 { /* On board-to-board connector */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; -}; - -&ksz8851 { - status = "disabled"; -}; - -&usart3 { - pinctrl-names = "default"; - pinctrl-0 = <&usart3_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart8 { - pinctrl-names = "default"; - pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbh_ohci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbotg_hs { - dr_mode = "otg"; - pinctrl-0 = <&usbotg_hs_pins_a>; - pinctrl-names = "default"; - phy-names = "usb2-phy"; - phys = <&usbphyc_port1 0>; - vbus-supply = <&vbus_otg>; - status = "okay"; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi deleted file mode 100644 index d3b85a8764d..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi +++ /dev/null @@ -1,544 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> - */ - -#include "stm32mp15-pinctrl.dtsi" -#include "stm32mp15xxaa-pinctrl.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/mfd/st,stpmic1.h> - -/ { - aliases { - ethernet0 = ðernet0; - ethernet1 = &ksz8851; - rtc0 = &hwrtc; - rtc1 = &rtc; - }; - - memory@c0000000 { - device_type = "memory"; - reg = <0xC0000000 0x40000000>; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mcuram2: mcuram2@10000000 { - compatible = "shared-dma-pool"; - reg = <0x10000000 0x40000>; - no-map; - }; - - vdev0vring0: vdev0vring0@10040000 { - compatible = "shared-dma-pool"; - reg = <0x10040000 0x1000>; - no-map; - }; - - vdev0vring1: vdev0vring1@10041000 { - compatible = "shared-dma-pool"; - reg = <0x10041000 0x1000>; - no-map; - }; - - vdev0buffer: vdev0buffer@10042000 { - compatible = "shared-dma-pool"; - reg = <0x10042000 0x4000>; - no-map; - }; - - mcuram: mcuram@30000000 { - compatible = "shared-dma-pool"; - reg = <0x30000000 0x40000>; - no-map; - }; - - retram: retram@38000000 { - compatible = "shared-dma-pool"; - reg = <0x38000000 0x10000>; - no-map; - }; - }; - - ethernet_vio: vioregulator { - compatible = "regulator-fixed"; - regulator-name = "vio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd>; - }; -}; - -&adc { - vdd-supply = <&vdd>; - vdda-supply = <&vdda>; - vref-supply = <&vdda>; - status = "okay"; - - adc1: adc@0 { - st,min-sample-time-nsecs = <5000>; - st,adc-channels = <0>; - status = "okay"; - }; - - adc2: adc@100 { - st,adc-channels = <1>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; -}; - -&crc1 { - status = "okay"; -}; - -&dac { - pinctrl-names = "default"; - pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; - vref-supply = <&vdda>; - status = "okay"; - - dac1: dac@1 { - status = "okay"; - }; - dac2: dac@2 { - status = "okay"; - }; -}; - -&dts { - status = "okay"; -}; - -ðernet0 { - status = "okay"; - pinctrl-0 = <ðernet0_rmii_pins_c &mco2_pins_a>; - pinctrl-1 = <ðernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - phy-mode = "rmii"; - max-speed = <100>; - phy-handle = <&phy0>; - - mdio0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - - phy0: ethernet-phy@1 { - reg = <1>; - /* LAN8710Ai */ - compatible = "ethernet-phy-id0007.c0f0", - "ethernet-phy-ieee802.3-c22"; - clocks = <&rcc CK_MCO2>; - reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; - reset-assert-us = <500>; - reset-deassert-us = <500>; - smsc,disable-energy-detect; - interrupt-parent = <&gpioi>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&fmc { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&fmc_pins_b>; - pinctrl-1 = <&fmc_sleep_pins_b>; - status = "okay"; - - ksz8851: ethernet@1,0 { - compatible = "micrel,ks8851-mll"; - reg = <1 0x0 0x2>, <1 0x2 0x20000>; - interrupt-parent = <&gpioc>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - bank-width = <2>; - - /* Timing values are in nS */ - st,fmc2-ebi-cs-mux-enable; - st,fmc2-ebi-cs-transaction-type = <4>; - st,fmc2-ebi-cs-buswidth = <16>; - st,fmc2-ebi-cs-address-setup-ns = <5>; - st,fmc2-ebi-cs-address-hold-ns = <5>; - st,fmc2-ebi-cs-bus-turnaround-ns = <5>; - st,fmc2-ebi-cs-data-setup-ns = <45>; - st,fmc2-ebi-cs-data-hold-ns = <1>; - st,fmc2-ebi-cs-write-address-setup-ns = <5>; - st,fmc2-ebi-cs-write-address-hold-ns = <5>; - st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; - st,fmc2-ebi-cs-write-data-setup-ns = <45>; - st,fmc2-ebi-cs-write-data-hold-ns = <1>; - }; -}; - -&gpioa { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-K", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiob { - gpio-line-names = "", "", "", "", - "", "", "", "", - "DHCOM-Q", "", "", "", - "", "", "", ""; -}; - -&gpioc { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-E", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiod { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-B", "", - "", "", "", "DHCOM-F", - "DHCOM-D", "", "", ""; -}; - -&gpioe { - gpio-line-names = "", "", "", "", - "", "", "DHCOM-P", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiof { - gpio-line-names = "", "", "", "DHCOM-A", - "", "", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiog { - gpio-line-names = "DHCOM-C", "", "", "", - "", "", "", "", - "DHCOM-L", "", "", "", - "", "", "", ""; -}; - -&gpioh { - gpio-line-names = "", "", "", "", - "", "", "", "DHCOM-N", - "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U", - "DHCOM-T", "", "DHCOM-S", ""; -}; - -&gpioi { - gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I", - "DHCOM-R", "DHCOM-M", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /* spare dmas for other usage */ - /delete-property/dmas; - /delete-property/dma-names; - - hwrtc: rtc@32 { - compatible = "microcrystal,rv8803"; - reg = <0x32>; - }; - - pmic: stpmic@33 { - compatible = "st,stpmic1"; - reg = <0x33>; - interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - status = "okay"; - - regulators { - compatible = "st,stpmic1-regulators"; - ldo1-supply = <&v3v3>; - ldo2-supply = <&v3v3>; - ldo3-supply = <&vdd_ddr>; - ldo5-supply = <&v3v3>; - ldo6-supply = <&v3v3>; - pwr_sw1-supply = <&bst_out>; - pwr_sw2-supply = <&bst_out>; - - vddcore: buck1 { - regulator-name = "vddcore"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - vdd_ddr: buck2 { - regulator-name = "vdd_ddr"; - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - vdd: buck3 { - regulator-name = "vdd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - st,mask-reset; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - v3v3: buck4 { - regulator-name = "v3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-over-current-protection; - regulator-initial-mode = <0>; - }; - - vdda: ldo1 { - regulator-name = "vdda"; - regulator-always-on; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - interrupts = <IT_CURLIM_LDO1 0>; - }; - - v2v8: ldo2 { - regulator-name = "v2v8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - interrupts = <IT_CURLIM_LDO2 0>; - }; - - vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <750000>; - regulator-always-on; - regulator-over-current-protection; - }; - - vdd_usb: ldo4 { - regulator-name = "vdd_usb"; - interrupts = <IT_CURLIM_LDO4 0>; - }; - - vdd_sd: ldo5 { - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - interrupts = <IT_CURLIM_LDO5 0>; - regulator-boot-on; - }; - - v1v8: ldo6 { - regulator-name = "v1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - interrupts = <IT_CURLIM_LDO6 0>; - }; - - vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; - regulator-always-on; - }; - - bst_out: boost { - regulator-name = "bst_out"; - interrupts = <IT_OCP_BOOST 0>; - }; - - vbus_otg: pwr_sw1 { - regulator-name = "vbus_otg"; - interrupts = <IT_OCP_OTG 0>; - }; - - vbus_sw: pwr_sw2 { - regulator-name = "vbus_sw"; - interrupts = <IT_OCP_SWOUT 0>; - regulator-active-discharge = <1>; - }; - }; - - onkey { - compatible = "st,stpmic1-onkey"; - interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; - interrupt-names = "onkey-falling", "onkey-rising"; - power-off-time-sec = <10>; - status = "okay"; - }; - - watchdog { - compatible = "st,stpmic1-wdt"; - status = "disabled"; - }; - }; - - touchscreen@49 { - compatible = "ti,tsc2004"; - reg = <0x49>; - vio-supply = <&v3v3>; - interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>; - }; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -&ipcc { - status = "okay"; -}; - -&iwdg2 { - timeout-sec = <32>; - status = "okay"; -}; - -&m4_rproc { - memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, - <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; - interrupt-parent = <&exti>; - interrupts = <68 1>; - status = "okay"; -}; - -&pwr_regulators { - vdd-supply = <&vdd>; - vdd_3v3_usbfs-supply = <&vdd_usb>; -}; - -&qspi { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&qspi_clk_pins_a - &qspi_bk1_pins_a - &qspi_cs1_pins_a>; - pinctrl-1 = <&qspi_clk_sleep_pins_a - &qspi_bk1_sleep_pins_a - &qspi_cs1_sleep_pins_a>; - reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - flash0: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-rx-bus-width = <4>; - spi-max-frequency = <108000000>; - #address-cells = <1>; - #size-cells = <1>; - }; -}; - -&rcc { - /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */ - clocks = <&rcc CK_MCO2>; - clock-names = "ETH_RX_CLK/ETH_REF_CLK"; - - /* - * Set PLL4P output to 100 MHz to supply SDMMC with faster clock, - * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2, - * so that MCO2 behaves as a divider for the ETHRX clock here. - */ - assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>; - assigned-clock-parents = <&rcc PLL4_P>; - assigned-clock-rates = <50000000>, <100000000>; -}; - -&rng1 { - status = "okay"; -}; - -&rtc { - status = "okay"; -}; - -&sdmmc1 { - pinctrl-names = "default", "opendrain", "sleep", "init"; - pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; - pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; - pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>; - cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - disable-wp; - st,sig-dir; - st,neg-edge; - st,use-ckin; - st,cmd-gpios = <&gpiod 2 0>; - st,ck-gpios = <&gpioc 12 0>; - st,ckin-gpios = <&gpioe 4 0>; - bus-width = <4>; - vmmc-supply = <&vdd_sd>; - status = "okay"; -}; - -&sdmmc1_b4_pins_a { - /* - * SD bus pull-up resistors: - * - optional on SoMs with SD voltage translator - * - mandatory on SoMs without SD voltage translator - */ - pins1 { - bias-pull-up; - }; - pins2 { - bias-pull-up; - }; -}; - -&sdmmc2 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; - non-removable; - no-sd; - no-sdio; - st,neg-edge; - bus-width = <8>; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&v3v3>; - mmc-ddr-3_3v; - status = "okay"; -}; - -&sdmmc3 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc3_b4_pins_a>; - pinctrl-1 = <&sdmmc3_b4_od_pins_a>; - pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; - broken-cd; - st,neg-edge; - bus-width = <4>; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&v3v3>; - mmc-ddr-3_3v; - status = "okay"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index d7b78cdcfa9..dd67e960a64 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -8,6 +8,7 @@ #include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi" #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi" #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi" +#include "stm32mp15xx-dhsom-u-boot.dtsi" / { aliases { diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts deleted file mode 100644 index dd8fcecbca5..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -/dts-v1/; - -#include "stm32mp151.dtsi" -#include "stm32mp15xc.dtsi" -#include "stm32mp15xx-dhcor-som.dtsi" -#include "stm32mp15xx-dhcor-avenger96.dtsi" - -/ { - model = "Arrow Electronics STM32MP15xx Avenger96 board"; - compatible = "arrow,stm32mp15xx-avenger96", - "dh,stm32mp15xx-dhcor-som", - "st,stm32mp15x"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dtsi deleted file mode 100644 index 61e17f44ce8..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dtsi +++ /dev/null @@ -1,437 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */ -#include "stm32mp15xx-dhcor-io1v8.dtsi" - -/ { - aliases { - ethernet0 = ðernet0; - mmc0 = &sdmmc1; - serial0 = &uart4; - serial1 = &uart7; - serial2 = &usart2; - spi0 = &qspi; - }; - - /* XTal Q1 */ - cec_clock: clk-cec-fixed { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7513_out>; - }; - }; - }; - - led { - compatible = "gpio-leds"; - led1 { - label = "green:user0"; - gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - default-state = "off"; - }; - - led2 { - label = "green:user1"; - gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - default-state = "off"; - }; - - led3 { - label = "green:user2"; - gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc1"; - default-state = "off"; - }; - - led4 { - label = "green:user3"; - gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "none"; - default-state = "off"; - panic-indicator; - }; - }; - - sd_switch: regulator-sd_switch { - compatible = "regulator-gpio"; - regulator-name = "sd_switch"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2900000>; - regulator-type = "voltage"; - regulator-always-on; - - gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>; - gpios-states = <0>; - states = <1800000 0x1>, - <2900000 0x0>; - }; - - sound { - compatible = "audio-graph-card"; - label = "STM32MP1-AV96-HDMI"; - dais = <&sai2a_port>; - status = "okay"; - }; - - wlan_pwr: regulator-wlan { - compatible = "regulator-fixed"; - - regulator-name = "wl-reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&adc { - pinctrl-names = "default"; - pinctrl-0 = <&adc12_ain_pins_b>; - vdd-supply = <&vdd>; - vdda-supply = <&vdda>; - vref-supply = <&vdda>; - status = "okay"; - - adc1: adc@0 { - st,adc-channels = <0 1 6>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; - - adc2: adc@100 { - st,adc-channels = <0 1 2>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; -}; - -ðernet0 { - status = "okay"; - pinctrl-0 = <ðernet0_rgmii_pins_c>; - pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; - pinctrl-names = "default", "sleep"; - phy-mode = "rgmii"; - max-speed = <1000>; - phy-handle = <&phy0>; - - mdio0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; - reset-delay-us = <1000>; - - phy0: ethernet-phy@7 { - reg = <7>; - - rxc-skew-ps = <1500>; - rxdv-skew-ps = <540>; - rxd0-skew-ps = <420>; - rxd1-skew-ps = <420>; - rxd2-skew-ps = <420>; - rxd3-skew-ps = <420>; - - txc-skew-ps = <1440>; - txen-skew-ps = <540>; - txd0-skew-ps = <420>; - txd1-skew-ps = <420>; - txd2-skew-ps = <420>; - txd3-skew-ps = <420>; - }; - }; -}; - -&gpioa { - gpio-line-names = "", "", "", "", - "", "", "", "", - "", "", "", "AV96-K", - "AV96-I", "", "AV96-A", ""; -}; - -&gpiob { - gpio-line-names = "", "", "", "", - "", "AV96-J", "", "", - "", "", "", "AV96-B", - "", "AV96-L", "", ""; -}; - -&gpioc { - gpio-line-names = "", "", "", "AV96-C", - "", "", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiod { - gpio-line-names = "", "", "", "", - "", "", "", "", - "AV96-D", "", "", "", - "", "", "AV96-E", "AV96-F"; -}; - -&gpiof { - gpio-line-names = "", "", "", "", - "", "", "", "", - "", "", "", "", - "AV96-G", "AV96-H", "", ""; -}; - -&i2c1 { /* X6 I2C1 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_b>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /delete-property/dmas; - /delete-property/dma-names; -}; - -&i2c2 { /* X6 I2C2 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_c>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /delete-property/dmas; - /delete-property/dma-names; -}; - -&i2c4 { - hdmi-transmitter@3d { - compatible = "adi,adv7513"; - reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>; - reg-names = "main", "edid", "cec", "packet"; - clocks = <&cec_clock>; - clock-names = "cec"; - - avdd-supply = <&v3v3>; - dvdd-supply = <&v3v3>; - pvdd-supply = <&v3v3>; - dvdd-3v-supply = <&v3v3>; - bgvdd-supply = <&v3v3>; - - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; - interrupt-parent = <&gpiog>; - - status = "okay"; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7513_in: endpoint { - remote-endpoint = <<dc_ep0_out>; - }; - }; - - port@1 { - reg = <1>; - adv7513_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - - port@2 { - reg = <2>; - adv7513_i2s0: endpoint { - remote-endpoint = <&sai2a_endpoint>; - }; - }; - }; - }; -}; - -<dc { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <<dc_pins_d>; - pinctrl-1 = <<dc_sleep_pins_d>; - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - ltdc_ep0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&adv7513_in>; - }; - }; -}; - -&sai2 { - clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sai2a_pins_c>; - pinctrl-1 = <&sai2a_sleep_pins_c>; - clock-names = "pclk", "x8k", "x11k"; - status = "okay"; - - sai2a: audio-controller@4400b004 { - #clock-cells = <0>; - dma-names = "tx"; - clocks = <&rcc SAI2_K>; - clock-names = "sai_ck"; - status = "okay"; - - sai2a_port: port { - sai2a_endpoint: endpoint { - remote-endpoint = <&adv7513_i2s0>; - format = "i2s"; - mclk-fs = <256>; - }; - }; - }; -}; - -&sdmmc1 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>; - pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>; - cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - disable-wp; - st,sig-dir; - st,neg-edge; - st,use-ckin; - bus-width = <4>; - vmmc-supply = <&vdd_sd>; - vqmmc-supply = <&sd_switch>; - status = "okay"; -}; - -&sdmmc2 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; - bus-width = <8>; - mmc-ddr-1_8v; - no-sd; - no-sdio; - non-removable; - st,neg-edge; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&vdd_io>; - status = "okay"; -}; - -&sdmmc3 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc3_b4_pins_b>; - pinctrl-1 = <&sdmmc3_b4_od_pins_b>; - pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>; - broken-cd; - non-removable; - st,neg-edge; - bus-width = <4>; - vmmc-supply = <&wlan_pwr>; - status = "okay"; - - #address-cells = <1>; - #size-cells = <0>; - brcmf: bcrmf@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - }; -}; - -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_a>; - cs-gpios = <&gpioi 0 0>; - status = "disabled"; - /delete-property/dmas; - /delete-property/dma-names; -}; - -&uart4 { - /* On Low speed expansion header */ - label = "LS-UART1"; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_b>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart7 { - /* On Low speed expansion header */ - label = "LS-UART0"; - pinctrl-names = "default"; - pinctrl-0 = <&uart7_pins_a>; - uart-has-rtscts; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -/* Bluetooth */ -&usart2 { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&usart2_pins_a>; - pinctrl-1 = <&usart2_sleep_pins_a>; - st,hw-flow-ctrl; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; - shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; - }; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; - status = "okay"; -}; - -&usbotg_hs { - pinctrl-0 = <&usbotg_hs_pins_a>; - pinctrl-names = "default"; - phy-names = "usb2-phy"; - phys = <&usbphyc_port1 0>; - status = "okay"; - vbus-supply = <&vbus_otg>; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts deleted file mode 100644 index c1f99c1685e..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) 2022 Marek Vasut <marex@denx.de> - */ - -/dts-v1/; - -#include "stm32mp151.dtsi" -#include "stm32mp15xc.dtsi" -#include "stm32mp15xx-dhcor-som.dtsi" -#include "stm32mp15xx-dhcor-drc-compact.dtsi" - -/ { - model = "DH electronics STM32MP15xx DHCOR DRC Compact"; - compatible = "dh,stm32mp15xx-dhcor-drc-compact", - "dh,stm32mp15xx-dhcor-som", - "st,stm32mp1xx"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi deleted file mode 100644 index bedccf0f00a..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi +++ /dev/null @@ -1,326 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) 2022 Marek Vasut <marex@denx.de> - */ - -/ { - aliases { - ethernet0 = ðernet0; - ethernet1 = &ksz8851; - mmc0 = &sdmmc1; - rtc0 = &hwrtc; - rtc1 = &rtc; - serial0 = &uart4; - serial1 = &uart8; - serial2 = &usart3; - serial3 = &uart5; - spi0 = &qspi; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - led { - compatible = "gpio-leds"; - led1 { - label = "yellow:user0"; - gpios = <&gpioz 6 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - led2 { - label = "red:user1"; - gpios = <&gpioz 3 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - }; - - ethernet_vio: vioregulator { - compatible = "regulator-fixed"; - regulator-name = "vio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpioh 2 GPIO_ACTIVE_LOW>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd>; - }; -}; - -&adc { /* X11 ADC inputs */ - pinctrl-names = "default"; - pinctrl-0 = <&adc12_ain_pins_b>; - vdd-supply = <&vdd>; - vdda-supply = <&vdda>; - vref-supply = <&vdda>; - status = "okay"; - - adc1: adc@0 { - st,adc-channels = <0 1 6>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; - - adc2: adc@100 { - st,adc-channels = <0 1 2>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; -}; - -ðernet0 { - status = "okay"; - pinctrl-0 = <ðernet0_rgmii_pins_c>; - pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; - pinctrl-names = "default", "sleep"; - phy-mode = "rgmii"; - max-speed = <1000>; - phy-handle = <&phy0>; - - mdio0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; - reset-delay-us = <1000>; - reset-post-delay-us = <1000>; - - phy0: ethernet-phy@7 { - reg = <7>; - - rxc-skew-ps = <1500>; - rxdv-skew-ps = <540>; - rxd0-skew-ps = <420>; - rxd1-skew-ps = <420>; - rxd2-skew-ps = <420>; - rxd3-skew-ps = <420>; - - txc-skew-ps = <1440>; - txen-skew-ps = <540>; - txd0-skew-ps = <420>; - txd1-skew-ps = <420>; - txd2-skew-ps = <420>; - txd3-skew-ps = <420>; - }; - }; -}; - -&fmc { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&fmc_pins_b>; - pinctrl-1 = <&fmc_sleep_pins_b>; - status = "okay"; - - ksz8851: ethernet@1,0 { - compatible = "micrel,ks8851-mll"; - reg = <1 0x0 0x2>, <1 0x2 0x20000>; - interrupt-parent = <&gpioc>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - bank-width = <2>; - - /* Timing values are in nS */ - st,fmc2-ebi-cs-mux-enable; - st,fmc2-ebi-cs-transaction-type = <4>; - st,fmc2-ebi-cs-buswidth = <16>; - st,fmc2-ebi-cs-address-setup-ns = <5>; - st,fmc2-ebi-cs-address-hold-ns = <5>; - st,fmc2-ebi-cs-bus-turnaround-ns = <5>; - st,fmc2-ebi-cs-data-setup-ns = <45>; - st,fmc2-ebi-cs-data-hold-ns = <1>; - st,fmc2-ebi-cs-write-address-setup-ns = <5>; - st,fmc2-ebi-cs-write-address-hold-ns = <5>; - st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; - st,fmc2-ebi-cs-write-data-setup-ns = <45>; - st,fmc2-ebi-cs-write-data-hold-ns = <1>; - }; -}; - -&gpioa { - gpio-line-names = "", "", "", "", - "DRCC-VAR2", "", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpioe { - gpio-line-names = "", "", "", "", - "", "DRCC-GPIO0", "", "", - "", "", "", "", - "", "", "", ""; -}; - -&gpiog { - gpio-line-names = "", "", "", "", - "", "", "", "", - "", "", "", "", - "DRCC-GPIO5", "", "", ""; -}; - -&gpioh { - gpio-line-names = "", "", "", "DRCC-HW2", - "DRCC-GPIO4", "", "", "", - "DRCC-HW1", "DRCC-HW0", "", "DRCC-VAR1", - "DRCC-VAR0", "", "", "DRCC-GPIO6"; -}; - -&gpioi { - gpio-line-names = "", "", "", "", - "", "", "", "DRCC-GPIO2", - "", "DRCC-GPIO1", "", "", - "", "", "", ""; -}; - -&i2c1 { /* X11 I2C1 */ - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_b>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /delete-property/dmas; - /delete-property/dma-names; -}; - -&i2c4 { - hwrtc: rtc@32 { - compatible = "microcrystal,rv8803"; - reg = <0x32>; - }; - - eeprom@50 { - compatible = "atmel,24c04"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -&sdmmc1 { /* MicroSD */ - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc1_b4_pins_a>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a>; - pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; - cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - disable-wp; - st,neg-edge; - bus-width = <4>; - vmmc-supply = <&vdd>; - vqmmc-supply = <&vdd>; - status = "okay"; -}; - -&sdmmc2 { /* eMMC */ - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; - bus-width = <8>; - no-sd; - no-sdio; - non-removable; - st,neg-edge; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&vdd>; - status = "okay"; -}; - -&sdmmc3 { /* SDIO Wi-Fi */ - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc3_b4_pins_a>; - pinctrl-1 = <&sdmmc3_b4_od_pins_a>; - pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; - broken-cd; - bus-width = <4>; - mmc-ddr-3_3v; - st,neg-edge; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&v3v3>; - status = "okay"; -}; - -&spi2 { /* X11 SPI */ - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_b>; - cs-gpios = <&gpioi 0 0>; - status = "disabled"; - /delete-property/dmas; - /delete-property/dma-names; -}; - -&uart4 { - label = "UART0"; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_d>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart5 { /* X11 UART */ - label = "X11-UART5"; - pinctrl-names = "default"; - pinctrl-0 = <&uart5_pins_a>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart8 { - label = "RS485-1"; - pinctrl-names = "default"; - pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; - uart-has-rtscts; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usart3 { /* RS485 or RS232 */ - label = "RS485-2"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&usart3_pins_e>; - pinctrl-1 = <&usart3_sleep_pins_e>; - uart-has-rtscts; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbh_ohci { - phys = <&usbphyc_port0>; - status = "okay"; -}; - -&usbotg_hs { - dr_mode = "otg"; - pinctrl-0 = <&usbotg_hs_pins_a>; - pinctrl-names = "default"; - phy-names = "usb2-phy"; - phys = <&usbphyc_port1 0>; - vbus-supply = <&vbus_otg>; - status = "okay"; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; - vdda1v1-supply = <®11>; - vdda1v8-supply = <®18>; - connector { - compatible = "usb-a-connector"; - vbus-supply = <&vbus_sw>; - }; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; - vdda1v1-supply = <®11>; - vdda1v8-supply = <®18>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi deleted file mode 100644 index e20917824bf..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi +++ /dev/null @@ -1,28 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -/ { - /* Enpirion EP3A8LQI U2 on the DHCOR */ - vdd_io: regulator-buck-io { - compatible = "regulator-fixed"; - regulator-name = "buck-io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd>; - }; -}; - -&vdd { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2900000>; -}; - -&pwr_regulators { - vdd-supply = <&vdd_io>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-som.dtsi deleted file mode 100644 index f36eec1b4ac..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-som.dtsi +++ /dev/null @@ -1,221 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - * Copyright (C) 2020 Marek Vasut <marex@denx.de> - */ - -#include "stm32mp15-pinctrl.dtsi" -#include "stm32mp15xxac-pinctrl.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/mfd/st,stpmic1.h> - -/ { - aliases { - spi0 = &qspi; - }; - - memory@c0000000 { - device_type = "memory"; - reg = <0xc0000000 0x40000000>; - }; -}; - -&crc1 { - status = "okay"; -}; - -&dts { - status = "okay"; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_pins_a>; - i2c-scl-rising-time-ns = <185>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - /delete-property/dmas; - /delete-property/dma-names; - - pmic: stpmic@33 { - compatible = "st,stpmic1"; - reg = <0x33>; - interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - status = "okay"; - - regulators { - compatible = "st,stpmic1-regulators"; - - ldo1-supply = <&v3v3>; - ldo2-supply = <&v3v3>; - ldo3-supply = <&vdd_ddr>; - ldo5-supply = <&v3v3>; - ldo6-supply = <&v3v3>; - pwr_sw1-supply = <&bst_out>; - pwr_sw2-supply = <&bst_out>; - - vddcore: buck1 { - regulator-name = "vddcore"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - vdd_ddr: buck2 { - regulator-name = "vdd_ddr"; - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - vdd: buck3 { - regulator-name = "vdd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-initial-mode = <0>; - regulator-over-current-protection; - }; - - v3v3: buck4 { - regulator-name = "v3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-over-current-protection; - regulator-initial-mode = <0>; - }; - - vdda: ldo1 { - regulator-name = "vdda"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - interrupts = <IT_CURLIM_LDO1 0>; - }; - - v2v8: ldo2 { - regulator-name = "v2v8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - interrupts = <IT_CURLIM_LDO2 0>; - }; - - vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <750000>; - regulator-always-on; - regulator-over-current-protection; - }; - - vdd_usb: ldo4 { - regulator-name = "vdd_usb"; - interrupts = <IT_CURLIM_LDO4 0>; - }; - - vdd_sd: ldo5 { - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - interrupts = <IT_CURLIM_LDO5 0>; - regulator-boot-on; - }; - - v1v8: ldo6 { - regulator-name = "v1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - interrupts = <IT_CURLIM_LDO6 0>; - regulator-enable-ramp-delay = <300000>; - }; - - vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; - regulator-always-on; - }; - - bst_out: boost { - regulator-name = "bst_out"; - interrupts = <IT_OCP_BOOST 0>; - }; - - vbus_otg: pwr_sw1 { - regulator-name = "vbus_otg"; - interrupts = <IT_OCP_OTG 0>; - regulator-active-discharge = <1>; - }; - - vbus_sw: pwr_sw2 { - regulator-name = "vbus_sw"; - interrupts = <IT_OCP_SWOUT 0>; - regulator-active-discharge = <1>; - }; - }; - - onkey { - compatible = "st,stpmic1-onkey"; - interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; - interrupt-names = "onkey-falling", "onkey-rising"; - status = "okay"; - }; - - watchdog { - compatible = "st,stpmic1-wdt"; - status = "disabled"; - }; - }; - - eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; -}; - -&iwdg2 { - timeout-sec = <32>; - status = "okay"; -}; - -&pwr_regulators { - vdd-supply = <&vdd>; - vdd_3v3_usbfs-supply = <&vdd_usb>; -}; - -&qspi { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&qspi_clk_pins_a - &qspi_bk1_pins_a - &qspi_cs1_pins_a>; - pinctrl-1 = <&qspi_clk_sleep_pins_a - &qspi_bk1_sleep_pins_a - &qspi_cs1_sleep_pins_a>; - reg = <0x58003000 0x1000>, <0x70000000 0x200000>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - flash0: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-rx-bus-width = <4>; - spi-max-frequency = <50000000>; - #address-cells = <1>; - #size-cells = <1>; - }; -}; - -&rng1 { - status = "okay"; -}; - -&rtc { - status = "okay"; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts deleted file mode 100644 index 5fdd762ddbf..00000000000 --- a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts +++ /dev/null @@ -1,180 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) -/* - * Copyright (C) 2022 Marek Vasut <marex@denx.de> - */ -/dts-v1/; - -#include "stm32mp151.dtsi" -#include "stm32mp15xx-dhcor-som.dtsi" - -/ { - model = "DH electronics STM32MP15xx DHCOR Testbench"; - compatible = "dh,stm32mp15xx-dhcor-testbench", - "dh,stm32mp15xx-dhcor-som", - "st,stm32mp1xx"; - - aliases { - ethernet0 = ðernet0; - mmc0 = &sdmmc1; - mmc1 = &sdmmc2; - serial0 = &uart4; - serial1 = &uart7; - spi0 = &qspi; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - sd_switch: regulator-sd_switch { - compatible = "regulator-gpio"; - regulator-name = "sd_switch"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2900000>; - regulator-type = "voltage"; - regulator-always-on; - - gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>; - gpios-states = <0>; - states = <1800000 0x1>, - <2900000 0x0>; - }; -}; - -&adc { - pinctrl-names = "default"; - pinctrl-0 = <&adc12_ain_pins_b>; - vdd-supply = <&vdd>; - vdda-supply = <&vdda>; - vref-supply = <&vdda>; - status = "okay"; - - adc1: adc@0 { - st,adc-channels = <0 1 6>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; - - adc2: adc@100 { - st,adc-channels = <0 1 2>; - st,min-sample-time-nsecs = <5000>; - status = "okay"; - }; -}; - -ðernet0 { - status = "okay"; - pinctrl-0 = <ðernet0_rgmii_pins_c>; - pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; - pinctrl-names = "default", "sleep"; - phy-mode = "rgmii"; - max-speed = <1000>; - phy-handle = <&phy0>; - - mdio0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; - reset-delay-us = <1000>; - - phy0: ethernet-phy@7 { - reg = <7>; - - rxc-skew-ps = <1500>; - rxdv-skew-ps = <540>; - rxd0-skew-ps = <420>; - rxd1-skew-ps = <420>; - rxd2-skew-ps = <420>; - rxd3-skew-ps = <420>; - - txc-skew-ps = <1440>; - txen-skew-ps = <540>; - txd0-skew-ps = <420>; - txd1-skew-ps = <420>; - txd2-skew-ps = <420>; - txd3-skew-ps = <420>; - }; - }; -}; - -&sdmmc1 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>; - pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>; - cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - disable-wp; - st,sig-dir; - st,neg-edge; - st,use-ckin; - bus-width = <4>; - vmmc-supply = <&vdd_sd>; - vqmmc-supply = <&sd_switch>; - status = "okay"; -}; - -&sdmmc2 { - pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; - bus-width = <8>; - mmc-ddr-1_8v; - no-sd; - no-sdio; - non-removable; - st,neg-edge; - vmmc-supply = <&v3v3>; - vqmmc-supply = <&v3v3>; - status = "okay"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_b>; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&uart7 { - pinctrl-names = "default"; - pinctrl-0 = <&uart7_pins_a>; - uart-has-rtscts; - /delete-property/dmas; - /delete-property/dma-names; - status = "okay"; -}; - -&usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; - status = "okay"; -}; - -&usbotg_hs { - pinctrl-0 = <&usbotg_hs_pins_a>; - pinctrl-names = "default"; - phy-names = "usb2-phy"; - phys = <&usbphyc_port1 0>; - status = "okay"; - vbus-supply = <&vbus_otg>; -}; - -&usbphyc { - status = "okay"; -}; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; - -&vdd { - /delete-property/ regulator-always-on; - regulator-min-microvolt = <1200000>; -}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index ba84db679e1..08439342cb2 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -12,6 +12,7 @@ #include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi" #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi" #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi" +#include "stm32mp15xx-dhsom-u-boot.dtsi" / { bootph-all; diff --git a/arch/arm/dts/stm32mp15xx-dhsom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhsom-u-boot.dtsi new file mode 100644 index 00000000000..386c605c07f --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhsom-u-boot.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2024 Marek Vasut <marex@denx.de> + */ + +&binman { + u-boot { + filename = "u-boot.itb"; + + fit { + description = "U-Boot mainline"; + fit,fdt-list = "of-list"; + #address-cells = <1>; + + images { + uboot { + arch = "arm"; + compression = "none"; + description = "U-Boot (32-bit)"; + entry = <CONFIG_TEXT_BASE>; + load = <CONFIG_TEXT_BASE>; + type = "standalone"; + + uboot-blob { + filename = "u-boot-nodtb.bin"; + type = "blob-ext"; + }; + }; + + @fdt-SEQ { + compression = "none"; + description = "NAME"; + type = "flat_dt"; + + uboot-fdt-blob { + filename = "u-boot.dtb"; + type = "blob-ext"; + }; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + + @config-SEQ { + description = "NAME"; + fdt = "fdt-SEQ"; + firmware = "uboot"; + }; + }; + }; + }; +}; diff --git a/arch/arm/mach-at91/include/mach/clk.h b/arch/arm/mach-at91/include/mach/clk.h index c1d92739e47..09b8f0586c6 100644 --- a/arch/arm/mach-at91/include/mach/clk.h +++ b/arch/arm/mach-at91/include/mach/clk.h @@ -11,6 +11,7 @@ #include <asm/arch/hardware.h> #include <asm/arch/at91_pmc.h> #include <asm/global_data.h> +#include <asm/io.h> #define GCK_CSS_SLOW_CLK 0 #define GCK_CSS_MAIN_CLK 1 diff --git a/arch/arm/mach-k3/am62x/am625_fdt.c b/arch/arm/mach-k3/am62x/am625_fdt.c index 8fe200a4231..ab9b573f3cf 100644 --- a/arch/arm/mach-k3/am62x/am625_fdt.c +++ b/arch/arm/mach-k3/am62x/am625_fdt.c @@ -5,6 +5,7 @@ #include <asm/hardware.h> #include <fdt_support.h> +#include <fdtdec.h> #include "../common_fdt.h" @@ -75,12 +76,47 @@ static void fdt_fixup_thermal_zone_nodes_am625(void *blob, int maxc) } } +static void fdt_fixup_thermal_cooling_device_cpus_am625(void *blob, int core_nr) +{ + static const char * const thermal_path[] = { + "/thermal-zones/main0-thermal/cooling-maps/map0", + "/thermal-zones/main1-thermal/cooling-maps/map0" + }; + + int node, cnt, i, ret; + u32 cooling_dev[12]; + + for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { + int new_count = core_nr * 3; /* Each CPU has 3 entries */ + int j; + + node = fdt_path_offset(blob, thermal_path[i]); + if (node < 0) + continue; /* Not found, skip it */ + + cnt = fdtdec_get_int_array_count(blob, node, "cooling-device", + cooling_dev, ARRAY_SIZE(cooling_dev)); + if (cnt < 0) + continue; + + for (j = 0; j < new_count; j++) + cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); + + ret = fdt_setprop(blob, node, "cooling-device", cooling_dev, + new_count * sizeof(u32)); + if (ret < 0) + printf("Error %s, cooling-device setprop failed %d\n", + thermal_path[i], ret); + } +} + int ft_system_setup(void *blob, struct bd_info *bd) { fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); fdt_fixup_pru_node_am625(blob, k3_has_pru()); fdt_fixup_thermal_zone_nodes_am625(blob, k3_get_max_temp()); + fdt_fixup_thermal_cooling_device_cpus_am625(blob, k3_get_core_nr()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index df48ec8d479..fa8cd93d664 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -28,6 +28,8 @@ #include <env.h> #include <elf.h> #include <soc.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> #include <asm/arch/k3-qos.h> @@ -246,12 +248,32 @@ void spl_enable_cache(void) #endif } -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +static __maybe_unused void k3_dma_remove(void) +{ + struct udevice *dev; + int rc; + + rc = uclass_find_device(UCLASS_DMA, 0, &dev); + if (!rc && dev) { + rc = device_remove(dev, DM_REMOVE_NORMAL); + if (rc) + pr_warn("Cannot remove dma device '%s' (err=%d)\n", + dev->name, rc); + } else + pr_warn("DMA Device not found (err=%d)\n", rc); +} + void spl_board_prepare_for_boot(void) { +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) dcache_disable(); +#endif +#if IS_ENABLED(CONFIG_SPL_DMA) && IS_ENABLED(CONFIG_SPL_DM_DEVICE_REMOVE) + k3_dma_remove(); +#endif } +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) void spl_board_prepare_for_linux(void) { dcache_disable(); @@ -310,14 +332,3 @@ void setup_qos(void) writel(qos_data[i].val, (uintptr_t)qos_data[i].reg); } #endif - -void efi_add_known_memory(void) -{ - if (IS_ENABLED(CONFIG_EFI_LOADER)) - /* - * Memory over ram_top can be used by various firmware - * Declare to EFI only memory area below ram_top - */ - efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base, - EFI_CONVENTIONAL_MEMORY); -} diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c index 64c34d3dbd6..6ce3eb87efb 100644 --- a/arch/arm/mach-k3/j721s2/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2/j721s2_init.c @@ -315,6 +315,9 @@ void do_dt_magic(void) #ifdef CONFIG_XPL_BUILD void board_init_f(ulong dummy) { + struct udevice *dev; + int ret; + k3_spl_init(); #if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT) do_dt_magic(); @@ -325,6 +328,13 @@ void board_init_f(ulong dummy) setup_navss_nb(); setup_qos(); + + if (IS_ENABLED(CONFIG_CPU_V7R) && IS_ENABLED(CONFIG_K3_AVS0)) { + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(k3_avs), + &dev); + if (ret) + printf("AVS init failed: %d\n", ret); + } } #endif diff --git a/arch/arm/mach-k3/r5/j784s4/clk-data.c b/arch/arm/mach-k3/r5/j784s4/clk-data.c index 793bcac9324..97d969271ec 100644 --- a/arch/arm/mach-k3/r5/j784s4/clk-data.c +++ b/arch/arm/mach-k3/r5/j784s4/clk-data.c @@ -67,6 +67,16 @@ static const char * const wkup_i2c_mcupll_bypass_out0_parents[] = { "gluelogic_hfosc0_clkout", }; +static const char * const wkup_usart_clksel_out0_parents[] = { + "hsdiv4_16fft_mcu_1_hsdivout3_clk", + "postdiv3_16fft_main_1_hsdivout5_clk", +}; + +static const char * const wkup_usart_mcupll_bypass_out0_parents[] = { + "wkup_usart_clksel_out0", + "gluelogic_hfosc0_clkout", +}; + static const char * const main_pll_hfosc_sel_out0_parents[] = { "gluelogic_hfosc0_clkout", "board_0_hfosc1_clk_out", @@ -206,7 +216,7 @@ static const struct clk_data clk_list[] = { CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d01000, 0, 2400000000), CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d02000, 0, 2000000000), CLK_DIV("hsdiv1_16fft_mcu_0_hsdivout0_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x40d00080, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0), + CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0, 96000000), CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d01090, 0, 7, 0, 0), CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_2_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", 0x40d02090, 0, 7, 0, 0, 166666666), CLK_MUX_PLLCTRL("k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", k3_pll_ctrl_wrap_wkup_0_sysclkout_clk_parents, 2, 0x42010000, 0), @@ -216,6 +226,8 @@ static const struct clk_data clk_list[] = { CLK_MUX("wkup_gpio0_clksel_out0", wkup_gpio0_clksel_out0_parents, 4, 0x43008070, 0, 2, 0), CLK_MUX("mcu_usart_clksel_out0", mcu_usart_clksel_out0_parents, 2, 0x40f081c0, 0, 1, 0), CLK_MUX("wkup_i2c_mcupll_bypass_out0", wkup_i2c_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0), + CLK_MUX("wkup_usart_clksel_out0", wkup_usart_clksel_out0_parents, 2, 0x43008064, 0, 1, 0), + CLK_MUX("wkup_usart_mcupll_bypass_out0", wkup_usart_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out0", main_pll_hfosc_sel_out0_parents, 2, 0x43008080, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out1", main_pll_hfosc_sel_out1_parents, 2, 0x43008084, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out12", main_pll_hfosc_sel_out12_parents, 2, 0x430080b0, 0, 1, 0), @@ -409,6 +421,10 @@ static const struct dev_clk soc_dev_clk_data[] = { DEV_CLK(392, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(395, 0, "usart_programmable_clock_divider_out8"), DEV_CLK(395, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(397, 0, "wkup_usart_mcupll_bypass_out0"), + DEV_CLK(397, 1, "wkup_usart_clksel_out0"), + DEV_CLK(397, 2, "gluelogic_hfosc0_clkout"), + DEV_CLK(397, 7, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"), DEV_CLK(398, 0, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(398, 1, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(398, 2, "postdiv3_16fft_main_1_hsdivout7_clk"), diff --git a/arch/arm/mach-k3/r5/j784s4/dev-data.c b/arch/arm/mach-k3/r5/j784s4/dev-data.c index d66ba8b16e0..b32b4ba9588 100644 --- a/arch/arm/mach-k3/r5/j784s4/dev-data.c +++ b/arch/arm/mach-k3/r5/j784s4/dev-data.c @@ -62,6 +62,7 @@ static struct ti_dev soc_dev_list[] = { PSC_DEV(149, &soc_lpsc_list[0]), PSC_DEV(167, &soc_lpsc_list[1]), PSC_DEV(279, &soc_lpsc_list[1]), + PSC_DEV(397, &soc_lpsc_list[1]), PSC_DEV(161, &soc_lpsc_list[2]), PSC_DEV(162, &soc_lpsc_list[3]), PSC_DEV(160, &soc_lpsc_list[4]), diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index d5934a92771..25663a99464 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -39,6 +39,7 @@ choice config STM32MP13X bool "Support STMicroelectronics STM32MP13x Soc" + select ARCH_EARLY_INIT_R select ARM_SMCCC select CPU_V7A select CPU_V7_HAS_NONSEC @@ -57,6 +58,7 @@ config STM32MP13X config STM32MP15X bool "Support STMicroelectronics STM32MP15x Soc" + select ARCH_EARLY_INIT_R select ARCH_SUPPORT_PSCI select BINMAN select CPU_V7A diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index 198785353f1..b06105768b3 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -25,8 +25,11 @@ int optee_get_reserved_memory(u32 *start, u32 *size) ofnode node; node = ofnode_path("/reserved-memory/optee"); - if (!ofnode_valid(node)) - return -ENOENT; + if (!ofnode_valid(node)) { + node = ofnode_path("/reserved-memory/optee_core"); + if (!ofnode_valid(node)) + return -ENOENT; + } fdt_start = ofnode_get_addr_size(node, "reg", &fdt_mem_size); *start = fdt_start; @@ -62,7 +65,6 @@ int dram_init(void) phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { - int ret; phys_size_t size; phys_addr_t reg; u32 optee_start, optee_size; @@ -75,10 +77,17 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) * if the effective available memory is bigger */ gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1); + + /* add 8M for U-Boot reserved memory: display, fdt, gd,... */ size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - ret = optee_get_reserved_memory(&optee_start, &optee_size); - reg = (!ret ? optee_start : gd->ram_top) - size; + reg = gd->ram_top - size; + + /* Reserved memory for OP-TEE at END of DDR for STM32MP1 SoC */ + if (IS_ENABLED(CONFIG_STM32MP13X) || IS_ENABLED(CONFIG_STM32MP15X)) { + if (!optee_get_reserved_memory(&optee_start, &optee_size)) + reg = ALIGN(optee_start - size, MMU_SECTION_SIZE); + } /* before relocation, mark the U-Boot memory as cacheable by default */ if (!(gd->flags & GD_FLG_RELOC)) @@ -86,14 +95,3 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return reg + size; } - -void efi_add_known_memory(void) -{ - if (IS_ENABLED(CONFIG_EFI_LOADER)) - /* - * Memory over ram_top is reserved to OPTEE. - * Declare to EFI only memory area below ram_top - */ - efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base, - EFI_CONVENTIONAL_MEMORY); -} diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index 26c073f06a0..62cc98910a7 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -143,6 +143,11 @@ void enable_caches(void) { /* I-cache is already enabled in start.S: icache_enable() not needed */ + /* keep D-cache configuration done before relocation, wait arch_early_init_r*/ +} + +int arch_early_init_r(void) +{ /* deactivate the data cache, early enabled in arch_cpu_init() */ dcache_disable(); /* @@ -150,6 +155,8 @@ void enable_caches(void) * warning: the TLB location udpated in board_f.c::reserve_mmu */ dcache_enable(); + + return 0; } static void setup_boot_mode(void) diff --git a/arch/m68k/dts/Makefile b/arch/m68k/dts/Makefile index 7988522eb98..8b354b9c570 100644 --- a/arch/m68k/dts/Makefile +++ b/arch/m68k/dts/Makefile @@ -20,12 +20,5 @@ dtb-$(CONFIG_TARGET_STMARK2) += stmark2.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/microblaze/dts/Makefile b/arch/microblaze/dts/Makefile index 427a8f9aaca..9be902d3bb1 100644 --- a/arch/microblaze/dts/Makefile +++ b/arch/microblaze/dts/Makefile @@ -4,12 +4,5 @@ dtb-y += $(shell echo $(CONFIG_DEFAULT_DEVICE_TREE)).dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 14fbce597b9..752e771514f 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -39,13 +39,5 @@ dtb-$(CONFIG_SOC_SERVAL) += serval_pcb105.dtb serval_pcb106.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - # Add any required device tree compiler flags here DTC_FLAGS += - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/nios2/dts/Makefile b/arch/nios2/dts/Makefile index 2b29fa90f6c..d77db9762a1 100644 --- a/arch/nios2/dts/Makefile +++ b/arch/nios2/dts/Makefile @@ -4,12 +4,5 @@ dtb-y += $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%).dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index 321c644804e..766b0c05951 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -35,13 +35,5 @@ dtb-$(CONFIG_TARGET_CMPCPRO) += cmpcpro.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - # Add any required device tree compiler flags here DTC_FLAGS += - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index c4c44057bad..f3dfd751cb4 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -15,12 +15,5 @@ dtb-$(CONFIG_TARGET_ASPEED_AST2700_IBEX) += ast2700-ibex.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index c50df5f9179..7056cfd0180 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -55,9 +55,10 @@ void board_init_f(ulong flag) void board_boot_order(u32 *spl_boot_list) { + struct sandbox_state *state = state_get_current(); + spl_boot_list[0] = BOOT_DEVICE_VBE; - spl_boot_list[1] = BOOT_DEVICE_UPL; - spl_boot_list[2] = BOOT_DEVICE_BOARD; + spl_boot_list[1] = state->upl ? BOOT_DEVICE_UPL : BOOT_DEVICE_BOARD; } static int spl_board_load_file(struct spl_image_info *spl_image, diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile index f810b4752f5..1c9fb4a4566 100644 --- a/arch/sandbox/dts/Makefile +++ b/arch/sandbox/dts/Makefile @@ -10,12 +10,5 @@ dtb-$(CONFIG_CMD_EXTENSION) += overlay0.dtbo overlay1.dtbo include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - +# Add any required device tree compiler flags here DTC_FLAGS += -R 4 -p 0x1000 - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb *.dtbo diff --git a/arch/sandbox/dts/cedit.dtsi b/arch/sandbox/dts/cedit.dtsi index 9bd84e62936..facd7a49bef 100644 --- a/arch/sandbox/dts/cedit.dtsi +++ b/arch/sandbox/dts/cedit.dtsi @@ -39,6 +39,9 @@ /* IDs for the menu items */ item-id = <ID_CPU_SPEED_1 ID_CPU_SPEED_2 ID_CPU_SPEED_3>; + + /* values for the menu items */ + item-value = <0 3 6>; }; power-loss { diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi index 565c382ed45..ff2cb42844c 100644 --- a/arch/sandbox/dts/sandbox_pmic.dtsi +++ b/arch/sandbox/dts/sandbox_pmic.dtsi @@ -10,6 +10,7 @@ &sandbox_pmic { compatible = "sandbox,pmic"; + sandbox,emul = <&emul_pmic0>; buck1 { regulator-name = "SUPPLY_1.2V"; diff --git a/arch/sh/dts/Makefile b/arch/sh/dts/Makefile index 144fd3e7d22..e9153e42534 100644 --- a/arch/sh/dts/Makefile +++ b/arch/sh/dts/Makefile @@ -2,13 +2,5 @@ dtb-y += sh7751-r2dplus.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - # Add any required device tree compiler flags here DTC_FLAGS += - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb *_HS diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 87463748c4d..8127d31e57e 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -88,18 +88,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - char processor_name[CPU_MAX_NAME_LEN]; - const char *name; - - /* Print processor name */ - name = cpu_get_name(processor_name); - printf("CPU: %s\n", name); - - return 0; -} - void board_debug_uart_init(void) { /* com1 / com2 decode range */ diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index c3d7442b4a8..fa7430b436f 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -38,16 +38,6 @@ int arch_cpu_init(void) return 0; } -int checkcpu(void) -{ - return 0; -} - -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - static void board_final_init(void) { /* @@ -82,6 +72,8 @@ static void board_final_init(void) static int last_stage_init(void) { + timestamp_add_to_bootstage(); + if (IS_ENABLED(CONFIG_XPL_BUILD)) return 0; diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c index ec4003c4e77..681191d85bb 100644 --- a/arch/x86/cpu/coreboot/timestamp.c +++ b/arch/x86/cpu/coreboot/timestamp.c @@ -6,13 +6,12 @@ */ #include <bootstage.h> +#include <errno.h> #include <asm/arch/timestamp.h> #include <asm/cb_sysinfo.h> #include <asm/u-boot-x86.h> #include <linux/compiler.h> -static struct timestamp_table *ts_table __section(".data"); - void timestamp_init(void) { timestamp_add_now(TS_U_BOOT_INITTED); @@ -20,6 +19,8 @@ void timestamp_init(void) void timestamp_add(enum timestamp_id id, uint64_t ts_time) { + const struct sysinfo_t *info = cb_get_sysinfo(); + struct timestamp_table *ts_table = info->tstamp_table; struct timestamp_entry *tse; if (!ts_table || (ts_table->num_entries == ts_table->max_entries)) @@ -37,13 +38,15 @@ void timestamp_add_now(enum timestamp_id id) int timestamp_add_to_bootstage(void) { + const struct sysinfo_t *info = cb_get_sysinfo(); + const struct timestamp_table *ts_table = info->tstamp_table; uint i; if (!ts_table) - return -1; + return -ENOENT; for (i = 0; i < ts_table->num_entries; i++) { - struct timestamp_entry *tse = &ts_table->entries[i]; + const struct timestamp_entry *tse = &ts_table->entries[i]; const char *name = NULL; switch (tse->entry_id) { diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index ea11b09eacc..a8b21406ac0 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -163,8 +163,11 @@ char *cpu_get_name(char *name) return ptr; } -int default_print_cpuinfo(void) +#if !CONFIG_IS_ENABLED(CPU) +int print_cpuinfo(void) { + post_code(POST_CPU_INFO); + printf("CPU: %s, vendor %s, device %xh\n", cpu_has_64bit() ? "x86_64" : "x86", cpu_vendor_name(gd->arch.x86_vendor), gd->arch.x86_device); @@ -176,6 +179,7 @@ int default_print_cpuinfo(void) return 0; } +#endif #if CONFIG_IS_ENABLED(SHOW_BOOT_PROGRESS) void show_boot_progress(int val) @@ -336,7 +340,7 @@ int reserve_arch(void) } #endif -long detect_coreboot_table_at(ulong start, ulong size) +static long detect_coreboot_table_at(ulong start, ulong size) { u32 *ptr, *end; diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 6c53f0ea821..6c32ae499df 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -7,6 +7,7 @@ #include <dm.h> #include <errno.h> #include <asm/cpu.h> +#include <asm/cpu_x86.h> #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c index 218a68c4642..84fe50e2f2f 100644 --- a/arch/x86/cpu/efi/app.c +++ b/arch/x86/cpu/efi/app.c @@ -19,11 +19,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - void board_final_init(void) { } diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 642a87a37d8..6845ce72ff9 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -144,11 +144,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - /* Find any available tables and copy them to a safe place */ int reserve_arch(void) { diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index d837fb97982..a51a24498a7 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -263,6 +263,49 @@ static int build_vendor_name(char *vendor_name) } #endif +int x86_cpu_vendor_info(char *name) +{ + uint cpu_device; + + cpu_device = 0; + + /* gcc 7.3 does not want to drop x86_vendors, so use #ifdef */ +#ifndef CONFIG_TPL_BUILD + *name = '\0'; /* Unset */ + + /* Find the id and vendor_name */ + if (!has_cpuid()) { + /* Its a 486 if we can modify the AC flag */ + if (flag_is_changeable_p(X86_EFLAGS_AC)) + cpu_device = 0x00000400; /* 486 */ + else + cpu_device = 0x00000300; /* 386 */ + if (cpu_device == 0x00000400 && test_cyrix_52div()) { + /* If we ever care we can enable cpuid here */ + memcpy(name, "CyrixInstead", 13); + + /* Detect NexGen with old hypercode */ + } else if (deep_magic_nexgen_probe()) { + memcpy(name, "NexGenDriven", 13); + } + } else { + int cpuid_level; + + cpuid_level = build_vendor_name(name); + name[12] = '\0'; + + /* Intel-defined flags: level 0x00000001 */ + if (cpuid_level >= 0x00000001) + cpu_device = cpuid_eax(0x00000001); + else + /* Have CPUID level 0 only unheard of */ + cpu_device = 0x00000400; + } +#endif /* CONFIG_TPL_BUILD */ + + return cpu_device; +} + static void identify_cpu(struct cpu_device_id *cpu) { cpu->device = 0; /* fix gcc 4.4.4 warning */ @@ -289,46 +332,19 @@ static void identify_cpu(struct cpu_device_id *cpu) return; } -/* gcc 7.3 does not want to drop x86_vendors, so use #ifdef */ #ifndef CONFIG_TPL_BUILD - char vendor_name[16]; - int i; - - vendor_name[0] = '\0'; /* Unset */ - - /* Find the id and vendor_name */ - if (!has_cpuid()) { - /* Its a 486 if we can modify the AC flag */ - if (flag_is_changeable_p(X86_EFLAGS_AC)) - cpu->device = 0x00000400; /* 486 */ - else - cpu->device = 0x00000300; /* 386 */ - if ((cpu->device == 0x00000400) && test_cyrix_52div()) { - memcpy(vendor_name, "CyrixInstead", 13); - /* If we ever care we can enable cpuid here */ - } - /* Detect NexGen with old hypercode */ - else if (deep_magic_nexgen_probe()) - memcpy(vendor_name, "NexGenDriven", 13); - } else { - int cpuid_level; - - cpuid_level = build_vendor_name(vendor_name); - vendor_name[12] = '\0'; - - /* Intel-defined flags: level 0x00000001 */ - if (cpuid_level >= 0x00000001) { - cpu->device = cpuid_eax(0x00000001); - } else { - /* Have CPUID level 0 only unheard of */ - cpu->device = 0x00000400; - } - } - cpu->vendor = X86_VENDOR_UNKNOWN; - for (i = 0; i < ARRAY_SIZE(x86_vendors); i++) { - if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) { - cpu->vendor = x86_vendors[i].vendor; - break; + { + char vendor_name[16]; + int i; + + cpu->device = x86_cpu_vendor_info(vendor_name); + + cpu->vendor = X86_VENDOR_UNKNOWN; + for (i = 0; i < ARRAY_SIZE(x86_vendors); i++) { + if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) { + cpu->vendor = x86_vendors[i].vendor; + break; + } } } #endif @@ -485,6 +501,11 @@ int x86_cpu_reinit_f(void) return 0; } +void x86_get_identity_for_timer(void) +{ + setup_identity(); +} + void x86_enable_caches(void) { unsigned long cr0; diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c index b3f4214acdb..6f78b072cde 100644 --- a/arch/x86/cpu/i386/interrupt.c +++ b/arch/x86/cpu/i386/interrupt.c @@ -237,7 +237,7 @@ void *x86_get_idt(void) return &idt_ptr; } -void __do_irq(int irq) +static void __do_irq(int irq) { printf("Unhandled IRQ : %d\n", irq); } diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 05691a38d2e..d299068a879 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -182,20 +182,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - char processor_name[CPU_MAX_NAME_LEN]; - const char *name; - - /* Print processor name */ - name = cpu_get_name(processor_name); - printf("CPU: %s\n", name); - - post_code(POST_CPU_INFO); - - return 0; -} - void board_debug_uart_init(void) { /* This enables the debug UART */ diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 50cba5fb88d..07ea89162de 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -87,7 +87,7 @@ void mtrr_read_all(struct mtrr_info *info) } } -void mtrr_write_all(struct mtrr_info *info) +static void mtrr_write_all(struct mtrr_info *info) { int reg_count = mtrr_get_var_count(); struct mtrr_state state; diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 262584d01f0..563f63e2bc8 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -109,12 +109,6 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - post_code(POST_CPU_INFO); - return default_print_cpuinfo(); -} #endif int arch_early_init_r(void) diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index fdf92b2c0c3..07504faaffb 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -266,12 +266,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - post_code(POST_CPU_INFO); - return default_print_cpuinfo(); -} - static void quark_pcie_init(void) { u32 val; diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c index 142c9341cf8..8a5c78595aa 100644 --- a/arch/x86/cpu/slimbootloader/slimbootloader.c +++ b/arch/x86/cpu/slimbootloader/slimbootloader.c @@ -54,8 +54,3 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c index 8a8f7d27a9d..b005bc7d9a0 100644 --- a/arch/x86/cpu/tangier/tangier.c +++ b/arch/x86/cpu/tangier/tangier.c @@ -19,8 +19,3 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 80eab710315..71bc07f872a 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -75,3 +75,9 @@ void board_debug_uart_init(void) /* this was already done in SPL */ } #endif + +void x86_get_identity_for_timer(void) +{ + /* set the vendor to Intel so that native_calibrate_tsc() works */ + gd->arch.x86_vendor = X86_VENDOR_INTEL; +} diff --git a/arch/x86/cpu/x86_64/misc.c b/arch/x86/cpu/x86_64/misc.c index 294511e6eba..fc449ca4ed6 100644 --- a/arch/x86/cpu/x86_64/misc.c +++ b/arch/x86/cpu/x86_64/misc.c @@ -32,9 +32,4 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - return 0; -} #endif diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index cd77f4c4e81..9a46726e026 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -24,12 +24,4 @@ dtb-y += bayleybay.dtb \ include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - DTC_FLAGS += -R 4 -p $(if $(CONFIG_EFI_APP),0x8000,0x1000) - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 87e0c6f12b6..8c1ef4c8cc1 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -293,4 +293,11 @@ u32 cpu_get_stepping(void); */ int cpu_phys_address_size(void); +void board_final_init(void); +void board_final_cleanup(void); + +#ifndef CONFIG_EFI_STUB +int reserve_arch(void); +#endif + #endif diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 3acc58ad74b..ed2f6aa3893 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -44,6 +44,15 @@ int x86_cpu_reinit_f(void); int x86_cpu_init_tpl(void); /** + * x86_get_identity_for_timer() - Set up CPU identity for use by the early timer + * + * The timer can be needed early in board_f if bootstage is enabled. This + * function can be called from the TSC timer to make sure that the CPU-identity + * info has been set up + */ +void x86_get_identity_for_timer(void); + +/** * cpu_reinit_fpu() - Reinit the FPU if something is wrong with it * * The FSP-M code can leave registers in use in the FPU. This functions reinits @@ -51,6 +60,14 @@ int x86_cpu_init_tpl(void); */ void cpu_reinit_fpu(void); +/** + * x86_cpu_vendor_info() - Get the CPU-vendor name and device number + * + * @name: 13-byte area to hold the returned string + * Return: CPU device number read from cpuid + */ +int x86_cpu_vendor_info(char *name); + int cpu_init_f(void); void setup_gdt(struct global_data *id, u64 *gdt_addr); /* @@ -78,7 +95,6 @@ void x86_enable_caches(void); void x86_disable_caches(void); int x86_init_cache(void); phys_addr_t board_get_usable_ram_top(phys_size_t total_size); -int default_print_cpuinfo(void); /* Set up a UART which can be used with printch(), printhex8(), etc. */ int setup_internal_uart(int enable); diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 165e8ab944f..2a78f578dee 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -19,7 +19,12 @@ void arch_print_bdinfo(void) bdinfo_print_num_l("clock_rate", gd->arch.clock_rate); bdinfo_print_num_l("tsc_base", gd->arch.tsc_base); bdinfo_print_num_l("vendor", gd->arch.x86_vendor); - bdinfo_print_str(" name", cpu_vendor_name(gd->arch.x86_vendor)); + if (!IS_ENABLED(CONFIG_X86_64)) { + char vendor_name[16]; + + x86_cpu_vendor_info(vendor_name); + bdinfo_print_str(" name", vendor_name); + } bdinfo_print_num_l("model", gd->arch.x86_model); bdinfo_print_num_l("phys_addr in bits", cpu_phys_address_size()); bdinfo_print_num_l("table start", gd->arch.table_start); diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c index 122b4f7ca01..d478b7486e3 100644 --- a/arch/x86/lib/e820.c +++ b/arch/x86/lib/e820.c @@ -4,6 +4,7 @@ */ #include <efi_loader.h> +#include <lmb.h> #include <asm/e820.h> #include <asm/global_data.h> @@ -41,15 +42,11 @@ void efi_add_known_memory(void) { struct e820_entry e820[E820MAX]; unsigned int i, num; - u64 start, ram_top; + u64 start; int type; num = install_e820_map(ARRAY_SIZE(e820), e820); - ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK; - if (!ram_top) - ram_top = 0x100000000ULL; - for (i = 0; i < num; ++i) { start = e820[i].addr; @@ -72,13 +69,41 @@ void efi_add_known_memory(void) break; } - if (type == EFI_CONVENTIONAL_MEMORY) { - efi_add_conventional_memory_map(start, - start + e820[i].size, - ram_top); - } else { + if (type != EFI_CONVENTIONAL_MEMORY) efi_add_memory_map(start, e820[i].size, type); - } } } #endif /* CONFIG_IS_ENABLED(EFI_LOADER) */ + +#if CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP) +void lmb_arch_add_memory(void) +{ + struct e820_entry e820[E820MAX]; + unsigned int i, num; + u64 ram_top; + + num = install_e820_map(ARRAY_SIZE(e820), e820); + + ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK; + if (!ram_top) + ram_top = 0x100000000ULL; + + for (i = 0; i < num; ++i) { + if (e820[i].type == E820_RAM) { + u64 start, size, rgn_top; + + start = e820[i].addr; + size = e820[i].size; + rgn_top = start + size; + + if (start > ram_top) + continue; + + if (rgn_top > ram_top) + size -= rgn_top - ram_top; + + lmb_add(start, size); + } + } +} +#endif /* CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP) */ diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index c47e6ca4738..7e4c1476634 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -26,12 +26,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - post_code(POST_CPU_INFO); - return default_print_cpuinfo(); -} - int fsp_init_phase_pci(void) { u32 status; diff --git a/arch/xtensa/dts/Makefile b/arch/xtensa/dts/Makefile index c22c50ac4e5..aa582b85e5c 100644 --- a/arch/xtensa/dts/Makefile +++ b/arch/xtensa/dts/Makefile @@ -4,12 +4,4 @@ dtb-$(CONFIG_XTENSA) += ml605.dtb ml605_nommu.dtb kc705.dtb kc705_nommu.dtb include $(srctree)/scripts/Makefile.dts -targets += $(dtb-y) - DTC_FLAGS += - -PHONY += dtbs -dtbs: $(addprefix $(obj)/, $(dtb-y)) - @: - -clean-files := *.dtb |