diff options
Diffstat (limited to 'arch')
126 files changed, 1660 insertions, 583 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index 49813a4c9b8..b6f9e177b64 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -229,8 +229,8 @@ config X86 # Thing to enable for when SPL/TPL are enabled: SPL imply SPL_DM imply SPL_OF_LIBFDT - imply SPL_DRIVERS_MISC_SUPPORT - imply SPL_GPIO_SUPPORT + imply SPL_DRIVERS_MISC + imply SPL_GPIO imply SPL_PINCTRL imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBGENERIC_SUPPORT @@ -243,8 +243,8 @@ config X86 imply SPL_SYSCON # TPL imply TPL_DM - imply TPL_DRIVERS_MISC_SUPPORT - imply TPL_GPIO_SUPPORT + imply TPL_DRIVERS_MISC + imply TPL_GPIO imply TPL_PINCTRL imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ff51a4e623b..3a745ce126a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -955,7 +955,7 @@ config ARCH_SOCFPGA select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 select SPL_SERIAL_SUPPORT select SPL_SYSRESET - select SPL_WATCHDOG_SUPPORT + select SPL_WATCHDOG select SUPPORT_SPL select SYS_NS16550 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 @@ -1020,11 +1020,11 @@ config ARCH_SUNXI imply FIT imply OF_LIBFDT_OVERLAY imply PRE_CONSOLE_BUFFER - imply SPL_GPIO_SUPPORT + imply SPL_GPIO imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT if MMC - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SERIAL_SUPPORT imply USB_GADGET diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 15cecb5e0b3..3de18c7675b 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -719,6 +719,11 @@ int icache_status(void) return (get_sctlr() & CR_I) != 0; } +int mmu_status(void) +{ + return (get_sctlr() & CR_M) != 0; +} + void invalidate_icache_all(void) { __asm_invalidate_icache_all(); @@ -740,6 +745,11 @@ int icache_status(void) return 0; } +int mmu_status(void) +{ + return 0; +} + void invalidate_icache_all(void) { } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index f1624ff30ae..6eb7f9c2148 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -565,28 +565,28 @@ void fdt_fixup_pfe_firmware(void *blob) if (!p) return; - pclassfw = (void *)simple_strtoul(p, NULL, 16); + pclassfw = (void *)hextoul(p, NULL); if (!pclassfw) return; p = env_get("class_elf_size"); if (!p) return; - len_class = simple_strtoul(p, NULL, 16); + len_class = hextoul(p, NULL); /* If the environment variable is not set, then exit silently */ p = env_get("tmu_elf_firmware"); if (!p) return; - ptmufw = (void *)simple_strtoul(p, NULL, 16); + ptmufw = (void *)hextoul(p, NULL); if (!ptmufw) return; p = env_get("tmu_elf_size"); if (!p) return; - len_tmu = simple_strtoul(p, NULL, 16); + len_tmu = hextoul(p, NULL); if (len_class == 0 || len_tmu == 0) { printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n", @@ -605,14 +605,14 @@ void fdt_fixup_pfe_firmware(void *blob) if (!p) return; - putilfw = (void *)simple_strtoul(p, NULL, 16); + putilfw = (void *)hextoul(p, NULL); if (!putilfw) return; p = env_get("util_elf_size"); if (!p) return; - len_util = simple_strtoul(p, NULL, 16); + len_util = hextoul(p, NULL); if (len_util) { printf("PFE Util PE firmware is not added to FDT.\n"); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index c3cd6c7ac7f..1641b657990 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -277,7 +277,7 @@ static unsigned long get_internval_val_mhz(void) ulong interval_mhz = get_bus_freq(0) / (1000 * 1000); if (interval) - interval_mhz = simple_strtoul(interval, NULL, 10); + interval_mhz = dectoul(interval, NULL); return interval_mhz; } @@ -329,7 +329,7 @@ static void erratum_rcw_src(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A009203 static void erratum_a009203(void) { -#ifdef CONFIG_SYS_I2C +#ifdef CONFIG_SYS_I2C_LEGACY u8 __iomem *ptr; #ifdef I2C1_BASE_ADDR ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index b3f1148f9df..1d5e3444529 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -88,8 +88,8 @@ void board_init_f(ulong dummy) preloader_console_init(); spl_set_bd(); -#ifdef CONFIG_SYS_I2C -#ifdef CONFIG_SPL_I2C_SUPPORT +#ifdef CONFIG_SYS_I2C_LEGACY +#ifdef CONFIG_SPL_I2C i2c_init_all(); #endif #endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3941a08cf40..537c96bf5b3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -366,6 +366,7 @@ dtb-$(CONFIG_AM33XX) += \ am335x-pocketbeagle.dtb \ am335x-pxm50.dtb \ am335x-rut.dtb \ + am335x-sancloud-bbe.dtb \ am335x-shc.dtb \ am335x-pdu001.dtb \ am335x-chiliboard.dtb \ diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 8dcfac3a5b8..35ec1a8df87 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ / { @@ -13,44 +10,44 @@ }; }; + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + chosen { stdout-path = &uart0; tick-timer = &timer2; }; - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - leds { pinctrl-names = "default"; pinctrl-0 = <&user_leds_s0>; compatible = "gpio-leds"; - led@2 { + led2 { label = "beaglebone:green:heartbeat"; gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; - led@3 { + led3 { label = "beaglebone:green:mmc0"; gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; default-state = "off"; }; - led@4 { + led4 { label = "beaglebone:green:usr2"; gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cpu0"; default-state = "off"; }; - led@5 { + led5 { label = "beaglebone:green:usr3"; gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc1"; @@ -58,7 +55,7 @@ }; }; - vmmcsd_fixed: fixedregulator@0 { + vmmcsd_fixed: fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; @@ -72,112 +69,118 @@ user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ - 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */ + AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ - 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ + AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ + AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ - 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ - 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ - 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ - 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ - 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0) >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ + AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */ + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) >; }; emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ >; }; }; @@ -189,36 +192,16 @@ status = "okay"; }; -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - &usb0 { - status = "okay"; dr_mode = "peripheral"; + interrupts-extended = <&intc 18 &tps 0>; + interrupt-names = "mc", "vbus"; }; &usb1 { - status = "okay"; dr_mode = "host"; }; -&cppi41dma { - status = "okay"; -}; - &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -231,7 +214,7 @@ }; baseboard_eeprom: baseboard_eeprom@50 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; #address-cells = <1>; @@ -250,7 +233,7 @@ clock-frequency = <100000>; cape_eeprom0: cape_eeprom0@54 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x54>; #address-cells = <1>; #size-cells = <1>; @@ -260,7 +243,7 @@ }; cape_eeprom1: cape_eeprom1@55 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x55>; #address-cells = <1>; #size-cells = <1>; @@ -270,7 +253,7 @@ }; cape_eeprom2: cape_eeprom2@56 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x56>; #address-cells = <1>; #size-cells = <1>; @@ -280,7 +263,7 @@ }; cape_eeprom3: cape_eeprom3@57 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x57>; #address-cells = <1>; #size-cells = <1>; @@ -311,8 +294,20 @@ * by the hardware problems. (Tip: double-check by performing a current * measurement after shutdown: it should be less than 1 mA.) */ + + interrupts = <7>; /* NMI */ + interrupt-parent = <&intc>; + ti,pmic-shutdown-controller; + charger { + status = "okay"; + }; + + pwrbutton { + status = "okay"; + }; + regulators { dcdc1_reg: regulator@0 { regulator-name = "vdds_dpr"; @@ -323,7 +318,7 @@ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ regulator-name = "vdd_mpu"; regulator-min-microvolt = <925000>; - regulator-max-microvolt = <1325000>; + regulator-max-microvolt = <1351500>; regulator-boot-on; regulator-always-on; }; diff --git a/arch/arm/dts/am335x-bone.dts b/arch/arm/dts/am335x-bone.dts index 6b849372042..b5d85ef51a0 100644 --- a/arch/arm/dts/am335x-bone.dts +++ b/arch/arm/dts/am335x-bone.dts @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/am335x-boneblack-common.dtsi b/arch/arm/dts/am335x-boneblack-common.dtsi new file mode 100644 index 00000000000..64c3e9269f4 --- /dev/null +++ b/arch/arm/dts/am335x-boneblack-common.dtsi @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include <dt-bindings/display/tda998x.h> +#include <dt-bindings/interrupt-controller/irq.h> + +&ldo3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "okay"; + non-removable; +}; + +&am33xx_pinmux { + nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; + + nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) + >; + }; + + mcasp0_pins: mcasp0_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ + AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ + >; + }; +}; + +&lcdc { + status = "okay"; + + /* If you want to get 24 bit RGB and 16 BGR mode instead of + * current 16 bit RGB and 24 BGR modes, set the propety + * below to "crossed" and uncomment the video-ports -property + * in tda19988 node. + */ + blue-and-red-wiring = "straight"; + + port { + lcdc_0: endpoint@0 { + remote-endpoint = <&hdmi_0>; + }; + }; +}; + +&i2c0 { + tda19988: tda19988@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + nxp,calib-gpios = <&gpio1 25 0>; + interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default", "off"; + pinctrl-0 = <&nxp_hdmi_bonelt_pins>; + pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; + + /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ + /* video-ports = <0x234501>; */ + + #sound-dai-cells = <0>; + audio-ports = < TDA998x_I2S 0x03>; + + ports { + port@0 { + hdmi_0: endpoint@0 { + remote-endpoint = <&lcdc_0>; + }; + }; + }; + }; +}; + +&rtc { + system-power-controller; +}; + +&mcasp0 { + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins>; + status = "okay"; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 1 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; + +/ { + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + clk_mcasp0_fixed: clk_mcasp0_fixed { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24576000>; + }; + + clk_mcasp0: clk_mcasp0 { + #clock-cells = <0>; + compatible = "gpio-gate-clock"; + clocks = <&clk_mcasp0_fixed>; + enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "TI BeagleBone Black"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink0_master>; + simple-audio-card,frame-master = <&dailink0_master>; + + dailink0_master: simple-audio-card,cpu { + sound-dai = <&mcasp0>; + clocks = <&clk_mcasp0>; + }; + + simple-audio-card,codec { + sound-dai = <&tda19988>; + }; + }; +}; diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts index 27ebe4a65df..e2ee8b8c07b 100644 --- a/arch/arm/dts/am335x-boneblack.dts +++ b/arch/arm/dts/am335x-boneblack.dts @@ -1,90 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" / { model = "TI AM335x BeagleBone Black"; compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; - chosen { - stdout-path = &uart0; - tick-timer = &timer2; - }; -}; - -&ldo3_reg { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; - -&mmc1 { - vmmc-supply = <&vmmcsd_fixed>; }; -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_pins>; - bus-width = <8>; - status = "okay"; +&cpu0_opp_table { + /* + * All PG 2.0 silicon may not support 1GHz but some of the early + * BeagleBone Blacks have PG 2.0 silicon which is guaranteed + * to support 1GHz OPP so enable it for PG 2.0 on this board. + */ + oppnitro-1000000000 { + opp-supported-hw = <0x06 0x0100>; + }; }; -&am33xx_pinmux { - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - >; - }; - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - >; - }; +&gpio0 { + gpio-line-names = + "[mdio_data]", + "[mdio_clk]", + "P9_22 [spi0_sclk]", + "P9_21 [spi0_d0]", + "P9_18 [spi0_d1]", + "P9_17 [spi0_cs0]", + "[mmc0_cd]", + "P8_42A [ecappwm0]", + "P8_35 [lcd d12]", + "P8_33 [lcd d13]", + "P8_31 [lcd d14]", + "P8_32 [lcd d15]", + "P9_20 [i2c2_sda]", + "P9_19 [i2c2_scl]", + "P9_26 [uart1_rxd]", + "P9_24 [uart1_txd]", + "[rmii1_txd3]", + "[rmii1_txd2]", + "[usb0_drvvbus]", + "[hdmi cec]", + "P9_41B", + "[rmii1_txd1]", + "P8_19 [ehrpwm2a]", + "P8_13 [ehrpwm2b]", + "NC", + "NC", + "P8_14", + "P8_17", + "[rmii1_txd0]", + "[rmii1_refclk]", + "P9_11 [uart4_rxd]", + "P9_13 [uart4_txd]"; }; -&lcdc { - status = "okay"; +&gpio1 { + gpio-line-names = + "P8_25 [mmc1_dat0]", + "[mmc1_dat1]", + "P8_5 [mmc1_dat2]", + "P8_6 [mmc1_dat3]", + "P8_23 [mmc1_dat4]", + "P8_22 [mmc1_dat5]", + "P8_3 [mmc1_dat6]", + "P8_4 [mmc1_dat7]", + "NC", + "NC", + "NC", + "NC", + "P8_12", + "P8_11", + "P8_16", + "P8_15", + "P9_15A", + "P9_23", + "P9_14 [ehrpwm1a]", + "P9_16 [ehrpwm1b]", + "[emmc rst]", + "[usr0 led]", + "[usr1 led]", + "[usr2 led]", + "[usr3 led]", + "[hdmi irq]", + "[usb vbus oc]", + "[hdmi audio]", + "P9_12", + "P8_26", + "P8_21 [emmc]", + "P8_20 [emmc]"; }; -/ { - hdmi { - compatible = "ti,tilcdc,slave"; - i2c = <&i2c0>; - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; - status = "okay"; - }; +&gpio2 { + gpio-line-names = + "P9_15B", + "P8_18", + "P8_7", + "P8_8", + "P8_10", + "P8_9", + "P8_45 [hdmi]", + "P8_46 [hdmi]", + "P8_43 [hdmi]", + "P8_44 [hdmi]", + "P8_41 [hdmi]", + "P8_42 [hdmi]", + "P8_39 [hdmi]", + "P8_40 [hdmi]", + "P8_37 [hdmi]", + "P8_38 [hdmi]", + "P8_36 [hdmi]", + "P8_34 [hdmi]", + "[rmii1_rxd3]", + "[rmii1_rxd2]", + "[rmii1_rxd1]", + "[rmii1_rxd0]", + "P8_27 [hdmi]", + "P8_29 [hdmi]", + "P8_28 [hdmi]", + "P8_30 [hdmi]", + "[mmc0_dat3]", + "[mmc0_dat2]", + "[mmc0_dat1]", + "[mmc0_dat0]", + "[mmc0_clk]", + "[mmc0_cmd]"; }; -&rtc { - system-power-controller; +&gpio3 { + gpio-line-names = + "[mii col]", + "[mii crs]", + "[mii rx err]", + "[mii tx en]", + "[mii rx dv]", + "[i2c0 sda]", + "[i2c0 scl]", + "[jtag emu0]", + "[jtag emu1]", + "[mii tx clk]", + "[mii rx clk]", + "NC", + "NC", + "[usb vbus en]", + "P9_31 [spi1_sclk]", + "P9_29 [spi1_d0]", + "P9_30 [spi1_d1]", + "P9_28 [spi1_cs0]", + "P9_42B [ecappwm0]", + "P9_27", + "P9_41A", + "P9_25", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC"; }; diff --git a/arch/arm/dts/am335x-bonegreen-common.dtsi b/arch/arm/dts/am335x-bonegreen-common.dtsi new file mode 100644 index 00000000000..9f7fb63744d --- /dev/null +++ b/arch/arm/dts/am335x-bonegreen-common.dtsi @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&ldo3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "okay"; +}; + +&am33xx_pinmux { + uart2_pins: uart2_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd */ + AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd */ + >; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&rtc { + system-power-controller; +}; diff --git a/arch/arm/dts/am335x-bonegreen.dts b/arch/arm/dts/am335x-bonegreen.dts index 9c59da90fa9..18cc0f49e99 100644 --- a/arch/arm/dts/am335x-bonegreen.dts +++ b/arch/arm/dts/am335x-bonegreen.dts @@ -1,57 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am335x-bonegreen-common.dtsi" / { model = "TI AM335x BeagleBone Green"; compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; - chosen { - stdout-path = &uart0; - tick-timer = &timer2; - }; -}; - -&ldo3_reg { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; - -&mmc1 { - vmmc-supply = <&vmmcsd_fixed>; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_pins>; - bus-width = <8>; - status = "okay"; -}; - -&am33xx_pinmux { - uart2_pins: uart2_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */ - AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */ - >; - }; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&rtc { - system-power-controller; }; diff --git a/arch/arm/dts/am335x-sancloud-bbe.dts b/arch/arm/dts/am335x-sancloud-bbe.dts new file mode 100644 index 00000000000..275ba339adf --- /dev/null +++ b/arch/arm/dts/am335x-sancloud-bbe.dts @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "SanCloud BeagleBone Enhanced"; + compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; +}; + +&am33xx_pinmux { + pinctrl-names = "default"; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) + >; + }; + + usb_hub_ctrl: usb_hub_ctrl { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ + >; + }; + + mpu6050_pins: pinmux_mpu6050_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */ + >; + }; + + lps3331ap_pins: pinmux_lps3331ap_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */ + >; + }; +}; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + status = "okay"; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&cpsw_emac0 { + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; +}; + +&i2c0 { + lps331ap: barometer@5c { + compatible = "st,lps331ap-press"; + st,drdy-int-pin = <1>; + reg = <0x5c>; + interrupt-parent = <&gpio1>; + interrupts = <26 IRQ_TYPE_EDGE_RISING>; + }; + + mpu6050: accelerometer@68 { + compatible = "invensense,mpu6050"; + reg = <0x68>; + interrupt-parent = <&gpio0>; + interrupts = <2 IRQ_TYPE_EDGE_RISING>; + orientation = <0xff 0 0 0 1 0 0 0 0xff>; + }; + + usb2512b: usb-hub@2c { + compatible = "microchip,usb2512b"; + reg = <0x2c>; + reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + /* wifi on port 4 */ + }; +}; diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index 35b49df8510..efbcfb36e92 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -8,6 +8,10 @@ stdout-path = "serial2:115200n8"; tick-timer = &timer1; }; + + aliases { + mmc1 = &sdhci1; + }; }; &cbass_main{ @@ -79,6 +83,7 @@ }; &sdhci0 { + status = "disabled"; u-boot,dm-spl; }; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index df850a2edb6..0c1305df7e4 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -76,3 +76,7 @@ &tx_pru2_1 { remoteproc-name = "tx_pru2_1"; }; + +&mcu_r5fss0 { + ti,cluster-mode = <0>; +}; diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index 786cc480506..8a3f1891e22 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -188,3 +188,15 @@ &hbmc_mux { u-boot,dm-spl; }; + +&serdes_ln_ctrl { + u-boot,mux-autoprobe; +}; + +&usb_serdes_mux { + u-boot,mux-autoprobe; +}; + +&serdes0 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts index 5120711d4fe..f0440cda1a7 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-common-proc-board.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/net/ti-dp83867.h> #include <dt-bindings/mux/ti-serdes.h> +#include <dt-bindings/phy/phy.h> / { chosen { @@ -281,3 +282,25 @@ ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: link@0 { + reg = <0>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + }; + + serdes0_qsgmii_link: link@1 { + reg = <2>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_QSGMII>; + resets = <&serdes_wiz0 3>; + }; +}; diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi index 11314640750..e1d43acc855 100644 --- a/arch/arm/dts/k3-j7200-main.dtsi +++ b/arch/arm/dts/k3-j7200-main.dtsi @@ -5,6 +5,13 @@ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ */ +/ { + serdes_refclk: serdes-refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -428,10 +435,14 @@ ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-ddr52 = <0x6>; ti,otap-del-sel-hs200 = <0x8>; - ti,otap-del-sel-hs400 = <0x0>; + ti,otap-del-sel-hs400 = <0x5>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; ti,strobe-sel = <0x77>; + ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; bus-width = <8>; + mmc-hs400-1_8v; mmc-hs200-1_8v; mmc-ddr-1_8v; dma-coherent; @@ -451,7 +462,12 @@ ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-sdr104 = <0x5>; ti,otap-del-sel-ddr50 = <0xc>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x8>; dma-coherent; }; @@ -554,6 +570,62 @@ clock-names = "gpio"; }; + serdes_wiz0: wiz@5060000 { + compatible = "ti,j721e-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 292 11>, <&k3_clks 292 85>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <4>; + #reset-cells = <1>; + ranges = <0x5060000 0x0 0x5060000 0x10000>; + + assigned-clocks = <&k3_clks 292 85>; + assigned-clock-parents = <&k3_clks 292 89>; + + wiz0_pll0_refclk: pll0-refclk { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_pll0_refclk"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_pll0_refclk>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_pll1_refclk: pll1-refclk { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_pll1_refclk"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_pll1_refclk>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_refclk_dig: refclk-dig { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_refclk_dig"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_refclk_dig>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_cmn_refclk_dig_div: cmn-refclk-dig-div { + clocks = <&wiz0_refclk_dig>; + #clock-cells = <0>; + }; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&wiz0_pll0_refclk>; + clock-names = "refclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + usbss0: cdns-usb@4104000 { compatible = "ti,j721e-usb"; reg = <0x00 0x4104000 0x00 0x100>; diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 974dae84161..85dbf8d2ac9 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -129,13 +129,17 @@ u-boot,dm-spl; }; +&wiz3_pll1_refclk { + assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; + assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; +}; + &main_usbss0_pins_default { u-boot,dm-spl; }; &usbss0 { u-boot,dm-spl; - ti,usb2-only; }; &usb0 { @@ -215,3 +219,16 @@ &main_r5fss1 { ti,cluster-mode = <0>; }; + +&wiz3_pll1_refclk { + assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; + assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; +}; + +&serdes_ln_ctrl { + u-boot,mux-autoprobe; +}; + +&usb_serdes_mux { + u-boot,mux-autoprobe; +}; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi index f346bb31634..48c6ddf6728 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi @@ -13,8 +13,6 @@ aliases { remoteproc0 = &sysctrler; remoteproc1 = &a72_0; - remoteproc2 = &main_r5fss0_core0; - remoteproc3 = &main_r5fss0_core1; }; fs_loader0: fs_loader@0 { @@ -23,18 +21,6 @@ }; }; -&main_r5fss0 { - u-boot,dm-spl; -}; - -&main_r5fss0_core0 { - u-boot,dm-spl; -}; - -&main_r5fss0_core1 { - u-boot,dm-spl; -}; - &tps659413a { esm: esm { compatible = "ti,tps659413-esm"; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 0542b2f8b88..a12607dc2f7 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -13,8 +13,6 @@ aliases { remoteproc0 = &sysctrler; remoteproc1 = &a72_0; - remoteproc2 = &main_r5fss0_core0; - remoteproc3 = &main_r5fss0_core1; }; chosen { diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi index 489efa150a6..b0909cf25f7 100644 --- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi +++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi @@ -6,3 +6,26 @@ #include "meson-g12-common-u-boot.dtsi" #include "meson-khadas-vim3-u-boot.dtsi" + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "khadas"; + product = "VIM3"; + }; + + baseboard { + manufacturer = "khadas"; + product = "VIM3"; + }; + + chassis { + manufacturer = "khadas"; + product = "VIM3"; + }; + }; + }; +}; diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi index 39270ea71c8..6109088afae 100644 --- a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi +++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi @@ -5,3 +5,26 @@ */ #include "meson-gxl-u-boot.dtsi" + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "khadas"; + product = "VIM"; + }; + + baseboard { + manufacturer = "khadas"; + product = "VIM"; + }; + + chassis { + manufacturer = "khadas"; + product = "VIM"; + }; + }; + }; +}; diff --git a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi index c1763336cf0..e906bcaa78e 100644 --- a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi +++ b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi @@ -10,6 +10,27 @@ aliases { spi0 = &spifc; }; + + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "khadas"; + product = "VIM2"; + }; + + baseboard { + manufacturer = "khadas"; + product = "VIM2"; + }; + + chassis { + manufacturer = "khadas"; + product = "VIM2"; + }; + }; + }; }; &sd_emmc_c { diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi index a591c0c9f23..4b8ea3d21a0 100644 --- a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi +++ b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi @@ -6,3 +6,26 @@ #include "meson-sm1-u-boot.dtsi" #include "meson-khadas-vim3-u-boot.dtsi" + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "khadas"; + product = "VIM3L"; + }; + + baseboard { + manufacturer = "khadas"; + product = "VIM3L"; + }; + + chassis { + manufacturer = "khadas"; + product = "VIM3L"; + }; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 7dcc96c19cf..a8e15ad09a3 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -17,8 +17,8 @@ u-boot,error-led = "error"; u-boot,mmc-env-partition = "ssbl"; st,adc_usb_pd = <&adc1 18>, <&adc1 19>; - st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; + st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; firmware { @@ -29,9 +29,12 @@ }; reserved-memory { + u-boot,dm-spl; + optee@de000000 { reg = <0xde000000 0x02000000>; no-map; + u-boot,dm-spl; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index 46a43371bdf..fc6066aab2d 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -16,8 +16,8 @@ u-boot,boot-led = "heartbeat"; u-boot,error-led = "error"; u-boot,mmc-env-partition = "ssbl"; - st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; + st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; firmware { diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index 1ae57e18542..8b275e4950e 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -57,7 +57,7 @@ }; }; -&sdmmc2_d47_pins_b { +&sdmmc2_d47_pins_c { u-boot,dm-spl; pins { u-boot,dm-spl; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts index 9b5dda318ec..0e860e5cf88 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts @@ -152,7 +152,7 @@ &sdmmc2 { pinctrl-names = "default"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; non-removable; no-sd; no-sdio; diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi index 06da009fa28..4a6ed3a7dd5 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi @@ -64,7 +64,7 @@ }; }; -#ifndef CONFIG_MACH_SUN50I_H616 +#ifdef SCP_ADDR scp { description = "SCP firmware"; type = "firmware"; @@ -92,7 +92,7 @@ @config-SEQ { description = "NAME"; firmware = "atf"; -#ifdef CONFIG_MACH_SUN50I_H616 +#ifndef SCP_ADDR loadables = "uboot"; #else loadables = "scp", "uboot"; diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index da7ca0587cd..3675ce763d1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -184,7 +184,7 @@ #define TZPC_BASE 0x02200000 #define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804) #if !CONFIG_IS_ENABLED(DM_I2C) -#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_LEGACY #define CONFIG_SYS_I2C_EARLY_INIT #endif #define SRDS_MAX_LANES 8 diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 02ce73954db..d4c795d89cb 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -11,7 +11,18 @@ #define SUNXI_SRAM_A1_BASE 0x00000000 #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */ +#if defined(CONFIG_SUNXI_GEN_SUN6I) && \ + !defined(CONFIG_MACH_SUN8I_R40) && \ + !defined(CONFIG_MACH_SUN8I_V3S) +#define SUNXI_SRAM_A2_BASE 0x00040000 +#ifdef CONFIG_MACH_SUN8I_H3 +#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */ +#else +#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */ +#endif +#else #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */ +#endif #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */ #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */ #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index df264a170b2..36b840378a9 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -338,6 +338,7 @@ extern void __readwrite_bug(const char *fn); /* Optimized copy functions to read from/write to IO sapce */ #ifdef CONFIG_ARM64 +#include <cpu_func.h> /* * Copy data from IO memory space to "real" memory space. */ @@ -351,11 +352,13 @@ void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count) count--; } - while (count >= 8) { - *(u64 *)to = __raw_readq(from); - from += 8; - to += 8; - count -= 8; + if (mmu_status()) { + while (count >= 8) { + *(u64 *)to = __raw_readq(from); + from += 8; + to += 8; + count -= 8; + } } while (count) { @@ -379,11 +382,13 @@ void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count) count--; } - while (count >= 8) { - __raw_writeq(*(u64 *)from, to); - from += 8; - to += 8; - count -= 8; + if (mmu_status()) { + while (count >= 8) { + __raw_writeq(*(u64 *)from, to); + from += 8; + to += 8; + count -= 8; + } } while (count) { diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index 904fddd6c04..9fd82459b24 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -191,7 +191,7 @@ static int do_smhload(struct cmd_tbl *cmdtp, int flag, int argc, int ret; char end_str[64]; - load_addr = simple_strtoul(argv[2], NULL, 16); + load_addr = hextoul(argv[2], NULL); if (!load_addr) return -1; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 14347e7c7d9..0b4276c0362 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -78,7 +78,7 @@ endif if ARCH_EXYNOS5 -config SPL_GPIO_SUPPORT +config SPL_GPIO default y config SPL_LIBCOMMON_SUPPORT diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c index b10ead19426..1e3cfee4739 100644 --- a/arch/arm/mach-imx/cmd_dek.c +++ b/arch/arm/mach-imx/cmd_dek.c @@ -300,9 +300,9 @@ static int do_dek_blob(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != 4) return CMD_RET_USAGE; - src_addr = simple_strtoul(argv[1], NULL, 16); - dst_addr = simple_strtoul(argv[2], NULL, 16); - len = simple_strtoul(argv[3], NULL, 10); + src_addr = hextoul(argv[1], NULL); + dst_addr = hextoul(argv[2], NULL); + len = dectoul(argv[3], NULL); return blob_encap_dek(src_addr, dst_addr, len); } diff --git a/arch/arm/mach-imx/cmd_mfgprot.c b/arch/arm/mach-imx/cmd_mfgprot.c index 1430f619098..1e866b76c8d 100644 --- a/arch/arm/mach-imx/cmd_mfgprot.c +++ b/arch/arm/mach-imx/cmd_mfgprot.c @@ -71,8 +71,8 @@ static int do_mfgprot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) if (argc != 4) return CMD_RET_USAGE; - m_addr = simple_strtoul(argv[2], NULL, 16); - m_size = simple_strtoul(argv[3], NULL, 10); + m_addr = hextoul(argv[2], NULL); + m_size = dectoul(argv[3], NULL); m_ptr = map_physmem(m_addr, m_size, MAP_NOCACHE); if (!m_ptr) return -ENOMEM; diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 7157c9e9799..cd513445978 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -1083,13 +1083,13 @@ static int do_nandbcb_bcbonly(int argc, char *const argv[]) mtd = cfg.mtd; - cfg.boot_stream1_address = simple_strtoul(argv[2], NULL, 16); - cfg.boot_stream1_size = simple_strtoul(argv[3], NULL, 16); + cfg.boot_stream1_address = hextoul(argv[2], NULL); + cfg.boot_stream1_size = hextoul(argv[3], NULL); cfg.boot_stream1_size = ALIGN(cfg.boot_stream1_size, mtd->writesize); if (argc > 5) { - cfg.boot_stream2_address = simple_strtoul(argv[4], NULL, 16); - cfg.boot_stream2_size = simple_strtoul(argv[5], NULL, 16); + cfg.boot_stream2_address = hextoul(argv[4], NULL); + cfg.boot_stream2_size = hextoul(argv[5], NULL); cfg.boot_stream2_size = ALIGN(cfg.boot_stream2_size, mtd->writesize); } @@ -1450,7 +1450,7 @@ static int do_nandbcb_init(int argc, char * const argv[]) if (nandbcb_set_boot_config(argc, argv, &cfg)) return CMD_RET_FAILURE; - addr = simple_strtoul(argv[1], &endp, 16); + addr = hextoul(argv[1], &endp); if (*argv[1] == 0 || *endp != 0) return CMD_RET_FAILURE; diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 00bd157d0e0..cc39e6bf569 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -609,12 +609,12 @@ static int do_authenticate_image(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 3) return CMD_RET_USAGE; - addr = simple_strtoul(argv[1], NULL, 16); - length = simple_strtoul(argv[2], NULL, 16); + addr = hextoul(argv[1], NULL); + length = hextoul(argv[2], NULL); if (argc == 3) ivt_offset = get_image_ivt_offset(addr); else - ivt_offset = simple_strtoul(argv[3], NULL, 16); + ivt_offset = hextoul(argv[3], NULL); rcode = imx_hab_authenticate_image(addr, length, ivt_offset); if (rcode == 0) diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c index 6392fe267a0..015267c8b2d 100644 --- a/arch/arm/mach-imx/imx8/ahab.c +++ b/arch/arm/mach-imx/imx8/ahab.c @@ -161,7 +161,7 @@ static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 2) return CMD_RET_USAGE; - addr = simple_strtoul(argv[1], NULL, 16); + addr = hextoul(argv[1], NULL); printf("Authenticate OS container at 0x%lx\n", addr); diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c index 6f9b1c99fcd..507b5b42314 100644 --- a/arch/arm/mach-imx/imx8/snvs_security_sc.c +++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c @@ -638,24 +638,24 @@ static int do_snvs_cfg(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != (NB_REGISTERS + 1)) return CMD_RET_USAGE; - conf.hp.lock = simple_strtoul(argv[++idx], NULL, 16); - conf.hp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.lock = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_filt_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_det_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_det_cfg2 = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_filt1_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_filt2_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper1_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper2_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper3_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper4_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper5_cfg = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper_clk_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper_routing_ctl1 = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.act_tamper_routing_ctl2 = simple_strtoul(argv[++idx], NULL, 16); + conf.hp.lock = hextoul(argv[++idx], NULL); + conf.hp.secvio_ctl = hextoul(argv[++idx], NULL); + conf.lp.lock = hextoul(argv[++idx], NULL); + conf.lp.secvio_ctl = hextoul(argv[++idx], NULL); + conf.lp.tamper_filt_cfg = hextoul(argv[++idx], NULL); + conf.lp.tamper_det_cfg = hextoul(argv[++idx], NULL); + conf.lp.tamper_det_cfg2 = hextoul(argv[++idx], NULL); + conf.lp.tamper_filt1_cfg = hextoul(argv[++idx], NULL); + conf.lp.tamper_filt2_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper1_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper2_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper3_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper4_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper5_cfg = hextoul(argv[++idx], NULL); + conf.lp.act_tamper_ctl = hextoul(argv[++idx], NULL); + conf.lp.act_tamper_clk_ctl = hextoul(argv[++idx], NULL); + conf.lp.act_tamper_routing_ctl1 = hextoul(argv[++idx], NULL); + conf.lp.act_tamper_routing_ctl2 = hextoul(argv[++idx], NULL); err = apply_snvs_config(&conf); @@ -690,12 +690,12 @@ static int do_snvs_dgo_cfg(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != (6 + 1)) return CMD_RET_USAGE; - conf.tamper_offset_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.tamper_pull_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.tamper_ana_test_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.tamper_sensor_trim_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.tamper_misc_ctl = simple_strtoul(argv[++idx], NULL, 16); - conf.tamper_core_volt_mon_ctl = simple_strtoul(argv[++idx], NULL, 16); + conf.tamper_offset_ctl = hextoul(argv[++idx], NULL); + conf.tamper_pull_ctl = hextoul(argv[++idx], NULL); + conf.tamper_ana_test_ctl = hextoul(argv[++idx], NULL); + conf.tamper_sensor_trim_ctl = hextoul(argv[++idx], NULL); + conf.tamper_misc_ctl = hextoul(argv[++idx], NULL); + conf.tamper_core_volt_mon_ctl = hextoul(argv[++idx], NULL); err = apply_snvs_dgo_config(&conf); @@ -726,8 +726,8 @@ static int do_tamper_pin_cfg(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != (2 + 1)) return CMD_RET_USAGE; - conf.pad = simple_strtoul(argv[++idx], NULL, 10); - conf.mux_conf = simple_strtoul(argv[++idx], NULL, 16); + conf.pad = dectoul(argv[++idx], NULL); + conf.mux_conf = hextoul(argv[++idx], NULL); err = apply_tamper_pin_list_config(&conf, 1); @@ -761,8 +761,8 @@ static int do_snvs_clear_status(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != (2 + 1)) return CMD_RET_USAGE; - conf.lp.status = simple_strtoul(argv[++idx], NULL, 16); - conf.lp.tamper_det_status = simple_strtoul(argv[++idx], NULL, 16); + conf.lp.status = hextoul(argv[++idx], NULL); + conf.lp.tamper_det_status = hextoul(argv[++idx], NULL); scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.status), &conf.lp.status, NULL, NULL, NULL, diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 30fb45d48c2..9ffe5ac6e34 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -180,7 +180,7 @@ static int do_bootaux(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } - addr = simple_strtoul(argv[1], NULL, 16); + addr = hextoul(argv[1], NULL); if (!addr) return CMD_RET_FAILURE; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index a03eca81651..789a50d4e92 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -301,7 +301,7 @@ config TARGET_MX6DL_MAMOJ select PINCTRL select SPL select SPL_DM if SPL - select SPL_GPIO_SUPPORT if SPL + select SPL_GPIO if SPL select SPL_LIBCOMMON_SUPPORT if SPL select SPL_LIBDISK_SUPPORT if SPL select SPL_LIBGENERIC_SUPPORT if SPL @@ -312,9 +312,9 @@ config TARGET_MX6DL_MAMOJ select SPL_SEPARATE_BSS if SPL select SPL_SERIAL_SUPPORT if SPL select SPL_USB_GADGET if SPL - select SPL_USB_HOST_SUPPORT if SPL + select SPL_USB_HOST if SPL select SPL_USB_SDP_SUPPORT if SPL - select SPL_WATCHDOG_SUPPORT if SPL + select SPL_WATCHDOG if SPL select SUPPORT_SPL imply CMD_DM diff --git a/arch/arm/mach-imx/mx6/mp.c b/arch/arm/mach-imx/mx6/mp.c index 2fdf070a08b..de9ace083ce 100644 --- a/arch/arm/mach-imx/mx6/mp.c +++ b/arch/arm/mach-imx/mx6/mp.c @@ -47,7 +47,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) { uint32_t boot_addr; - boot_addr = simple_strtoul(argv[0], NULL, 16); + boot_addr = hextoul(argv[0], NULL); switch (nr) { case 1: diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index 0e46d70e842..533905daeb4 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -198,7 +198,7 @@ void board_init_f(ulong dummy) #endif } -u32 spl_boot_mode(const u32 boot_device) +u32 spl_mmc_boot_mode(const u32 boot_device) { switch (boot_device) { case BOOT_DEVICE_MMC1: diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index ab6d9bd3d0e..bb0f64194f4 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -193,10 +193,6 @@ int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr) } #endif -__weak void start_non_linux_remote_cores(void) -{ -} - void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { typedef void __noreturn (*image_entry_noargs_t)(void); @@ -214,7 +210,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) init_env(); if (!fit_image_info[IMAGE_ID_DM_FW].image_start) { - start_non_linux_remote_cores(); size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load", &loadaddr); } diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index f421ed1bb18..e81b70d7c36 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -22,7 +22,6 @@ void setup_k3_mpu_regions(void); int early_console_init(void); void disable_linefill_optimization(void); void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); -void start_non_linux_remote_cores(void); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); void spl_enable_dcache(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index e9e076c9e72..78d80be1758 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -370,39 +370,3 @@ void release_resources_for_core_shutdown(void) } } #endif - -#ifdef CONFIG_SYS_K3_SPL_ATF -void start_non_linux_remote_cores(void) -{ - int size = 0, ret; - u32 loadaddr = 0; - - if (!soc_is_j721e()) - return; - - size = load_firmware("name_mainr5f0_0fw", "addr_mainr5f0_0load", - &loadaddr); - if (size <= 0) - goto err_load; - - /* assuming remoteproc 2 is aliased for the needed remotecore */ - ret = rproc_load(2, loadaddr, size); - if (ret) { - printf("Firmware failed to start on rproc (%d)\n", ret); - goto err_load; - } - - ret = rproc_start(2); - if (ret) { - printf("Firmware init failed on rproc (%d)\n", ret); - goto err_load; - } - - printf("Remoteproc 2 started successfully\n"); - - return; - -err_load: - rproc_reset(2); -} -#endif diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c index 7165d666e5e..72dc394df5f 100644 --- a/arch/arm/mach-keystone/cmd_clock.c +++ b/arch/arm/mach-keystone/cmd_clock.c @@ -42,9 +42,9 @@ int do_pll_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) else goto pll_cmd_usage; - cmd_pll_data.pll_m = simple_strtoul(argv[2], NULL, 10); - cmd_pll_data.pll_d = simple_strtoul(argv[3], NULL, 10); - cmd_pll_data.pll_od = simple_strtoul(argv[4], NULL, 10); + cmd_pll_data.pll_m = dectoul(argv[2], NULL); + cmd_pll_data.pll_d = dectoul(argv[3], NULL); + cmd_pll_data.pll_od = dectoul(argv[4], NULL); printf("Trying to set pll %d; mult %d; div %d; OD %d\n", cmd_pll_data.pll, cmd_pll_data.pll_m, @@ -72,7 +72,7 @@ int do_getclk_cmd(struct cmd_tbl *cmdtp, int flag, int argc, if (argc != 2) goto getclk_cmd_usage; - clk = simple_strtoul(argv[1], NULL, 10); + clk = dectoul(argv[1], NULL); freq = ks_clk_get_rate(clk); if (freq) @@ -101,7 +101,7 @@ int do_psc_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (argc != 3) goto psc_cmd_usage; - psc_module = simple_strtoul(argv[1], NULL, 10); + psc_module = dectoul(argv[1], NULL); if (strcmp(argv[2], "en") == 0) { res = psc_enable_module(psc_module); printf("psc_enable_module(%d) - %s\n", psc_module, diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c index 049d5734734..e26296b6da6 100644 --- a/arch/arm/mach-keystone/cmd_mon.c +++ b/arch/arm/mach-keystone/cmd_mon.c @@ -25,7 +25,7 @@ static int do_mon_install(struct cmd_tbl *cmdtp, int flag, int argc, freq = CONFIG_SYS_HZ_CLOCK; - addr = simple_strtoul(argv[1], NULL, 16); + addr = hextoul(argv[1], NULL); header = (struct image_header *)addr; @@ -40,7 +40,7 @@ static int do_mon_install(struct cmd_tbl *cmdtp, int flag, int argc, size); if (argc >= 3) - ecrypt_bm_addr = simple_strtoul(argv[2], NULL, 16); + ecrypt_bm_addr = hextoul(argv[2], NULL); rcode = mon_install(load_addr, dpsc_base, freq, ecrypt_bm_addr); printf("## installed monitor @ 0x%x, freq [%d], status %d\n", @@ -76,8 +76,8 @@ int do_mon_power(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 3) return CMD_RET_USAGE; - core_id = simple_strtoul(argv[1], NULL, 16); - on = simple_strtoul(argv[2], NULL, 16); + core_id = hextoul(argv[1], NULL); + on = hextoul(argv[2], NULL); if (on) rcode = mon_power_on(core_id, fn); diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c index 339ae7fd20d..3953aa9b9b5 100644 --- a/arch/arm/mach-kirkwood/cpu.c +++ b/arch/arm/mach-kirkwood/cpu.c @@ -125,7 +125,7 @@ static void kw_sysrst_check(void) return; /* read sysrstdelay value */ - sysrst_dly = (u32) simple_strtoul(s, NULL, 10); + sysrst_dly = (u32)dectoul(s, NULL); /* read SysRst Length counter register (bits 28:0) */ sysrst_cnt = (0x1fffffff & readl(KW_REG_SYSRST_CNT)); diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index f5538f4a903..a4b5630c46f 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -96,7 +96,7 @@ */ #if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C) #ifndef CONFIG_SYS_I2C_SOFT -#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_LEGACY #define CONFIG_SYS_I2C_MVTWSI #endif #define CONFIG_SYS_I2C_SLAVE 0x0 diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c index 877f387102d..7496029705f 100644 --- a/arch/arm/mach-mediatek/mt8183/init.c +++ b/arch/arm/mach-mediatek/mt8183/init.c @@ -48,7 +48,7 @@ int mtk_soc_early_init(void) return 0; } -void reset_cpu(ulong addr) +void reset_cpu(void) { psci_system_reset(); } diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index cda65f74786..89737a37ad9 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -253,28 +253,32 @@ choice config MVEBU_SPL_BOOT_DEVICE_SPI bool "SPI NOR flash" imply ENV_IS_IN_SPI_FLASH - select SPL_DM_SPI - select SPL_SPI_FLASH_SUPPORT - select SPL_SPI_LOAD - select SPL_SPI_SUPPORT + imply SPL_DM_SPI + imply SPL_SPI_FLASH_SUPPORT + imply SPL_SPI_LOAD + imply SPL_SPI_SUPPORT + select SPL_BOOTROM_SUPPORT config MVEBU_SPL_BOOT_DEVICE_MMC bool "SDIO/MMC card" imply ENV_IS_IN_MMC # GPIO needed for eMMC/SD card presence detection - select SPL_DM_GPIO - select SPL_DM_MMC - select SPL_GPIO_SUPPORT - select SPL_LIBDISK_SUPPORT - select SPL_MMC_SUPPORT + imply SPL_DM_GPIO + imply SPL_DM_MMC + imply SPL_GPIO + imply SPL_LIBDISK_SUPPORT + imply SPL_MMC_SUPPORT + select SPL_BOOTROM_SUPPORT config MVEBU_SPL_BOOT_DEVICE_SATA bool "SATA" - select SPL_SATA_SUPPORT - select SPL_LIBDISK_SUPPORT + imply SPL_SATA_SUPPORT + imply SPL_LIBDISK_SUPPORT + select SPL_BOOTROM_SUPPORT config MVEBU_SPL_BOOT_DEVICE_UART bool "UART" + select SPL_BOOTROM_SUPPORT endchoice diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 52473ade7a7..79858858c25 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -142,7 +142,7 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count); int mvebu_soc_family(void); u32 mvebu_get_nand_clock(void); -void return_to_bootrom(void); +void __noreturn return_to_bootrom(void); #ifndef CONFIG_DM_MMC int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks); diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S index 8718d7a43e1..dde77b76521 100644 --- a/arch/arm/mach-mvebu/lowlevel_spl.S +++ b/arch/arm/mach-mvebu/lowlevel_spl.S @@ -13,8 +13,9 @@ ENDPROC(save_boot_params) ENTRY(return_to_bootrom) ldr r12, =CONFIG_SPL_BOOTROM_SAVE ldr sp, [r12] + ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */ mov r0, #0x0 /* @ return value: 0x0 NO_ERR */ - ldmfd sp!, {r0 - r12, pc} /* @ restore regs and return */ + bx lr /* @ return to bootrom */ ENDPROC(return_to_bootrom) /* diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 16ebb7a59e5..3b6bc389709 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -8,6 +8,7 @@ #include <debug_uart.h> #include <fdtdec.h> #include <hang.h> +#include <image.h> #include <init.h> #include <log.h> #include <spl.h> @@ -16,6 +17,160 @@ #include <asm/arch/cpu.h> #include <asm/arch/soc.h> +#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT) + +/* + * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must + * point to the offset of kwbimage main header which is always at offset zero + * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS + * makes U-Boot non-bootable. + */ +#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT +#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0 +#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0 +#endif +#endif + +/* + * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the + * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this + * header and figure out at which sector the U-Boot proper binary is stored. + * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR + * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the + * kwbimage main header. + */ +#ifdef CONFIG_SPL_MMC_SUPPORT +#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION +#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported +#endif +#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0 +#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0 +#endif +#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 +#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0 +#endif +#endif + +/* + * When loading U-Boot via SPL from SATA disk, the kwbimage main header is + * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be + * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper. + */ +#ifdef CONFIG_SPL_SATA_SUPPORT +#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1 +#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1 +#endif +#endif + +/* Boot Type - block ID */ +#define IBR_HDR_I2C_ID 0x4D +#define IBR_HDR_SPI_ID 0x5A +#define IBR_HDR_NAND_ID 0x8B +#define IBR_HDR_SATA_ID 0x78 +#define IBR_HDR_PEX_ID 0x9C +#define IBR_HDR_UART_ID 0x69 +#define IBR_HDR_SDIO_ID 0xAE + +/* Structure of the main header, version 1 (Armada 370/38x/XP) */ +struct kwbimage_main_hdr_v1 { + uint8_t blockid; /* 0x0 */ + uint8_t flags; /* 0x1 */ + uint16_t reserved2; /* 0x2-0x3 */ + uint32_t blocksize; /* 0x4-0x7 */ + uint8_t version; /* 0x8 */ + uint8_t headersz_msb; /* 0x9 */ + uint16_t headersz_lsb; /* 0xA-0xB */ + uint32_t srcaddr; /* 0xC-0xF */ + uint32_t destaddr; /* 0x10-0x13 */ + uint32_t execaddr; /* 0x14-0x17 */ + uint8_t options; /* 0x18 */ + uint8_t nandblocksize; /* 0x19 */ + uint8_t nandbadblklocation; /* 0x1A */ + uint8_t reserved4; /* 0x1B */ + uint16_t reserved5; /* 0x1C-0x1D */ + uint8_t ext; /* 0x1E */ + uint8_t checksum; /* 0x1F */ +} __packed; + +#ifdef CONFIG_SPL_MMC_SUPPORT +u32 spl_mmc_boot_mode(const u32 boot_device) +{ + return MMCSD_MODE_RAW; +} +#endif + +int spl_parse_board_header(struct spl_image_info *spl_image, + const void *image_header, size_t size) +{ + const struct kwbimage_main_hdr_v1 *mhdr = image_header; + + if (size < sizeof(*mhdr)) { + /* This should be compile time assert */ + printf("FATAL ERROR: Image header size is too small\n"); + hang(); + } + + /* + * Very basic check for image validity. We cannot check mhdr->checksum + * as it is calculated also from variable length extended headers + * (including SPL content) which is not included in U-Boot image_header. + */ + if (mhdr->version != 1 || + ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) || + ( +#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT + mhdr->blockid != IBR_HDR_SPI_ID && +#endif +#ifdef CONFIG_SPL_SATA_SUPPORT + mhdr->blockid != IBR_HDR_SATA_ID && +#endif +#ifdef CONFIG_SPL_MMC_SUPPORT + mhdr->blockid != IBR_HDR_SDIO_ID && +#endif + 1 + )) { + printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n"); + return -EINVAL; + } + + spl_image->offset = mhdr->srcaddr; + +#ifdef CONFIG_SPL_SATA_SUPPORT + /* + * For SATA srcaddr is specified in number of sectors. + * The main header is must be stored at sector number 1. + * This expects that sector size is 512 bytes and recalculates + * data offset to bytes relative to the main header. + */ + if (mhdr->blockid == IBR_HDR_SATA_ID) { + if (spl_image->offset < 1) { + printf("ERROR: Wrong SATA srcaddr in kwbimage\n"); + return -EINVAL; + } + spl_image->offset -= 1; + spl_image->offset *= 512; + } +#endif + +#ifdef CONFIG_SPL_MMC_SUPPORT + /* + * For SDIO (eMMC) srcaddr is specified in number of sectors. + * This expects that sector size is 512 bytes and recalculates + * data offset to bytes. + */ + if (mhdr->blockid == IBR_HDR_SDIO_ID) + spl_image->offset *= 512; +#endif + + spl_image->size = mhdr->blocksize; + spl_image->entry_point = mhdr->execaddr; + spl_image->load_addr = mhdr->destaddr; + spl_image->os = IH_OS_U_BOOT; + spl_image->name = "U-Boot"; + + return 0; +} + static u32 get_boot_device(void) { u32 val; @@ -49,11 +204,11 @@ static u32 get_boot_device(void) boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); switch (boot_device) { -#if defined(CONFIG_ARMADA_38X) +#ifdef BOOT_FROM_NAND case BOOT_FROM_NAND: return BOOT_DEVICE_NAND; #endif -#ifdef CONFIG_SPL_MMC_SUPPORT +#ifdef BOOT_FROM_MMC case BOOT_FROM_MMC: case BOOT_FROM_MMC_ALT: return BOOT_DEVICE_MMC1; @@ -69,14 +224,77 @@ static u32 get_boot_device(void) return BOOT_DEVICE_SATA; #endif case BOOT_FROM_SPI: - default: return BOOT_DEVICE_SPI; + default: + return BOOT_DEVICE_BOOTROM; }; } +#else + +static u32 get_boot_device(void) +{ + return BOOT_DEVICE_BOOTROM; +} + +#endif + u32 spl_boot_device(void) { - return get_boot_device(); + u32 boot_device = get_boot_device(); + + switch (boot_device) { + /* + * Return to the BootROM to continue the Marvell xmodem + * UART boot protocol. As initiated by the kwboot tool. + * + * This can only be done by the BootROM since the beginning + * of the image is already read and interpreted by the BootROM. + * SPL has no chance to receive this information. So we + * need to return to the BootROM to enable this xmodem + * UART download. Use SPL infrastructure to return to BootROM. + */ + case BOOT_DEVICE_UART: + return BOOT_DEVICE_BOOTROM; + + /* + * If SPL is compiled with chosen boot_device support + * then use SPL driver for loading U-Boot proper. + */ +#ifdef CONFIG_SPL_MMC_SUPPORT + case BOOT_DEVICE_MMC1: + return BOOT_DEVICE_MMC1; +#endif +#ifdef CONFIG_SPL_SATA_SUPPORT + case BOOT_FROM_SATA: + return BOOT_FROM_SATA; +#endif +#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; +#endif + + /* + * If SPL is not compiled with chosen boot_device support + * then return to the BootROM. BootROM supports loading + * U-Boot proper from any valid boot_device present in SAR + * register. + */ + default: + return BOOT_DEVICE_BOOTROM; + } +} + +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ + u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE; + + printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]); + return_to_bootrom(); + + /* NOTREACHED - return_to_bootrom() does not return */ + hang(); } void board_init_f(ulong dummy) @@ -135,26 +353,4 @@ void board_init_f(ulong dummy) /* Update read timing control for PCIe */ mv_rtc_config(); - - /* - * Return to the BootROM to continue the Marvell xmodem - * UART boot protocol. As initiated by the kwboot tool. - * - * This can only be done by the BootROM and not by the - * U-Boot SPL infrastructure, since the beginning of the - * image is already read and interpreted by the BootROM. - * SPL has no chance to receive this information. So we - * need to return to the BootROM to enable this xmodem - * UART download. - * - * If booting from NAND lets let the BootROM load the - * rest of the bootloader. - */ - switch (get_boot_device()) { - case BOOT_DEVICE_UART: -#if defined(CONFIG_ARMADA_38X) - case BOOT_DEVICE_NAND: -#endif - return_to_bootrom(); - } } diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c index d5b46a87a18..24fa204ccd2 100644 --- a/arch/arm/mach-nexell/clock.c +++ b/arch/arm/mach-nexell/clock.c @@ -592,7 +592,7 @@ struct clk *clk_get(const char *id) c = strrchr((const char *)str, (int)'.'); if (!c || !cdev->peri) break; - devid = simple_strtoul(++c, NULL, 10); + devid = dectoul(++c, NULL); if (cdev->peri->dev_id == devid) break; } diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 48bc80a6390..08639653b79 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -15,15 +15,15 @@ config OMAP34XX imply NAND_OMAP_GPMC imply SPL_FS_EXT4 imply SPL_FS_FAT - imply SPL_GPIO_SUPPORT - imply SPL_I2C_SUPPORT + imply SPL_GPIO + imply SPL_I2C imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBDISK_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT imply SPL_NAND_SUPPORT imply SPL_OMAP3_ID_NAND - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SERIAL_SUPPORT imply SYS_I2C_OMAP24XX imply SYS_THUMB_BUILD @@ -37,15 +37,15 @@ config OMAP44XX imply SPL_DISPLAY_PRINT imply SPL_FS_EXT4 imply SPL_FS_FAT - imply SPL_GPIO_SUPPORT - imply SPL_I2C_SUPPORT + imply SPL_GPIO + imply SPL_I2C imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBDISK_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT imply SPL_NAND_SIMPLE imply SPL_NAND_SUPPORT - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SERIAL_SUPPORT imply SYS_I2C_OMAP24XX imply SYS_THUMB_BUILD @@ -61,8 +61,8 @@ config OMAP54XX imply SPL_ENV_SUPPORT imply SPL_FS_EXT4 imply SPL_FS_FAT - imply SPL_GPIO_SUPPORT - imply SPL_I2C_SUPPORT + imply SPL_GPIO + imply SPL_I2C imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBDISK_SUPPORT imply SPL_LIBGENERIC_SUPPORT @@ -70,7 +70,7 @@ config OMAP54XX imply SPL_NAND_AM33XX_BCH imply SPL_NAND_AM33XX_BCH imply SPL_NAND_SUPPORT - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SERIAL_SUPPORT imply SYS_I2C_OMAP24XX diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 88cb9573c94..4268419b166 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -41,19 +41,19 @@ config TARGET_AM335X_EVM imply SPL_ENV_SUPPORT imply SPL_FS_EXT4 imply SPL_FS_FAT - imply SPL_GPIO_SUPPORT - imply SPL_I2C_SUPPORT + imply SPL_GPIO + imply SPL_I2C imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBDISK_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT imply SPL_NAND_SUPPORT imply SPL_OF_LIBFDT - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT imply SPL_SYS_MALLOC_SIMPLE - imply SPL_WATCHDOG_SUPPORT + imply SPL_WATCHDOG imply SPL_YMODEM_SUPPORT help This option specifies support for the AM335x @@ -225,16 +225,16 @@ config TARGET_AM43XX_EVM imply SPL_ENV_SUPPORT imply SPL_FS_EXT4 imply SPL_FS_FAT - imply SPL_GPIO_SUPPORT - imply SPL_I2C_SUPPORT + imply SPL_GPIO + imply SPL_I2C imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBDISK_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT imply SPL_NAND_SUPPORT - imply SPL_POWER_SUPPORT + imply SPL_POWER imply SPL_SERIAL_SUPPORT - imply SPL_WATCHDOG_SUPPORT + imply SPL_WATCHDOG imply SPL_YMODEM_SUPPORT help This option specifies support for the AM43xx diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 4bf0535e3c7..d390f2e1f3e 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -209,7 +209,7 @@ int cpu_mmc_init(struct bd_info *bis) #if (defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)) && \ (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \ (!CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)) && \ - (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW_SUPPORT)) + (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW)) static struct musb_hdrc_config musb_config = { .multipoint = 1, diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 1268a325038..7cdf7f15898 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -104,7 +104,7 @@ void save_omap_boot_params(void) sys_boot_device = 1; break; #endif -#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT) +#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH) case BOOT_DEVICE_CPGMAC: sys_boot_device = 1; break; @@ -202,10 +202,10 @@ void spl_board_init(void) #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT) gpmc_init(); #endif -#if defined(CONFIG_SPL_I2C_SUPPORT) && !CONFIG_IS_ENABLED(DM_I2C) +#if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C) i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); #endif -#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT) +#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW) arch_misc_init(); #endif #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 35bdef29fe6..b164afb5290 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -56,7 +56,7 @@ config ROCKCHIP_RK3188 select SPL_REGMAP select SPL_SYSCON select SPL_RAM - select SPL_DRIVERS_MISC_SUPPORT + select SPL_DRIVERS_MISC select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT @@ -82,7 +82,7 @@ config ROCKCHIP_RK322X select TPL_OF_LIBFDT select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL - select SPL_DRIVERS_MISC_SUPPORT + select SPL_DRIVERS_MISC imply ROCKCHIP_COMMON_BOARD imply SPL_SERIAL_SUPPORT imply SPL_ROCKCHIP_COMMON_BOARD @@ -108,7 +108,7 @@ config ROCKCHIP_RK3288 imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK imply TPL_DM - imply TPL_DRIVERS_MISC_SUPPORT + imply TPL_DRIVERS_MISC imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_NEEDS_SEPARATE_TEXT_BASE @@ -219,7 +219,7 @@ config ROCKCHIP_RK3399 select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_SEPARATE_BSS select SPL_SERIAL_SUPPORT - select SPL_DRIVERS_MISC_SUPPORT + select SPL_DRIVERS_MISC select CLK select FIT select PINCTRL @@ -238,7 +238,7 @@ config ROCKCHIP_RK3399 imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_SYS_MALLOC_SIMPLE - imply TPL_DRIVERS_MISC_SUPPORT + imply TPL_DRIVERS_MISC imply TPL_OF_CONTROL imply TPL_DM imply TPL_REGMAP diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 20a00c5be78..a5db59ae597 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -154,7 +154,7 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x2000 -config SPL_DRIVERS_MISC_SUPPORT +config SPL_DRIVERS_MISC default y config SPL_LIBCOMMON_SUPPORT diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 869d2159bea..311d7b13643 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -218,7 +218,7 @@ void spl_perform_fixups(struct spl_image_info *spl_image) "u-boot,spl-boot-device", boot_ofpath); } -#if defined(SPL_GPIO_SUPPORT) +#if defined(SPL_GPIO) static void rk3399_force_power_on_reset(void) { ofnode node; @@ -250,7 +250,7 @@ void spl_board_init(void) { led_setup(); -#if defined(SPL_GPIO_SUPPORT) +#if defined(SPL_GPIO) struct rockchip_cru *cru = rockchip_get_cru(); /* diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c index aaa561c2c68..985625a548e 100644 --- a/arch/arm/mach-snapdragon/misc.c +++ b/arch/arm/mach-snapdragon/misc.c @@ -47,7 +47,7 @@ void msm_generate_mac_addr(u8 *mac) mac[0] = 0x02; mac[1] = 00; for (i = 3; i >= 0; i--) { - mac[i + 2] = simple_strtoul(&sn[2 * i], NULL, 16); + mac[i + 2] = hextoul(&sn[2 * i], NULL); sn[2 * i] = 0; } } diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 64a7c9d652c..f8d3d48ee89 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -191,7 +191,7 @@ static int do_bridge(struct cmd_tbl *cmdtp, int flag, int argc, argv++; if (argc == 3) - mask = simple_strtoul(argv[1], NULL, 16); + mask = hextoul(argv[1], NULL); switch (*argv[0]) { case 'e': /* Enable */ diff --git a/arch/arm/mach-socfpga/vab.c b/arch/arm/mach-socfpga/vab.c index 85b3f302111..e146f2c5290 100644 --- a/arch/arm/mach-socfpga/vab.c +++ b/arch/arm/mach-socfpga/vab.c @@ -17,8 +17,8 @@ static int do_vab(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 3) return CMD_RET_USAGE; - addr = simple_strtoul(argv[1], NULL, 16); - len = simple_strtoul(argv[2], NULL, 16); + addr = hextoul(argv[1], NULL); + len = hextoul(argv[2], NULL); if (socfpga_vendor_authentication((void *)&addr, (size_t *)&len) != 0) return CMD_RET_FAILURE; diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index b42b05669a1..2f1e7d3a155 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -31,8 +31,8 @@ config STM32F7 select SPL_DM select SPL_DM_RESET select SPL_DM_SEQ_ALIAS - select SPL_DRIVERS_MISC_SUPPORT - select SPL_GPIO_SUPPORT + select SPL_DRIVERS_MISC + select SPL_GPIO select SPL_LIBCOMMON_SUPPORT select SPL_LIBGENERIC_SUPPORT select SPL_MTD_SUPPORT diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 0e599316795..ace07fd70f6 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -5,9 +5,9 @@ config SPL select SPL_CLK select SPL_DM select SPL_DM_SEQ_ALIAS - select SPL_DRIVERS_MISC_SUPPORT + select SPL_DRIVERS_MISC select SPL_FRAMEWORK - select SPL_GPIO_SUPPORT + select SPL_GPIO select SPL_LIBCOMMON_SUPPORT select SPL_LIBGENERIC_SUPPORT select SPL_OF_CONTROL @@ -17,7 +17,7 @@ config SPL select SPL_DM_RESET select SPL_SERIAL_SUPPORT select SPL_SYSCON - select SPL_WATCHDOG_SUPPORT if WATCHDOG + select SPL_WATCHDOG if WATCHDOG imply BOOTSTAGE_STASH if SPL_BOOTSTAGE imply SPL_BOOTSTAGE if BOOTSTAGE imply SPL_DISPLAY_PRINT diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index aa39867080d..879c1961fef 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -10,6 +10,7 @@ obj-y += bsec.o ifdef CONFIG_SPL_BUILD obj-y += spl.o +obj-y += tzc400.o else obj-y += cmd_stm32prog/ obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 50840b0f38b..68f28922d1e 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -162,7 +162,7 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con return CMD_RET_SUCCESS; } - addr = simple_strtoul(argv[1], NULL, 16); + addr = hextoul(argv[1], NULL); if (!addr) return CMD_RET_USAGE; @@ -185,7 +185,7 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con yes = true; } - addr = simple_strtoul(argv[argc - 1], NULL, 16); + addr = hextoul(argv[argc - 1], NULL); if (!addr) return CMD_RET_USAGE; diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index 064f51b2c7f..be53a529772 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -59,17 +59,17 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_USAGE; } - dev = (int)simple_strtoul(argv[2], NULL, 10); + dev = (int)dectoul(argv[2], NULL); addr = STM32_DDR_BASE; size = 0; if (argc > 3) { - addr = simple_strtoul(argv[3], NULL, 16); + addr = hextoul(argv[3], NULL); if (!addr) return CMD_RET_FAILURE; } if (argc > 4) - size = simple_strtoul(argv[4], NULL, 16); + size = hextoul(argv[4], NULL); /* check STM32IMAGE presence */ if (size == 0) { diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index 96ebc6d9783..26fe8b654a7 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -253,7 +253,7 @@ static int parse_type(struct stm32prog_data *data, result = -EINVAL; else part->bin_nb = - simple_strtoul(&p[7], NULL, 10); + dectoul(&p[7], NULL); } } else if (!strcmp(p, "System")) { part->part_type = PART_SYSTEM; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index f6ed2ce0e4d..eb79f3ffd2c 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -556,7 +556,9 @@ static void setup_boot_mode(void) env_set("boot_instance", "0"); break; default: - log_debug("unexpected boot mode = %x\n", boot_mode); + env_set("boot_device", "invalid"); + env_set("boot_instance", ""); + log_err("unexpected boot mode = %x\n", boot_mode); break; } diff --git a/arch/arm/mach-stm32mp/include/mach/tzc.h b/arch/arm/mach-stm32mp/include/mach/tzc.h new file mode 100644 index 00000000000..16db55c4645 --- /dev/null +++ b/arch/arm/mach-stm32mp/include/mach/tzc.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Simple API for configuring TrustZone memory regions + * + * The premise is that the desired TZC layout is known beforehand, and it can + * be configured in one step. tzc_configure() provides this functionality. + */ +#ifndef MACH_TZC_H +#define MACH_TZC_H + +#include <linux/types.h> + +enum tzc_sec_mode { + TZC_ATTR_SEC_NONE = 0, + TZC_ATTR_SEC_R = 1, + TZC_ATTR_SEC_W = 2, + TZC_ATTR_SEC_RW = 3 +}; + +struct tzc_region { + uintptr_t base; + uintptr_t top; + enum tzc_sec_mode sec_mode; + uint16_t nsec_id; + uint16_t filters_mask; +}; + +int tzc_configure(uintptr_t tzc, const struct tzc_region *cfg); +int tzc_disable_filters(uintptr_t tzc, uint16_t filters_mask); +int tzc_enable_filters(uintptr_t tzc, uint16_t filters_mask); +void tzc_dump_config(uintptr_t tzc); + +#endif /* MACH_TZC_H */ diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index b53659a698a..405eff68a3b 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -11,11 +11,13 @@ #include <hang.h> #include <init.h> #include <log.h> +#include <ram.h> #include <spl.h> #include <asm/cache.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <mach/tzc.h> #include <linux/libfdt.h> u32 spl_boot_device(void) @@ -92,6 +94,96 @@ __weak int board_early_init_f(void) return 0; } +uint32_t stm32mp_get_dram_size(void) +{ + struct ram_info ram; + struct udevice *dev; + int ret; + + if (uclass_get_device(UCLASS_RAM, 0, &dev)) + return 0; + + ret = ram_get_info(dev, &ram); + if (ret) + return 0; + + return ram.size; +} + +static int optee_get_reserved_memory(uint32_t *start, uint32_t *size) +{ + phys_size_t fdt_mem_size; + fdt_addr_t fdt_start; + ofnode node; + + node = ofnode_path("/reserved-memory/optee"); + if (!ofnode_valid(node)) + return 0; + + fdt_start = ofnode_get_addr_size(node, "reg", &fdt_mem_size); + *start = fdt_start; + *size = fdt_mem_size; + return (fdt_start < 0) ? fdt_start : 0; +} + +#define CFG_SHMEM_SIZE 0x200000 +#define STM32_TZC_NSID_ALL 0xffff +#define STM32_TZC_FILTER_ALL 3 + +void stm32_init_tzc_for_optee(void) +{ + const uint32_t dram_size = stm32mp_get_dram_size(); + const uintptr_t dram_top = STM32_DDR_BASE + (dram_size - 1); + uint32_t optee_base, optee_size, tee_shmem_base; + const uintptr_t tzc = STM32_TZC_BASE; + int ret; + + if (dram_size == 0) + panic("Cannot determine DRAM size from devicetree\n"); + + ret = optee_get_reserved_memory(&optee_base, &optee_size); + if (ret < 0 || optee_size <= CFG_SHMEM_SIZE) + panic("Invalid OPTEE reserved memory in devicetree\n"); + + tee_shmem_base = optee_base + optee_size - CFG_SHMEM_SIZE; + + const struct tzc_region optee_config[] = { + { + .base = STM32_DDR_BASE, + .top = optee_base - 1, + .sec_mode = TZC_ATTR_SEC_NONE, + .nsec_id = STM32_TZC_NSID_ALL, + .filters_mask = STM32_TZC_FILTER_ALL, + }, { + .base = optee_base, + .top = tee_shmem_base - 1, + .sec_mode = TZC_ATTR_SEC_RW, + .nsec_id = 0, + .filters_mask = STM32_TZC_FILTER_ALL, + }, { + .base = tee_shmem_base, + .top = dram_top, + .sec_mode = TZC_ATTR_SEC_NONE, + .nsec_id = STM32_TZC_NSID_ALL, + .filters_mask = STM32_TZC_FILTER_ALL, + }, { + .top = 0, + } + }; + + flush_dcache_all(); + + tzc_configure(tzc, optee_config); + tzc_dump_config(tzc); + + dcache_disable(); +} + +void spl_board_prepare_for_optee(void *fdt) +{ + stm32_init_tzc_for_optee(); +} + void board_init_f(ulong dummy) { struct udevice *dev; diff --git a/arch/arm/mach-stm32mp/tzc400.c b/arch/arm/mach-stm32mp/tzc400.c new file mode 100644 index 00000000000..cdc4a40edaf --- /dev/null +++ b/arch/arm/mach-stm32mp/tzc400.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Simple API for configuring TrustZone memory restrictions for TZC400 + */ + +#define LOG_CATEGORY LOGC_ARCH + +#include <linux/iopoll.h> +#include <mach/tzc.h> + +#define TZC_TIMEOUT_US 100 + +#define TZC_BUILD_CONFIG 0x00 +#define TZC_ACTION 0x04 +#define TZC_ACTION_NONE 0 +#define TZC_ACTION_ERR 1 +#define TZC_ACTION_INT 2 +#define TZC_ACTION_INT_ERR 3 +#define TZC_GATE_KEEPER 0x08 + +#define TZC_REGION0_OFFSET 0x100 +#define TZC_REGION_CFG_SIZE 0x20 +#define TZC_REGION1_OFFSET 0x120 +#define TZC_REGION_BASE 0x00 +#define TZC_REGION_TOP 0x08 +#define TZC_REGION_ATTRIBUTE 0x10 +#define TZC_REGION_ACCESS 0x14 + +static uint32_t tzc_read(uintptr_t tzc, size_t reg) +{ + return readl(tzc + reg); +} + +static void tzc_write(uintptr_t tzc, size_t reg, uint32_t val) +{ + writel(val, tzc + reg); +} + +static uint16_t tzc_config_get_active_filters(const struct tzc_region *cfg) +{ + uint16_t active_filters = 0; + + for ( ; cfg->top != 0; cfg++) + active_filters |= cfg->filters_mask; + + return active_filters; +} + +int tzc_configure(uintptr_t tzc, const struct tzc_region *cfg) +{ + uintptr_t region = tzc + TZC_REGION1_OFFSET; + uint32_t nsid, attr_reg, active_filters; + int ret; + + active_filters = tzc_config_get_active_filters(cfg); + if (active_filters == 0) + return -EINVAL; + + ret = tzc_disable_filters(tzc, active_filters); + if (ret < 0) + return ret; + + for ( ; cfg->top != 0; cfg++, region += TZC_REGION_CFG_SIZE) { + attr_reg = (cfg->sec_mode & 0x03) << 30; + attr_reg |= (cfg->filters_mask & 0x03) << 0; + nsid = cfg->nsec_id & 0xffff; + nsid |= nsid << 16; + + tzc_write(region, TZC_REGION_BASE, cfg->base); + tzc_write(region, TZC_REGION_TOP, cfg->top); + tzc_write(region, TZC_REGION_ACCESS, nsid); + tzc_write(region, TZC_REGION_ATTRIBUTE, attr_reg); + } + + tzc_write(tzc, TZC_ACTION, TZC_ACTION_ERR); + return tzc_enable_filters(tzc, active_filters); +} + +int tzc_disable_filters(uintptr_t tzc, uint16_t filters_mask) +{ + uint32_t gate = tzc_read(tzc, TZC_GATE_KEEPER); + uint32_t filter_status = filters_mask << 16; + + gate &= ~filters_mask; + tzc_write(tzc, TZC_GATE_KEEPER, gate); + + return readl_poll_timeout(tzc + TZC_GATE_KEEPER, gate, + (gate & filter_status) == 0, TZC_TIMEOUT_US); +} + +int tzc_enable_filters(uintptr_t tzc, uint16_t filters_mask) +{ + uint32_t gate = tzc_read(tzc, TZC_GATE_KEEPER); + uint32_t filter_status = filters_mask << 16; + + gate |= filters_mask; + tzc_write(tzc, TZC_GATE_KEEPER, gate); + + return readl_poll_timeout(tzc + TZC_GATE_KEEPER, gate, + (gate & filter_status) == filter_status, + TZC_TIMEOUT_US); +} + +static const char *sec_access_str_from_attr(uint32_t attr) +{ + const char *const sec_mode[] = { "none", "RO ", "WO ", "RW " }; + + return sec_mode[(attr >> 30) & 0x03]; +} + +void tzc_dump_config(uintptr_t tzc) +{ + uint32_t build_config, base, top, attr, nsaid; + int num_regions, i; + uintptr_t region; + + build_config = tzc_read(tzc, TZC_BUILD_CONFIG); + num_regions = ((build_config >> 0) & 0x1f) + 1; + + for (i = 0; i < num_regions; i++) { + region = tzc + TZC_REGION0_OFFSET + i * TZC_REGION_CFG_SIZE; + + base = tzc_read(region, TZC_REGION_BASE); + top = tzc_read(region, TZC_REGION_TOP); + attr = tzc_read(region, TZC_REGION_ATTRIBUTE); + nsaid = tzc_read(region, TZC_REGION_ACCESS); + + if (attr == 0 && nsaid == 0) + continue; + + log_info("TZC region %u: %08x->%08x - filters 0x%x\n", + i, base, top, (attr >> 0) & 0xf); + log_info("\t Secure access %s NSAID %08x\n", + sec_access_str_from_attr(attr), nsaid); + } +} diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index e979e426dd1..d9b04f75fc4 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -339,7 +339,7 @@ void board_init_f(ulong dummy) spl_init(); preloader_console_init(); -#ifdef CONFIG_SPL_I2C_SUPPORT +#ifdef CONFIG_SPL_I2C /* Needed early by sunxi_board_init if PMU is enabled */ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index a397748b72b..478c7a9e388 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -1,6 +1,6 @@ if ARCH_TEGRA -config SPL_GPIO_SUPPORT +config SPL_GPIO default y config SPL_LIBCOMMON_SUPPORT diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index b33c4b19389..b5356ed87e7 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -66,7 +66,7 @@ static void uniphier_set_env_addr(const char *env, const char *offset_env) if (!str) goto fail; - offset = simple_strtoul(str, &end, 16); + offset = hextoul(str, &end); if (*end) goto fail; } diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 74783ae5a78..704520e7a3c 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -252,7 +252,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) return 1; } - u32 boot_addr = simple_strtoul(argv[0], NULL, 16); + u32 boot_addr = hextoul(argv[0], NULL); u32 boot_addr_uniq = 0; if (!(boot_addr == ZYNQMP_R5_LOVEC_ADDR || boot_addr == ZYNQMP_R5_HIVEC_ADDR)) { diff --git a/arch/mips/mach-octeon/bootoctlinux.c b/arch/mips/mach-octeon/bootoctlinux.c index c195dc28ad7..349da08da6d 100644 --- a/arch/mips/mach-octeon/bootoctlinux.c +++ b/arch/mips/mach-octeon/bootoctlinux.c @@ -281,8 +281,7 @@ int octeon_parse_bootopts(int argc, char *const argv[], } else if (!strncmp(argv[arg], "forceboot", 9)) { boot_args->forceboot = true; } else if (!strncmp(argv[arg], "nodemask=", 9)) { - boot_args->node_mask = simple_strtoul(argv[arg] + 9, - NULL, 16); + boot_args->node_mask = hextoul(argv[arg] + 9, NULL); } else if (!strncmp(argv[arg], "numcores=", 9)) { memset(node_values, 0, sizeof(node_values)); num_values = octeon_parse_nodes(node_values, @@ -383,7 +382,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, argv[1][1] == 'x' || argv[1][1] == 'X' || argv[1][1] == '\0'))) { - addr = simple_strtoul(argv[1], NULL, 16); + addr = hextoul(argv[1], NULL); if (!addr) addr = CONFIG_SYS_LOAD_ADDR; arg_start++; diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c index b3b8bc29037..4cb0f530ae1 100644 --- a/arch/nds32/lib/bootm.c +++ b/arch/nds32/lib/bootm.c @@ -64,7 +64,7 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) s = env_get("machid"); if (s) { - machid = simple_strtoul(s, NULL, 16); + machid = hextoul(s, NULL); printf("Using machid 0x%x from environment\n", machid); } diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c index 2c8f9731c74..50374671515 100644 --- a/arch/nios2/lib/bootm.c +++ b/arch/nios2/lib/bootm.c @@ -27,7 +27,7 @@ int do_bootm_linux(int flag, int argc, char *const argv[], of_flat_tree = images->ft_addr; #endif if (!of_flat_tree && argc > 1) - of_flat_tree = (char *)simple_strtoul(argv[1], NULL, 16); + of_flat_tree = (char *)hextoul(argv[1], NULL); if (of_flat_tree) initrd_end = (ulong)of_flat_tree; diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 1d5704848ae..083febe5bb3 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -122,7 +122,7 @@ config MPC83XX_SDHC_SUPPORT config MPC83XX_SATA_SUPPORT bool -config MPC83XX_SECOND_I2C_SUPPORT +config MPC83XX_SECOND_I2C bool config MPC83XX_LDP_PIN @@ -138,14 +138,14 @@ config ARCH_MPC8308 select MPC83XX_TSEC1_SUPPORT select MPC83XX_TSEC2_SUPPORT select MPC83XX_PCIE1_SUPPORT - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C config ARCH_MPC8309 bool select ARCH_MPC830X select MPC83XX_QUICC_ENGINE select MPC83XX_PCI_SUPPORT - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C select SYS_FSL_ERRATUM_ESDHC111 select FSL_ELBC @@ -158,7 +158,7 @@ config ARCH_MPC831X config ARCH_MPC8313 bool select ARCH_MPC831X - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C select FSL_ELBC config ARCH_MPC832X @@ -176,14 +176,14 @@ config ARCH_MPC8349 select MPC83XX_TSEC1_SUPPORT select MPC83XX_TSEC2_SUPPORT select MPC83XX_LDP_PIN - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C config ARCH_MPC8360 bool select MPC83XX_QUICC_ENGINE select MPC83XX_PCI_SUPPORT select MPC83XX_LDP_PIN - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C config ARCH_MPC837X bool @@ -195,7 +195,7 @@ config ARCH_MPC837X select MPC83XX_SDHC_SUPPORT select MPC83XX_SATA_SUPPORT select MPC83XX_LDP_PIN - select MPC83XX_SECOND_I2C_SUPPORT + select MPC83XX_SECOND_I2C select FSL_ELBC config SYS_IMMR diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c index 1343dd3d3a3..7a8ec7f42f1 100644 --- a/arch/powerpc/cpu/mpc83xx/ecc.c +++ b/arch/powerpc/cpu/mpc83xx/ecc.c @@ -138,7 +138,7 @@ int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } if (argc == 3) { if (strcmp(argv[1], "sbecnt") == 0) { - val = simple_strtoul(argv[2], NULL, 10); + val = dectoul(argv[2], NULL); if (val > 255) { printf("Incorrect Counter value, " "should be 0..255\n"); @@ -151,7 +151,7 @@ int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) ddr->err_sbe = val; return 0; } else if (strcmp(argv[1], "sbethr") == 0) { - val = simple_strtoul(argv[2], NULL, 10); + val = dectoul(argv[2], NULL); if (val > 255) { printf("Incorrect Counter value, " "should be 0..255\n"); @@ -219,17 +219,17 @@ int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) ddr->err_detect = val; return 0; } else if (strcmp(argv[1], "injectdatahi") == 0) { - val = simple_strtoul(argv[2], NULL, 16); + val = hextoul(argv[2], NULL); ddr->data_err_inject_hi = val; return 0; } else if (strcmp(argv[1], "injectdatalo") == 0) { - val = simple_strtoul(argv[2], NULL, 16); + val = hextoul(argv[2], NULL); ddr->data_err_inject_lo = val; return 0; } else if (strcmp(argv[1], "injectecc") == 0) { - val = simple_strtoul(argv[2], NULL, 16); + val = hextoul(argv[2], NULL); if (val > 0xff) { printf("Incorrect ECC inject mask, " "should be 0x00..0xff\n"); @@ -269,8 +269,8 @@ int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } if (argc == 4) { if (strcmp(argv[1], "testdw") == 0) { - addr = (u64 *) simple_strtoul(argv[2], NULL, 16); - count = simple_strtoul(argv[3], NULL, 16); + addr = (u64 *)hextoul(argv[2], NULL); + count = hextoul(argv[3], NULL); if ((u32) addr % 8) { printf("Address not aligned on " @@ -308,8 +308,8 @@ int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } if (strcmp(argv[1], "testword") == 0) { - addr = (u64 *) simple_strtoul(argv[2], NULL, 16); - count = simple_strtoul(argv[3], NULL, 16); + addr = (u64 *)hextoul(argv[2], NULL); + count = hextoul(argv[3], NULL); if ((u32) addr % 8) { printf("Address not aligned on " diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 653efe09f93..b1b002c9002 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -167,7 +167,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) for (i = 1; i < 3; i++) { if (argv[i][0] != '-') { u8 entry = boot_entry_map[i]; - val = simple_strtoul(argv[i], NULL, 16); + val = hextoul(argv[i], NULL); table[entry] = val; } } diff --git a/arch/riscv/cpu/fu740/Kconfig b/arch/riscv/cpu/fu740/Kconfig index 8e54310b9cb..408195f1497 100644 --- a/arch/riscv/cpu/fu740/Kconfig +++ b/arch/riscv/cpu/fu740/Kconfig @@ -37,4 +37,4 @@ config SIFIVE_FU740 imply PWM_SIFIVE imply DM_I2C imply SYS_I2C_OCORES - imply SPL_I2C_SUPPORT + imply SPL_I2C diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 777db4e9522..a74f5ec7ba0 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -400,6 +400,15 @@ static int sandbox_cmdline_cb_signals(struct sandbox_state *state, SANDBOX_CMDLINE_OPT_SHORT(signals, 'S', 0, "Handle signals (such as SIGSEGV) in sandbox"); +static int sandbox_cmdline_cb_autoboot_keyed(struct sandbox_state *state, + const char *arg) +{ + state->autoboot_keyed = true; + + return 0; +} +SANDBOX_CMDLINE_OPT(autoboot_keyed, 0, "Allow keyed autoboot"); + static void setup_ram_buf(struct sandbox_state *state) { /* Zero the RAM buffer if we didn't read it, to keep valgrind happy */ diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index a4d99bade41..4e822538baf 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <autoboot.h> #include <bloblist.h> #include <errno.h> #include <fdtdec.h> @@ -378,6 +379,23 @@ void state_reset_for_test(struct sandbox_state *state) state->next_tag = state->ram_size; } +bool autoboot_keyed(void) +{ + struct sandbox_state *state = state_get_current(); + + return IS_ENABLED(CONFIG_AUTOBOOT_KEYED) && state->autoboot_keyed; +} + +bool autoboot_set_keyed(bool autoboot_keyed) +{ + struct sandbox_state *state = state_get_current(); + bool old_val = state->autoboot_keyed; + + state->autoboot_keyed = autoboot_keyed; + + return old_val; +} + int state_init(void) { state = &main_state; diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 31db50db352..200fcab6a41 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -231,6 +231,7 @@ boolval; intval = <1>; intarray = <2 3 4>; + maybe-empty-int = <>; byteval = [05]; bytearray = [06]; longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11]; @@ -254,6 +255,7 @@ u-boot,dm-pre-reloc; compatible = "sandbox,spl-test"; stringarray = "one"; + maybe-empty-int = <1>; }; spl-test5 { diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 1c4c571e28d..10352a587e4 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -94,6 +94,7 @@ struct sandbox_state { bool run_unittests; /* Run unit tests */ const char *select_unittests; /* Unit test to run */ bool handle_signals; /* Handle signals within sandbox */ + bool autoboot_keyed; /* Use keyed-autoboot feature */ /* Pointer to information for each SPI bus/cs */ struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS] diff --git a/arch/sh/lib/zimageboot.c b/arch/sh/lib/zimageboot.c index c38f0933f89..c2e285ff0f6 100644 --- a/arch/sh/lib/zimageboot.c +++ b/arch/sh/lib/zimageboot.c @@ -37,11 +37,12 @@ int do_sh_zimageboot(struct cmd_tbl *cmdtp, int flag, int argc, } if (s0) - zboot_entry = (ulong (*)(int, char * const []))simple_strtoul(s0, NULL, 16); + zboot_entry = (ulong (*)(int, char * const []))hextoul(s0, + NULL); /* empty_zero_page */ if (s1) - param = (unsigned char*)simple_strtoul(s1, NULL, 16); + param = (unsigned char *)hextoul(s1, NULL); /* Linux kernel command line */ cmdline = (char *)param + COMMAND_LINE; diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 970bdff37fb..300b48505e4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -364,7 +364,6 @@ config HAVE_FSP depends on !EFI select USE_HOB select HAS_ROM - select ROM_NEEDS_BLOBS help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -525,7 +524,6 @@ config ENABLE_MRC_CACHE config HAVE_MRC bool "Add a System Agent binary" select HAS_ROM - select ROM_NEEDS_BLOBS depends on !HAVE_FSP help Select this option to add a System Agent binary to diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 166aff380c6..260a0080930 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -26,6 +26,7 @@ #include <asm/mp.h> #include <asm/msr.h> #include <asm/mtrr.h> +#include <linux/log2.h> DECLARE_GLOBAL_DATA_PTR; @@ -155,12 +156,8 @@ int mtrr_commit(bool do_caches) debug("open done\n"); qsort(req, gd->arch.mtrr_req_count, sizeof(*req), h_comp_mtrr); for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) - set_var_mtrr(i, req->type, req->start, req->size); + mtrr_set_next_var(req->type, req->start, req->size); - /* Clear the ones that are unused */ - debug("clear\n"); - for (; i < mtrr_get_var_count(); i++) - wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); debug("close\n"); mtrr_close(&state, do_caches); debug("mtrr done\n"); @@ -183,6 +180,9 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) if (!gd->arch.has_mtrr) return -ENOSYS; + if (!is_power_of_2(size)) + return -EINVAL; + if (gd->arch.mtrr_req_count == MAX_MTRR_REQUESTS) return -ENOSPC; req = &gd->arch.mtrr_req[gd->arch.mtrr_req_count++]; @@ -227,6 +227,9 @@ int mtrr_set_next_var(uint type, uint64_t start, uint64_t size) { int mtrr; + if (!is_power_of_2(size)) + return -EINVAL; + mtrr = get_free_var_mtrr(); if (mtrr < 0) return mtrr; diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 2fee38aed79..61bb5792c86 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -24,7 +24,6 @@ if INTEL_QUARK config HAVE_RMU bool "Add a Remote Management Unit (RMU) binary" - select ROM_NEEDS_BLOBS help Select this option to add a Remote Management Unit (RMU) binary to the resulting U-Boot image. It is a data block (up to 64K) of @@ -131,8 +130,8 @@ config SYS_CAR_SIZE Space in bytes in eSRAM used as Cache-As-ARM (CAR). Note this size must not exceed eSRAM's total size. -config X86_TSC_TIMER_EARLY_FREQ +config X86_TSC_TIMER_FREQ int - default 400 + default 400000000 endif diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 782ed863fe7..4a008622d19 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -18,19 +18,17 @@ static int __maybe_unused disable_igd(void) { - struct udevice *igd, *sdvo; + struct udevice *igd = NULL; + struct udevice *sdvo = NULL; int ret; - ret = dm_pci_bus_find_bdf(TNC_IGD, &igd); - if (ret) - return ret; - if (!igd) - return 0; - - ret = dm_pci_bus_find_bdf(TNC_SDVO, &sdvo); - if (ret) - return ret; - if (!sdvo) + /* + * In case the IGD and SDVO devices were already in disabled state, + * we should return and not proceed any further. + */ + dm_pci_bus_find_bdf(TNC_IGD, &igd); + dm_pci_bus_find_bdf(TNC_SDVO, &sdvo); + if (!igd || !sdvo) return 0; /* diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 41bd177e095..82f4ce5a34a 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -89,8 +89,8 @@ static u32 acpi_fill_csrt_dma(struct acpi_csrt_group *grp) si->mmio_base_low = 0xff192000; si->mmio_base_high = 0; si->gsi_interrupt = 32; - si->interrupt_polarity = 1; - si->interrupt_mode = 0; + si->interrupt_polarity = 0; /* Active High */ + si->interrupt_mode = 0; /* Level triggered */ si->num_channels = 8; si->dma_address_width = 32; si->base_request_line = 0; diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 70e57984031..b92729dd0b0 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -176,6 +176,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "winbond,w25q64dw", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index a7dc03b6458..e9b56de7927 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -200,6 +200,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "macronix,mx25l6405d", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 2ce7f1aa91a..7a273670bde 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -12,8 +12,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -149,6 +149,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "macronix,mx25u6435f", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 66c31efb6cd..f0caaacfee2 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -8,7 +8,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" #if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" @@ -362,6 +363,7 @@ u-boot,dm-pre-proper; u-boot,dm-spl; reg = <0>; + m25p,fast-read; compatible = "winbond,w25q128fw", "jedec,spi-nor"; rw-mrc-cache { diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index e529c4b63e0..11ff520ac2a 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -9,8 +9,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -430,6 +430,7 @@ #address-cells = <1>; u-boot,dm-pre-reloc; reg = <0>; + m25p,fast-read; compatible = "winbond,w25q64", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index ad35ab2e3fd..930ec1ace0e 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -7,8 +7,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" #if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) @@ -594,6 +594,7 @@ #size-cells = <1>; #address-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "winbond,w25q64", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index 77b6ac9ab96..b25f759c79d 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -4,8 +4,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -48,6 +48,7 @@ #size-cells = <1>; #address-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "winbond,w25q64", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index bbea99da2c9..705157ceaa3 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -187,6 +187,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "stmicro,n25q064a", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index 38ddaafa198..d21978d6e09 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -12,7 +12,8 @@ /include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "coreboot x86 payload"; @@ -30,10 +31,6 @@ stdout-path = "/serial"; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index 602523333e3..58395b5eb6b 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -12,8 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -156,6 +156,7 @@ spi-flash@0 { reg = <0>; + m25p,fast-read; compatible = "winbond,w25q64bv", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; }; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index a7166a97491..57683525312 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -13,8 +13,8 @@ /include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index 7d7b8357d92..dff2345d60d 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -198,6 +198,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "stmicro,n25q064a", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index 8d245bffc2f..64b62283637 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -10,8 +10,8 @@ /include/ "skeleton.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/efi-x86_app.dts b/arch/x86/dts/efi-x86_app.dts index 20150f6ede4..04e044a07a8 100644 --- a/arch/x86/dts/efi-x86_app.dts +++ b/arch/x86/dts/efi-x86_app.dts @@ -6,7 +6,8 @@ /dts-v1/; /include/ "skeleton.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "EFI x86 Application"; @@ -16,10 +17,6 @@ stdout-path = &serial; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - serial: serial { compatible = "efi,uart"; }; diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts index 5ccb9867749..087865f2256 100644 --- a/arch/x86/dts/efi-x86_payload.dts +++ b/arch/x86/dts/efi-x86_payload.dts @@ -12,7 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "EFI x86 Payload"; @@ -30,10 +31,6 @@ stdout-path = "/serial"; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 501047124ee..4120e8f5c46 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -11,7 +11,8 @@ /include/ "skeleton.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "Intel Galileo"; @@ -41,10 +42,6 @@ }; }; - tsc-timer { - clock-frequency = <400000000>; - }; - mrc { compatible = "intel,quark-mrc"; flags = <MRC_FLAG_SCRAMBLE_EN>; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 133d55bc20f..68e0510c68d 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -13,8 +13,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -200,6 +200,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; + m25p,fast-read; compatible = "stmicro,n25q064a", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts index c33a11d593f..6556e9ebcd8 100644 --- a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -12,8 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -42,10 +42,6 @@ }; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; #address-cells = <3>; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index 9faae7fb569..d0830892e83 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -22,8 +22,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -53,10 +53,6 @@ }; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; #address-cells = <3>; diff --git a/arch/x86/dts/slimbootloader.dts b/arch/x86/dts/slimbootloader.dts index d04095c4f8e..9b581c8489b 100644 --- a/arch/x86/dts/slimbootloader.dts +++ b/arch/x86/dts/slimbootloader.dts @@ -7,7 +7,7 @@ /include/ "skeleton.dtsi" /include/ "reset.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" / { model = "slimbootloader x86 payload"; diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi index 4f5021d96fe..4df8e9d7fcf 100644 --- a/arch/x86/dts/tsc_timer.dtsi +++ b/arch/x86/dts/tsc_timer.dtsi @@ -1,6 +1,7 @@ / { tsc-timer { compatible = "x86,tsc-timer"; + clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>; u-boot,dm-pre-reloc; }; }; diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 384672e93fb..d1aa86bf1d0 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -119,7 +119,7 @@ void mtrr_close(struct mtrr_state *state, bool do_caches); * * @type: Requested type (MTRR_TYPE_) * @start: Start address - * @size: Size + * @size: Size, must be power of 2 * * @return: 0 on success, non-zero on failure */ @@ -144,8 +144,9 @@ int mtrr_commit(bool do_caches); * * @type: Requested type (MTRR_TYPE_) * @start: Start address - * @size: Size - * @return 0 on success, -ENOSPC if there are no more MTRRs + * @size: Size, must be power of 2 + * @return 0 on success, -EINVAL if size is not power of 2, + * -ENOSPC if there are no more MTRRs */ int mtrr_set_next_var(uint type, uint64_t base, uint64_t size); diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index 6365b0a50a7..82f7d3ab5f0 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -61,22 +61,6 @@ void board_final_init(void) debug("OK\n"); } -void board_final_cleanup(void) -{ - u32 status; - - /* TODO(sjg@chromium.org): This causes Linux to crash */ - return; - - /* call into FspNotify */ - debug("Calling into FSP (notify phase INIT_PHASE_END_FIRMWARE): "); - status = fsp_notify(NULL, INIT_PHASE_END_FIRMWARE); - if (status) - debug("fail, error code %x\n", status); - else - debug("OK\n"); -} - int fsp_save_s3_stack(void) { struct udevice *dev; diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 8ad9aeedac0..2bd408d0c56 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -48,12 +48,28 @@ int dram_init_banksize(void) phys_addr_t mtrr_top; phys_addr_t low_end; uint bank; + bool update_mtrr; + + /* + * For FSP1, the system memory and reserved memory used by FSP are + * already programmed in the MTRR by FSP. Also it is observed that + * FSP on Intel Queensbay platform reports the TSEG memory range + * that has the same RES_MEM_RESERVED resource type whose address + * is programmed by FSP to be near the top of 4 GiB space, which is + * not what we want for DRAM. + * + * However it seems FSP2's behavior is different. We need to add the + * DRAM range in MTRR otherwise the boot process goes very slowly, + * which was observed on Chrromebook Coral with FSP2. + */ + update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2); if (!ll_boot_init()) { gd->bd->bi_dram[0].start = 0; gd->bd->bi_dram[0].size = gd->ram_size; - mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size); + if (update_mtrr) + mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size); return 0; } @@ -76,8 +92,10 @@ int dram_init_banksize(void) } else { gd->bd->bi_dram[bank].start = res_desc->phys_start; gd->bd->bi_dram[bank].size = res_desc->len; - mtrr_add_request(MTRR_TYPE_WRBACK, res_desc->phys_start, - res_desc->len); + if (update_mtrr) + mtrr_add_request(MTRR_TYPE_WRBACK, + res_desc->phys_start, + res_desc->len); log_debug("ram %llx %llx\n", gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size); @@ -92,7 +110,8 @@ int dram_init_banksize(void) * Set up an MTRR to the top of low, reserved memory. This is necessary * for graphics to run at full speed in U-Boot. */ - mtrr_add_request(MTRR_TYPE_WRBACK, 0, mtrr_top); + if (update_mtrr) + mtrr_add_request(MTRR_TYPE_WRBACK, 0, mtrr_top); return 0; } diff --git a/arch/x86/lib/fsp2/fsp_common.c b/arch/x86/lib/fsp2/fsp_common.c index f69456e43a2..20c3f6406ad 100644 --- a/arch/x86/lib/fsp2/fsp_common.c +++ b/arch/x86/lib/fsp2/fsp_common.c @@ -6,8 +6,25 @@ #include <common.h> #include <init.h> +#include <asm/fsp/fsp_support.h> int arch_fsp_init(void) { return 0; } + +void board_final_cleanup(void) +{ + u32 status; + + /* TODO(sjg@chromium.org): This causes Linux to crash */ + return; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_END_FIRMWARE): "); + status = fsp_notify(NULL, INIT_PHASE_END_FIRMWARE); + if (status) + debug("fail, error code %x\n", status); + else + debug("OK\n"); +} diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index cf4210cd4ba..9938c80a42b 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -405,17 +405,17 @@ static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, } if (s) - state.bzimage_addr = simple_strtoul(s, NULL, 16); + state.bzimage_addr = hextoul(s, NULL); if (argc >= 3) { /* argv[2] holds the size of the bzImage */ - state.bzimage_size = simple_strtoul(argv[2], NULL, 16); + state.bzimage_size = hextoul(argv[2], NULL); } if (argc >= 4) - state.initrd_addr = simple_strtoul(argv[3], NULL, 16); + state.initrd_addr = hextoul(argv[3], NULL); if (argc >= 5) - state.initrd_size = simple_strtoul(argv[4], NULL, 16); + state.initrd_size = hextoul(argv[4], NULL); if (argc >= 6) { /* * When the base_ptr is passed in, we assume that the image is @@ -428,7 +428,7 @@ static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, * load address and set bzimage_addr to 0 so we know that it * cannot be proceesed (or processed again). */ - state.base_ptr = (void *)simple_strtoul(argv[5], NULL, 16); + state.base_ptr = (void *)hextoul(argv[5], NULL); state.load_address = state.bzimage_addr; state.bzimage_addr = 0; } @@ -702,7 +702,7 @@ static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc, struct boot_params *base_ptr = state.base_ptr; if (argc > 1) - base_ptr = (void *)simple_strtoul(argv[1], NULL, 16); + base_ptr = (void *)hextoul(argv[1], NULL); if (!base_ptr) { printf("No zboot setup_base\n"); return CMD_RET_FAILURE; @@ -749,7 +749,7 @@ int do_zboot_parent(struct cmd_tbl *cmdtp, int flag, int argc, if (argc > 1) { char *endp; - simple_strtoul(argv[1], &endp, 16); + hextoul(argv[1], &endp); /* * endp pointing to nul means that argv[1] was just a valid * number, so pass it along to the normal processing |