diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/imx8mq-u-boot.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/r8a779g0-u-boot.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi | 22 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 1 | ||||
| -rw-r--r-- | arch/riscv/Kconfig | 14 | ||||
| -rw-r--r-- | arch/riscv/include/asm/bitops.h | 40 | ||||
| -rw-r--r-- | arch/riscv/lib/interrupts.c | 7 |
7 files changed, 61 insertions, 26 deletions
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index e1cd6f8996d..9b895a63857 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -111,6 +111,8 @@ #endif #address-cells = <1>; + offset = <0x57c00>; + images { uboot { arch = "arm64"; diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index cc8becac996..f60eba531e4 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -8,7 +8,6 @@ #include "r8a779x-u-boot.dtsi" &rpc { - reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; bank-width = <2>; num-cs = <1>; }; diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi index a102639010d..c3704d789e8 100644 --- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi @@ -13,29 +13,9 @@ }; }; -&pfc { - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; -}; - &rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <40000000>; - status = "disabled"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "s25fs512s", "jedec,spi-nor"; - reg = <0>; + flash@0 { spi-tx-bus-width = <1>; spi-rx-bus-width = <1>; - spi-max-frequency = <40000000>; }; }; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 4a8328760eb..c1a1a333e6c 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -149,6 +149,7 @@ config TARGET_TURRIS_OMNIA select SPL_SYS_MALLOC_SIMPLE select SYS_I2C_MVTWSI select ATSHA204A + select I2C_EEPROM select ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING config TARGET_TURRIS_MOX diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fa3b016c527..876bec35bc1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -133,6 +133,7 @@ config FRAMEPOINTER config SPL_FRAMEPOINTER bool "Build SPL with frame pointer for stack unwinding" + depends on SPL help Choose this option to use the frame pointer so the stack can be unwound if needed. This is useful for tracing where faults came @@ -437,7 +438,20 @@ config AVAILABLE_HARTS If disable this, it will send IPI by CPUs node numbers of device tree. config SHOW_REGS + default y bool "Show registers on unhandled exception" + help + By default only the program counter and the return address register + are shown in crash dumps. Enable this symbol to show all registers in + main U-Boot. + +config SPL_SHOW_REGS + bool "In SPL show registers on unhandled exception" + depends on SPL + help + By default only the program counter and the return address register + are shown in crash dumps. Enable this symbol to show all registers in + SPL. config RISCV_PRIV_1_9 bool "Use version 1.9 of the RISC-V priviledged specification" diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h index 35f1368b837..2f2994c4ddc 100644 --- a/arch/riscv/include/asm/bitops.h +++ b/arch/riscv/include/asm/bitops.h @@ -138,6 +138,43 @@ static inline unsigned long ffz(unsigned long word) return k; } +static inline int find_next_zero_bit(void *addr, int size, int offset) +{ + unsigned long *p = ((unsigned long *)addr) + (offset / BITS_PER_LONG); + unsigned long result = offset & ~(BITS_PER_LONG - 1); + unsigned long tmp; + + if (offset >= size) + return size; + size -= result; + offset &= (BITS_PER_LONG - 1); + if (offset) { + tmp = *(p++); + tmp |= ~0UL >> (BITS_PER_LONG - offset); + if (size < BITS_PER_LONG) + goto found_first; + if (~tmp) + goto found_middle; + size -= BITS_PER_LONG; + result += BITS_PER_LONG; + } + while (size & ~(BITS_PER_LONG - 1)) { + tmp = *(p++); + if (~tmp) + goto found_middle; + result += BITS_PER_LONG; + size -= BITS_PER_LONG; + } + if (!size) + return result; + tmp = *p; + +found_first: + tmp |= ~0UL << size; +found_middle: + return result + ffz(tmp); +} + /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore @@ -158,6 +195,9 @@ static inline unsigned long ffz(unsigned long word) #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x) +#define find_first_zero_bit(addr, size) \ + find_next_zero_bit((addr), (size), 0) + #define test_and_set_bit __test_and_set_bit #define test_and_clear_bit __test_and_clear_bit diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index f9a1428a486..714cc92d03e 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -34,9 +34,8 @@ static void show_efi_loaded_images(uintptr_t epc) efi_print_image_infos((void *)epc); } -static void show_regs(struct pt_regs *regs) +static void __maybe_unused show_regs(struct pt_regs *regs) { -#ifdef CONFIG_SHOW_REGS printf("\nSP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n", regs->sp, regs->gp, regs->tp); printf("T0: " REG_FMT " T1: " REG_FMT " T2: " REG_FMT "\n", @@ -57,7 +56,6 @@ static void show_regs(struct pt_regs *regs) regs->s10, regs->s11, regs->t3); printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n", regs->t4, regs->t5, regs->t6); -#endif } static void __maybe_unused show_backtrace(struct pt_regs *regs) @@ -157,7 +155,8 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n", epc - gd->reloc_off, regs->ra - gd->reloc_off); - show_regs(regs); + if (CONFIG_IS_ENABLED(SHOW_REGS)) + show_regs(regs); if (CONFIG_IS_ENABLED(FRAMEPOINTER)) show_backtrace(regs); show_code(epc); |