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-rw-r--r--arch/arm/include/asm/global_data.h4
-rw-r--r--arch/arm/mach-imx/mx2/Kconfig7
-rw-r--r--arch/arm/mach-imx/mx5/Kconfig10
-rw-r--r--arch/arm/mach-imx/mx6/Kconfig6
-rw-r--r--arch/arm/mach-zynqmp/include/mach/hardware.h4
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig22
-rw-r--r--arch/powerpc/cpu/mpc85xx/Makefile1
-rw-r--r--arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c67
-rw-r--r--arch/powerpc/cpu/mpc85xx/speed.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/start.S33
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h10
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h9
-rw-r--r--arch/riscv/dts/k210-maix-bit.dts2
13 files changed, 11 insertions, 166 deletions
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 5a935d34e20..fba655f3b93 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -7,6 +7,8 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+#ifndef __ASSEMBLY__
+
#include <asm/types.h>
#include <linux/types.h>
@@ -125,4 +127,6 @@ static inline void set_gd(volatile gd_t *gd_ptr)
#endif
}
+#endif /* __ASSEMBLY__ */
+
#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/arm/mach-imx/mx2/Kconfig b/arch/arm/mach-imx/mx2/Kconfig
index 30a331ae43b..fad5dcc940a 100644
--- a/arch/arm/mach-imx/mx2/Kconfig
+++ b/arch/arm/mach-imx/mx2/Kconfig
@@ -8,12 +8,6 @@ choice
prompt "MX25 board select"
optional
-config TARGET_MX25PDK
- bool "Support mx25pdk"
- select BOARD_LATE_INIT
- select CPU_ARM926EJS
- select BOARD_EARLY_INIT_F
-
config TARGET_ZMX25
bool "Support zmx25"
select BOARD_LATE_INIT
@@ -24,7 +18,6 @@ endchoice
config SYS_SOC
default "mx25"
-source "board/freescale/mx25pdk/Kconfig"
source "board/syteco/zmx25/Kconfig"
endif
diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig
index bde37bb97e1..4ee7f6b2d42 100644
--- a/arch/arm/mach-imx/mx5/Kconfig
+++ b/arch/arm/mach-imx/mx5/Kconfig
@@ -44,10 +44,6 @@ config TARGET_MX51EVK
select BOARD_LATE_INIT
select MX51
-config TARGET_MX53ARD
- bool "Support mx53ard"
- select MX53
-
config TARGET_MX53CX9020
bool "Support CX9020"
select BOARD_LATE_INIT
@@ -72,10 +68,6 @@ config TARGET_MX53PPD
help
Enable support for the GE Healthcare PPD.
-config TARGET_MX53SMD
- bool "Support mx53smd"
- select MX53
-
config TARGET_TS4800
bool "Support TS4800"
select MX51
@@ -91,10 +83,8 @@ config SYS_SOC
source "board/beckhoff/mx53cx9020/Kconfig"
source "board/freescale/mx51evk/Kconfig"
-source "board/freescale/mx53ard/Kconfig"
source "board/freescale/mx53evk/Kconfig"
source "board/freescale/mx53loco/Kconfig"
-source "board/freescale/mx53smd/Kconfig"
source "board/ge/mx53ppd/Kconfig"
source "board/inversepath/usbarmory/Kconfig"
source "board/k+p/kp_imx53/Kconfig"
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 513d007ce75..92fb4c4f23e 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -554,11 +554,6 @@ config TARGET_PCL063_ULL
config TARGET_SECOMX6
bool "secomx6 boards"
-config TARGET_SKSIMX6
- bool "sks-imx6"
- depends on MX6QDL
- select SUPPORT_SPL
-
config TARGET_SOMLABS_VISIONSOM_6ULL
bool "visionsom-6ull"
depends on MX6ULL
@@ -737,7 +732,6 @@ source "board/liebherr/display5/Kconfig"
source "board/liebherr/mccmon6/Kconfig"
source "board/logicpd/imx6/Kconfig"
source "board/seco/Kconfig"
-source "board/sks-kinkel/sksimx6/Kconfig"
source "board/solidrun/mx6cuboxi/Kconfig"
source "board/somlabs/visionsom-6ull/Kconfig"
source "board/technexion/pico-imx6/Kconfig"
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index b328837c694..3d3c48e2473 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -128,8 +128,8 @@ struct apu_regs {
#define ZYNQMP_CSU_VERSION_EMPTY_SHIFT 20
-#define ZYNQMP_SILICON_VER_MASK 0xF000
-#define ZYNQMP_SILICON_VER_SHIFT 12
+#define ZYNQMP_SILICON_VER_MASK 0xF
+#define ZYNQMP_SILICON_VER_SHIFT 0
struct csu_regs {
u32 reserved0[4];
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 870ab800e86..6f905189277 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -64,10 +64,6 @@ config TARGET_MPC8568MDS
bool "Support MPC8568MDS"
select ARCH_MPC8568
-config TARGET_MPC8569MDS
- bool "Support MPC8569MDS"
- select ARCH_MPC8569
-
config TARGET_P1010RDB_PA
bool "Support P1010RDB_PA"
select ARCH_P1010
@@ -473,19 +469,6 @@ config ARCH_MPC8568
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
-config ARCH_MPC8569
- bool
- select FSL_LAW
- select SYS_FSL_ERRATUM_A004508
- select SYS_FSL_ERRATUM_A005125
- select FSL_PCIE_RESET
- select SYS_FSL_HAS_DDR3
- select SYS_FSL_HAS_SEC
- select SYS_FSL_SEC_BE
- select SYS_FSL_SEC_COMPAT_2
- select FSL_ELBC
- imply CMD_NAND
-
config ARCH_MPC8572
bool
select FSL_LAW
@@ -1102,7 +1085,6 @@ config SYS_CCSRBAR_DEFAULT
ARCH_MPC8555 || \
ARCH_MPC8560 || \
ARCH_MPC8568 || \
- ARCH_MPC8569 || \
ARCH_MPC8572 || \
ARCH_P1010 || \
ARCH_P1011 || \
@@ -1335,8 +1317,7 @@ config SYS_FSL_NUM_LAWS
ARCH_P2020
default 10 if ARCH_MPC8544 || \
ARCH_MPC8548 || \
- ARCH_MPC8568 || \
- ARCH_MPC8569
+ ARCH_MPC8568
default 8 if ARCH_MPC8540 || \
ARCH_MPC8541 || \
ARCH_MPC8555 || \
@@ -1433,7 +1414,6 @@ source "board/freescale/mpc8541cds/Kconfig"
source "board/freescale/mpc8548cds/Kconfig"
source "board/freescale/mpc8555cds/Kconfig"
source "board/freescale/mpc8568mds/Kconfig"
-source "board/freescale/mpc8569mds/Kconfig"
source "board/freescale/p1010rdb/Kconfig"
source "board/freescale/p1_p2_rdb_pc/Kconfig"
source "board/freescale/p2041rdb/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 019fce63142..14e46626f33 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -65,7 +65,6 @@ obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
-obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o
obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
deleted file mode 100644
index eb54b8252b2..00000000000
--- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
+++ /dev/null
@@ -1,67 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2010 Freescale Semiconductor, Inc.
- */
-
-#include <config.h>
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <asm/immap_85xx.h>
-#include <asm/fsl_serdes.h>
-
-#define SRDS1_MAX_LANES 4
-
-static u32 serdes1_prtcl_map;
-
-static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
- [0x0] = {PCIE1, NONE, NONE, NONE},
- [0x1] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
- [0x2] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
- [0x3] = {SRIO1, SRIO2, NONE, NONE},
- [0x4] = {PCIE1, NONE, SGMII_TSEC1, SGMII_TSEC2},
- [0x5] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
- [0x6] = {PCIE1, NONE, SRIO1, SRIO2},
- [0x7] = {PCIE1, PCIE1, SRIO1, SRIO2},
- [0x8] = {PCIE1, PCIE1, SRIO1, SRIO2},
- [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1},
- [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1},
- [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
- [0xc] = {PCIE1, SRIO1, SGMII_TSEC1, SGMII_TSEC2},
- [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1},
-};
-
-int is_serdes_configured(enum srds_prtcl prtcl)
-{
- if (!(serdes1_prtcl_map & (1 << NONE)))
- fsl_serdes_init();
-
- return (1 << prtcl) & serdes1_prtcl_map;
-}
-
-void fsl_serdes_init(void)
-{
- ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
- u32 pordevsr = in_be32(&gur->pordevsr);
- u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
- MPC85xx_PORDEVSR_IO_SEL_SHIFT;
- int lane;
-
- if (serdes1_prtcl_map & (1 << NONE))
- return;
-
- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
-
- if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
- printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
- return;
- }
-
- for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
- enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
- serdes1_prtcl_map |= (1 << lane_prtcl);
- }
-
- /* Set the first bit to indicate serdes has been initialized */
- serdes1_prtcl_map |= (1 << NONE);
-}
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 09653c70125..9c89ce5d70e 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -630,7 +630,7 @@ int get_clocks(void)
gd->arch.i2c2_clk = gd->arch.i2c1_clk;
#if defined(CONFIG_FSL_ESDHC)
-#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010)
+#if defined(CONFIG_ARCH_P1010)
gd->arch.sdhc_clk = gd->bus_clk;
#else
gd->arch.sdhc_clk = gd->bus_clk / 2;
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index dd784e7e30b..f41e82ad189 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -344,39 +344,6 @@ l2_disabled:
mtspr DBCR0,r0
#endif
-#ifdef CONFIG_ARCH_MPC8569
-#define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000)
-#define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0)
-
- /* MPC8569 Rev.0 silcon needs to set bit 13 of LBCR to allow elBC to
- * use address space which is more than 12bits, and it must be done in
- * the 4K boot page. So we set this bit here.
- */
-
- /* create a temp mapping TLB0[0] for LBCR */
- create_tlb0_entry 0, \
- 0, BOOKE_PAGESZ_4K, \
- CONFIG_SYS_LBC_ADDR, MAS2_I|MAS2_G, \
- CONFIG_SYS_LBC_ADDR, MAS3_SW|MAS3_SR, \
- 0, r6
-
- /* Set LBCR register */
- lis r4,CONFIG_SYS_LBCR_ADDR@h
- ori r4,r4,CONFIG_SYS_LBCR_ADDR@l
-
- lis r5,CONFIG_SYS_LBC_LBCR@h
- ori r5,r5,CONFIG_SYS_LBC_LBCR@l
- stw r5,0(r4)
- isync
-
- /* invalidate this temp TLB */
- lis r4,CONFIG_SYS_LBC_ADDR@h
- ori r4,r4,CONFIG_SYS_LBC_ADDR@l
- tlbivax 0,r4
- isync
-
-#endif /* CONFIG_ARCH_MPC8569 */
-
/*
* Search for the TLB that covers the code we're executing, and shrink it
* so that it covers only this 4K page. That will ensure that any other
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index f25ba1af092..4d70259f09b 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -38,16 +38,6 @@
#define CONFIG_SYS_FSL_RMU
#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
-#elif defined(CONFIG_ARCH_MPC8569)
-#define QE_MURAM_SIZE 0x20000UL
-#define MAX_QE_RISC 4
-#define QE_NUM_OF_SNUM 46
-#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1
-#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
-#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
-#define CONFIG_SYS_FSL_RMU
-#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
-
#elif defined(CONFIG_ARCH_P1010)
#define CONFIG_FSL_SDHC_V2_3
#define CONFIG_TSECV2
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index bfa601e91b6..c6c009261d0 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2204,15 +2204,8 @@ typedef struct ccsr_gur {
u32 gpiocr; /* GPIO control */
#endif
u8 res3[12];
-#if defined(CONFIG_ARCH_MPC8569)
- u32 plppar1; /* Platform port pin assignment 1 */
- u32 plppar2; /* Platform port pin assignment 2 */
- u32 plpdir1; /* Platform port pin direction 1 */
- u32 plpdir2; /* Platform port pin direction 2 */
-#else
u32 gpoutdr; /* General-purpose output data */
u8 res4[12];
-#endif
u32 gpindr; /* General-purpose input data */
u8 res5[12];
u32 pmuxcr; /* Alt. function signal multiplex control */
@@ -2478,7 +2471,7 @@ typedef struct ccsr_gur {
u32 svr; /* System version */
u8 res10[8];
u32 rstcr; /* Reset control */
-#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_ARCH_MPC8569)
+#if defined(CONFIG_ARCH_MPC8568)
u8 res11a[76];
par_io_t qe_par_io[7];
u8 res11b[1600];
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
index e4dea205b24..902dcfd08a9 100644
--- a/arch/riscv/dts/k210-maix-bit.dts
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -200,6 +200,8 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
m25p,fast-read;
broken-flash-reset;
};
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-25 11:37:42 +0000