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-rw-r--r--arch/arm/include/asm/arch-lpc32xx/config.h10
-rw-r--r--arch/arm/include/asm/ti-common/davinci_nand.h1
-rw-r--r--arch/arm/mach-imx/cmd_nandbcb.c1
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h2
4 files changed, 1 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
index 45e46f99463..653792c610c 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -34,28 +34,18 @@
#define NAND_LARGE_BLOCK_PAGE_SIZE 0x800
#define NAND_SMALL_BLOCK_PAGE_SIZE 0x200
-#if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
-#endif
-
#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63, }
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE 16
#define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, }
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#else
#error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
#endif
#define CONFIG_SYS_NAND_ECCSIZE 0x100
#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
- CONFIG_SYS_NAND_PAGE_SIZE)
#endif /* CONFIG_NAND_LPC32XX_SLC */
/* NOR Flash */
diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/asm/ti-common/davinci_nand.h
index ffaac6840ba..a4cc27e920d 100644
--- a/arch/arm/include/asm/ti-common/davinci_nand.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -9,7 +9,6 @@
#ifndef _DAVINCI_NAND_H_
#define _DAVINCI_NAND_H_
-#include <linux/mtd/rawnand.h>
#include <asm/arch/hardware.h>
#define NAND_READ_START 0x00
diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c
index cd513445978..09622c13c98 100644
--- a/arch/arm/mach-imx/cmd_nandbcb.c
+++ b/arch/arm/mach-imx/cmd_nandbcb.c
@@ -23,6 +23,7 @@
#include <jffs2/jffs2.h>
#include <linux/bch.h>
#include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/imx-nandbcb.h>
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index cfe74bcb84a..7eb45664e69 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -167,7 +167,6 @@
#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
-#define CONFIG_NAND_FSL_IFC
#define CONFIG_ESDHC_HC_BLK_ADDR
#elif defined(CONFIG_ARCH_BSC9132)
@@ -179,7 +178,6 @@
#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000
#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
-#define CONFIG_NAND_FSL_IFC
#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_ESDHC_HC_BLK_ADDR