diff options
Diffstat (limited to 'arch')
73 files changed, 893 insertions, 150 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 76365ef3136..8f950778bde 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,6 +61,16 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE endif endif +config GIC_V3_ITS + bool "ARM GICV3 ITS" + help + ARM GICV3 Interrupt translation service (ITS). + Basic support for programming locality specific peripheral + interrupts (LPI) configuration tables and enable LPI tables. + LPI configuration table can be used by u-boot or Linux. + ARM GICV3 has limitation, once the LPI table is enabled, LPI + configuration table can not be re-programmed, unless GICV3 reset. + config STATIC_RELA bool default y if ARM64 && !POSITION_INDEPENDENT diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c index b0aca1b72a3..cbd35b7f4a2 100644 --- a/arch/arm/cpu/armv8/fwcall.c +++ b/arch/arm/cpu/armv8/fwcall.c @@ -98,6 +98,22 @@ void __noreturn psci_system_reset(void) ; } +void __noreturn psci_system_reset2(u32 reset_level, u32 cookie) +{ + struct pt_regs regs; + + regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2; + regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; + regs.regs[2] = cookie; + if (use_smc_for_psci) + smc_call(®s); + else + hvc_call(®s); + + while (1) + ; +} + void __noreturn psci_system_off(void) { struct pt_regs regs; diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h new file mode 100644 index 00000000000..ac6c9e70134 --- /dev/null +++ b/arch/arm/include/asm/gic-v3.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Broadcom. + */ + +#ifndef __GIC_V3_H__ +#define __GIC_V3_H__ + +#define GICR_CTLR_ENABLE_LPIS BIT(0) +#define GICR_CTLR_RWP BIT(3) + +#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) + +#define GICR_WAKER_PROCESSORSLEEP BIT(1) +#define GICR_WAKER_CHILDRENASLEEP BIT(2) + +#define GIC_BASER_CACHE_NCNB 0ULL +#define GIC_BASER_CACHE_SAMEASINNER 0ULL +#define GIC_BASER_CACHE_NC 1ULL +#define GIC_BASER_CACHE_RAWT 2ULL +#define GIC_BASER_CACHE_RAWB 3ULL +#define GIC_BASER_CACHE_WAWT 4ULL +#define GIC_BASER_CACHE_WAWB 5ULL +#define GIC_BASER_CACHE_RAWAWT 6ULL +#define GIC_BASER_CACHE_RAWAWB 7ULL +#define GIC_BASER_CACHE_MASK 7ULL +#define GIC_BASER_NONSHAREABLE 0ULL +#define GIC_BASER_INNERSHAREABLE 1ULL +#define GIC_BASER_OUTERSHAREABLE 2ULL +#define GIC_BASER_SHAREABILITY_MASK 3ULL + +#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \ + (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT) + +#define GIC_BASER_SHAREABILITY(reg, type) \ + (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT) + +/* encode a size field of width @w containing @n - 1 units */ +#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\ + GENMASK_ULL(((w) - 1), 0)) + +#define GICR_PROPBASER_SHAREABILITY_SHIFT (10) +#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PROPBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK) +#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK) +#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK) +#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK + +#define GICR_PROPBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE) + +#define GICR_PROPBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB) +#define GICR_PROPBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC) +#define GICR_PROPBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT) +#define GICR_PROPBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB) +#define GICR_PROPBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT) +#define GICR_PROPBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB) +#define GICR_PROPBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT) +#define GICR_PROPBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB) + +#define GICR_PROPBASER_IDBITS_MASK (0x1f) +#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) +#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) + +#define GICR_PENDBASER_SHAREABILITY_SHIFT (10) +#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PENDBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK) +#define GICR_PENDBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK) +#define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK) +#define GICR_PENDBASER_CACHEABILITY_MASK \ + GICR_PENDBASER_INNER_CACHEABILITY_MASK + +#define GICR_PENDBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, INNERSHAREABLE) + +#define GICR_PENDBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NCNB) +#define GICR_PENDBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NC) +#define GICR_PENDBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWT) +#define GICR_PENDBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWB) +#define GICR_PENDBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWT) +#define GICR_PENDBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWB) +#define GICR_PENDBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWT) +#define GICR_PENDBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWB) + +#define GICR_PENDBASER_PTZ BIT_ULL(62) + +#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ + +#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1) +#define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1) +#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32) + +/* Message based interrupts support */ +#define GICD_TYPER_MBIS BIT(16) +/* LPI support */ +#define GICD_TYPER_LPIS BIT(17) +#define GICD_TYPER_RSS BIT(26) + +#define GIC_REDISTRIBUTOR_OFFSET 0x20000 + +#ifdef CONFIG_GIC_V3_ITS +int gic_lpi_tables_init(u64 base, u32 max_redist); +#else +int gic_lpi_tables_init(u64 base, u32 max_redist) +{ + return 0; +} +#endif /* CONFIG_GIC_V3_ITS */ + +#endif /* __GIC_V3_H__ */ diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index 95f18e8cbcc..3ddcd95a26d 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -64,6 +64,7 @@ #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4) #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5) #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7) +#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) /* PSCI 1.0 interface */ #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) @@ -90,6 +91,9 @@ #define PSCI_AFFINITY_LEVEL_OFF 1 #define PSCI_AFFINITY_LEVEL_ON_PENDING 2 +#define PSCI_RESET2_TYPE_VENDOR_SHIFT 31 +#define PSCI_RESET2_TYPE_VENDOR BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT) + #ifndef __ASSEMBLY__ #include <asm/types.h> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index a1a5e35ef6f..81ccead1127 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -254,6 +254,7 @@ void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs); void smc_call(struct pt_regs *args); void __noreturn psci_system_reset(void); +void __noreturn psci_system_reset2(u32 reset_level, u32 cookie); void __noreturn psci_system_off(void); #ifdef CONFIG_ARMV8_PSCI diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9de9a9acee7..8482f5446c5 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_FSL_LAYERSCAPE) += ccn504.o ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),) obj-y += gic_64.o endif +obj-$(CONFIG_GIC_V3_ITS) += gic-v3-its.o obj-y += interrupts_64.o else obj-y += interrupts.o diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c new file mode 100644 index 00000000000..e19ab016217 --- /dev/null +++ b/arch/arm/lib/gic-v3-its.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Broadcom. + */ +#include <common.h> +#include <asm/gic.h> +#include <asm/gic-v3.h> +#include <asm/io.h> + +static u32 lpi_id_bits; + +#define LPI_NRBITS lpi_id_bits +#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) +#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) + +/* + * Program the GIC LPI configuration tables for all + * the re-distributors and enable the LPI table + * base: Configuration table address + * num_redist: number of redistributors + */ +int gic_lpi_tables_init(u64 base, u32 num_redist) +{ + u32 gicd_typer; + u64 val; + u64 tmp; + int i; + u64 redist_lpi_base; + u64 pend_base = GICR_BASE + GICR_PENDBASER; + + gicd_typer = readl(GICD_BASE + GICD_TYPER); + + /* GIC support for Locality specific peripheral interrupts (LPI's) */ + if (!(gicd_typer & GICD_TYPER_LPIS)) { + pr_err("GIC implementation does not support LPI's\n"); + return -EINVAL; + } + + /* + * Check for LPI is disabled for all the redistributors. + * Once the LPI table is enabled, can not program the + * LPI configuration tables again, unless the GIC is reset. + */ + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + if ((readl((uintptr_t)(GICR_BASE + offset))) & + GICR_CTLR_ENABLE_LPIS) { + pr_err("Re-Distributor %d LPI is already enabled\n", + i); + return -EINVAL; + } + } + + /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */ + lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer), + ITS_MAX_LPI_NRBITS); + + /* Set PropBase */ + val = (base | + GICR_PROPBASER_INNERSHAREABLE | + GICR_PROPBASER_RAWAWB | + ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); + + writeq(val, (GICR_BASE + GICR_PROPBASER)); + tmp = readl(GICR_BASE + GICR_PROPBASER); + if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { + if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | + GICR_PROPBASER_CACHEABILITY_MASK); + val |= GICR_PROPBASER_NC; + writeq(val, (GICR_BASE + GICR_PROPBASER)); + } + } + + redist_lpi_base = base + LPI_PROPBASE_SZ; + + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | + GICR_PENDBASER_INNERSHAREABLE | + GICR_PENDBASER_RAWAWB); + + writeq(val, (uintptr_t)(pend_base + offset)); + tmp = readq((uintptr_t)(pend_base + offset)); + if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | + GICR_PENDBASER_CACHEABILITY_MASK); + val |= GICR_PENDBASER_NC; + writeq(val, (uintptr_t)(pend_base + offset)); + } + + /* Enable LPI for the redistributor */ + writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset)); + } + + return 0; +} + diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c index 9330042f392..8c6e12d5482 100644 --- a/arch/m68k/cpu/mcf523x/cpu_init.c +++ b/arch/m68k/cpu/mcf523x/cpu_init.c @@ -157,7 +157,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; diff --git a/arch/m68k/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c index dba6c236072..f39fe19baf2 100644 --- a/arch/m68k/cpu/mcf52x2/cpu_init.c +++ b/arch/m68k/cpu/mcf52x2/cpu_init.c @@ -158,7 +158,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; @@ -305,7 +305,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { if (setclear) { /* Enable Ethernet pins */ @@ -426,7 +426,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; @@ -509,14 +509,17 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { - struct fec_info_s *info = (struct fec_info_s *) dev->priv; gpio_t *gpio = (gpio_t *)MMAP_GPIO; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { /* Enable Ethernet pins */ - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { setbits_be16(&gpio->par_feci2c, 0x0f00); setbits_8(&gpio->par_fec0hl, 0xc0); } else { @@ -524,7 +527,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) setbits_8(&gpio->par_fec1hl, 0xc0); } } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { clrbits_be16(&gpio->par_feci2c, 0x0f00); clrbits_8(&gpio->par_fec0hl, 0xc0); } else { @@ -644,7 +647,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { if (setclear) { MCFGPIO_PASPAR |= 0x0F00; diff --git a/arch/m68k/cpu/mcf532x/cpu.c b/arch/m68k/cpu/mcf532x/cpu.c index c8a1f205305..6807992de53 100644 --- a/arch/m68k/cpu/mcf532x/cpu.c +++ b/arch/m68k/cpu/mcf532x/cpu.c @@ -146,7 +146,6 @@ int watchdog_init(void) * create a board-specific function called: * int board_eth_init(bd_t *bis) */ - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c index 041ada0d161..bd130c1b0c0 100644 --- a/arch/m68k/cpu/mcf532x/cpu_init.c +++ b/arch/m68k/cpu/mcf532x/cpu_init.c @@ -14,7 +14,7 @@ #include <asm/immap.h> #include <asm/io.h> -#if defined(CONFIG_CMD_NET) +#if defined(CONFIG_MCFFEC) #include <config.h> #include <net.h> #include <asm/fec.h> @@ -94,6 +94,7 @@ void cpu_init_f(void) int cpu_init_r(void) { #ifdef CONFIG_MCFFEC + u32 fec_mii_base0, fec_mii_base1; ccm_t *ccm = (ccm_t *) MMAP_CCM; #endif #ifdef CONFIG_MCFRTC @@ -105,7 +106,10 @@ int cpu_init_r(void) #endif #ifdef CONFIG_MCFFEC - if (CONFIG_SYS_FEC0_MIIBASE != CONFIG_SYS_FEC1_MIIBASE) + fec_get_mii_base(0, &fec_mii_base0); + fec_get_mii_base(1, &fec_mii_base1); + + if (fec_mii_base0 != fec_mii_base1) setbits_be16(&ccm->misccr, CCM_MISCCR_FECM); else clrbits_be16(&ccm->misccr, CCM_MISCCR_FECM); @@ -168,13 +172,16 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; - struct fec_info_s *info = (struct fec_info_s *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { setbits_8(&gpio->par_fec, GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC); setbits_8(&gpio->par_feci2c, @@ -186,7 +193,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC1 | GPIO_PAR_FECI2C_MDIO1); } } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { clrbits_8(&gpio->par_fec, GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC); clrbits_8(&gpio->par_feci2c, ~GPIO_PAR_FECI2C_RMII0_UNMASK); @@ -329,7 +336,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 9c5b8122a6a..6ee23f0db28 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -402,15 +402,18 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; -#ifdef CONFIG_MCF5445x - struct fec_info_s *info = (struct fec_info_s *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; +#ifdef CONFIG_MCF5445x if (setclear) { #ifdef CONFIG_SYS_FEC_NO_SHARED_PHY - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); @@ -423,7 +426,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); #endif - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); else setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); @@ -431,7 +434,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) clrbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { #ifdef CONFIG_SYS_FEC_FULL_MII setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); #else @@ -463,4 +466,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear) return 0; } #endif - diff --git a/arch/m68k/cpu/mcf547x_8x/cpu_init.c b/arch/m68k/cpu/mcf547x_8x/cpu_init.c index 3f8c38c520d..8779384c0ab 100644 --- a/arch/m68k/cpu/mcf547x_8x/cpu_init.c +++ b/arch/m68k/cpu/mcf547x_8x/cpu_init.c @@ -17,6 +17,7 @@ #if defined(CONFIG_CMD_NET) #include <config.h> #include <net.h> +#include <asm/fec.h> #include <asm/fsl_mcdmafec.h> #endif @@ -124,18 +125,21 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; - struct fec_info_dma *info = (struct fec_info_dma *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_be16(&gpio->par_feci2cirq, 0xf000); else setbits_be16(&gpio->par_feci2cirq, 0x0fc0); } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) clrbits_be16(&gpio->par_feci2cirq, 0xf000); else clrbits_be16(&gpio->par_feci2cirq, 0x0fc0); diff --git a/arch/m68k/dts/M5208EVBE.dts b/arch/m68k/dts/M5208EVBE.dts index e78513f3b8b..3e5a6988610 100644 --- a/arch/m68k/dts/M5208EVBE.dts +++ b/arch/m68k/dts/M5208EVBE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5235EVB.dts b/arch/m68k/dts/M5235EVB.dts index 1a32539323b..b170b7bd032 100644 --- a/arch/m68k/dts/M5235EVB.dts +++ b/arch/m68k/dts/M5235EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5235EVB_Flash32.dts b/arch/m68k/dts/M5235EVB_Flash32.dts index fcbffb23f54..497d8245419 100644 --- a/arch/m68k/dts/M5235EVB_Flash32.dts +++ b/arch/m68k/dts/M5235EVB_Flash32.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5272C3.dts b/arch/m68k/dts/M5272C3.dts index 6efb8a4cc55..0ecf1e74294 100644 --- a/arch/m68k/dts/M5272C3.dts +++ b/arch/m68k/dts/M5272C3.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5275EVB.dts b/arch/m68k/dts/M5275EVB.dts index cd9eb7d1453..f0f573c08c2 100644 --- a/arch/m68k/dts/M5275EVB.dts +++ b/arch/m68k/dts/M5275EVB.dts @@ -20,3 +20,10 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5282EVB.dts b/arch/m68k/dts/M5282EVB.dts index 9527caafc21..9b506635b92 100644 --- a/arch/m68k/dts/M5282EVB.dts +++ b/arch/m68k/dts/M5282EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M53017EVB.dts b/arch/m68k/dts/M53017EVB.dts index b267488e0f6..401318ddf9e 100644 --- a/arch/m68k/dts/M53017EVB.dts +++ b/arch/m68k/dts/M53017EVB.dts @@ -20,3 +20,10 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5329AFEE.dts b/arch/m68k/dts/M5329AFEE.dts index 7d121d68e7a..ab009c56057 100644 --- a/arch/m68k/dts/M5329AFEE.dts +++ b/arch/m68k/dts/M5329AFEE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5329BFEE.dts b/arch/m68k/dts/M5329BFEE.dts index cd087b6ea6d..7e73ab9c660 100644 --- a/arch/m68k/dts/M5329BFEE.dts +++ b/arch/m68k/dts/M5329BFEE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5373EVB.dts b/arch/m68k/dts/M5373EVB.dts index 930f911d4a6..4e1b7aeb77f 100644 --- a/arch/m68k/dts/M5373EVB.dts +++ b/arch/m68k/dts/M5373EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54418TWR.dts b/arch/m68k/dts/M54418TWR.dts index 7765c7abbbe..058707fdf03 100644 --- a/arch/m68k/dts/M54418TWR.dts +++ b/arch/m68k/dts/M54418TWR.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_mii.dts b/arch/m68k/dts/M54418TWR_nand_mii.dts index 9b1cb853250..8afcb0fb99f 100644 --- a/arch/m68k/dts/M54418TWR_nand_mii.dts +++ b/arch/m68k/dts/M54418TWR_nand_mii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_rmii.dts b/arch/m68k/dts/M54418TWR_nand_rmii.dts index 824a66af486..fc2eb5b3bc3 100644 --- a/arch/m68k/dts/M54418TWR_nand_rmii.dts +++ b/arch/m68k/dts/M54418TWR_nand_rmii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts b/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts index 74fa197ea98..a39d1023b24 100644 --- a/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts +++ b/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_serial_mii.dts b/arch/m68k/dts/M54418TWR_serial_mii.dts index 22f27b56122..edf98db0037 100644 --- a/arch/m68k/dts/M54418TWR_serial_mii.dts +++ b/arch/m68k/dts/M54418TWR_serial_mii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_serial_rmii.dts b/arch/m68k/dts/M54418TWR_serial_rmii.dts index 0ddefd9da23..e4639fe431d 100644 --- a/arch/m68k/dts/M54418TWR_serial_rmii.dts +++ b/arch/m68k/dts/M54418TWR_serial_rmii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54451EVB.dts b/arch/m68k/dts/M54451EVB.dts index b57bfea2cb6..b81d37a938e 100644 --- a/arch/m68k/dts/M54451EVB.dts +++ b/arch/m68k/dts/M54451EVB.dts @@ -23,3 +23,11 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54451EVB_stmicro.dts b/arch/m68k/dts/M54451EVB_stmicro.dts index 9a088e16d03..6645b580658 100644 --- a/arch/m68k/dts/M54451EVB_stmicro.dts +++ b/arch/m68k/dts/M54451EVB_stmicro.dts @@ -23,3 +23,11 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54455EVB.dts b/arch/m68k/dts/M54455EVB.dts index dd111810338..b0ffb5144d8 100644 --- a/arch/m68k/dts/M54455EVB.dts +++ b/arch/m68k/dts/M54455EVB.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_a66.dts b/arch/m68k/dts/M54455EVB_a66.dts index 70d544b72d5..c2557bd2e6b 100644 --- a/arch/m68k/dts/M54455EVB_a66.dts +++ b/arch/m68k/dts/M54455EVB_a66.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_i66.dts b/arch/m68k/dts/M54455EVB_i66.dts index b37a87213fd..3c9161bfae2 100644 --- a/arch/m68k/dts/M54455EVB_i66.dts +++ b/arch/m68k/dts/M54455EVB_i66.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_intel.dts b/arch/m68k/dts/M54455EVB_intel.dts index c92228fc8b1..54209d25a70 100644 --- a/arch/m68k/dts/M54455EVB_intel.dts +++ b/arch/m68k/dts/M54455EVB_intel.dts @@ -24,3 +24,11 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_stm33.dts b/arch/m68k/dts/M54455EVB_stm33.dts index 9e467f94a19..701b9a719b4 100644 --- a/arch/m68k/dts/M54455EVB_stm33.dts +++ b/arch/m68k/dts/M54455EVB_stm33.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475AFE.dts b/arch/m68k/dts/M5475AFE.dts index 0c0a79befa1..7895b520cf7 100644 --- a/arch/m68k/dts/M5475AFE.dts +++ b/arch/m68k/dts/M5475AFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475AFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475BFE.dts b/arch/m68k/dts/M5475BFE.dts index c4d14097cd5..ffbc2d6a063 100644 --- a/arch/m68k/dts/M5475BFE.dts +++ b/arch/m68k/dts/M5475BFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475BFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475CFE.dts b/arch/m68k/dts/M5475CFE.dts index 4c92c332bac..f1033f7efbb 100644 --- a/arch/m68k/dts/M5475CFE.dts +++ b/arch/m68k/dts/M5475CFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475CFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475DFE.dts b/arch/m68k/dts/M5475DFE.dts index c41c1b3c12e..69a8faba83b 100644 --- a/arch/m68k/dts/M5475DFE.dts +++ b/arch/m68k/dts/M5475DFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475DFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475EFE.dts b/arch/m68k/dts/M5475EFE.dts index 5a920b241a9..3c898958c8f 100644 --- a/arch/m68k/dts/M5475EFE.dts +++ b/arch/m68k/dts/M5475EFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475EFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475FFE.dts b/arch/m68k/dts/M5475FFE.dts index d312a6ae8d3..bb3c21588f5 100644 --- a/arch/m68k/dts/M5475FFE.dts +++ b/arch/m68k/dts/M5475FFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475FFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475GFE.dts b/arch/m68k/dts/M5475GFE.dts index 9e794dafa68..75080fa7371 100644 --- a/arch/m68k/dts/M5475GFE.dts +++ b/arch/m68k/dts/M5475GFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475GFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485AFE.dts b/arch/m68k/dts/M5485AFE.dts index 3466751174c..b1f5bf0f561 100644 --- a/arch/m68k/dts/M5485AFE.dts +++ b/arch/m68k/dts/M5485AFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485BFE.dts b/arch/m68k/dts/M5485BFE.dts index 6d48795a4d4..10b8f5b2015 100644 --- a/arch/m68k/dts/M5485BFE.dts +++ b/arch/m68k/dts/M5485BFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485CFE.dts b/arch/m68k/dts/M5485CFE.dts index d1a7d9d3838..a1ae64f65ca 100644 --- a/arch/m68k/dts/M5485CFE.dts +++ b/arch/m68k/dts/M5485CFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485DFE.dts b/arch/m68k/dts/M5485DFE.dts index 7c362e26e51..9b38d451fc0 100644 --- a/arch/m68k/dts/M5485DFE.dts +++ b/arch/m68k/dts/M5485DFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485EFE.dts b/arch/m68k/dts/M5485EFE.dts index 4c688dce2bc..a1ac3f5a489 100644 --- a/arch/m68k/dts/M5485EFE.dts +++ b/arch/m68k/dts/M5485EFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485FFE.dts b/arch/m68k/dts/M5485FFE.dts index 87ec2c543de..7f22de49f48 100644 --- a/arch/m68k/dts/M5485FFE.dts +++ b/arch/m68k/dts/M5485FFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485GFE.dts b/arch/m68k/dts/M5485GFE.dts index 9f67e5516b9..3430aa72795 100644 --- a/arch/m68k/dts/M5485GFE.dts +++ b/arch/m68k/dts/M5485GFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485HFE.dts b/arch/m68k/dts/M5485HFE.dts index 2eb2213d78c..57c98f1ef79 100644 --- a/arch/m68k/dts/M5485HFE.dts +++ b/arch/m68k/dts/M5485HFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/cobra5272.dts b/arch/m68k/dts/cobra5272.dts index f3b74975def..6085eee5b35 100644 --- a/arch/m68k/dts/cobra5272.dts +++ b/arch/m68k/dts/cobra5272.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/eb_cpu5282.dts b/arch/m68k/dts/eb_cpu5282.dts index 4641e9cb565..655c4ecf5a1 100644 --- a/arch/m68k/dts/eb_cpu5282.dts +++ b/arch/m68k/dts/eb_cpu5282.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/eb_cpu5282_internal.dts b/arch/m68k/dts/eb_cpu5282_internal.dts index 0acb7935f46..f5a044d7cc6 100644 --- a/arch/m68k/dts/eb_cpu5282_internal.dts +++ b/arch/m68k/dts/eb_cpu5282_internal.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/mcf5208.dtsi b/arch/m68k/dts/mcf5208.dtsi index 558d8bf41a5..4802dd3074e 100644 --- a/arch/m68k/dts/mcf5208.dtsi +++ b/arch/m68k/dts/mcf5208.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf523x.dtsi b/arch/m68k/dts/mcf523x.dtsi index 9e79d472ecd..550e824cb12 100644 --- a/arch/m68k/dts/mcf523x.dtsi +++ b/arch/m68k/dts/mcf523x.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,17 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + #address-cells=<2>; + #size-cells=<1>; + reg = <0x1000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5271.dtsi b/arch/m68k/dts/mcf5271.dtsi index 29355528d0f..b3484c2c84b 100644 --- a/arch/m68k/dts/mcf5271.dtsi +++ b/arch/m68k/dts/mcf5271.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,15 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5272.dtsi b/arch/m68k/dts/mcf5272.dtsi index a56117728bd..173baaba3f2 100644 --- a/arch/m68k/dts/mcf5272.dtsi +++ b/arch/m68k/dts/mcf5272.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -33,6 +34,15 @@ reg = <0x140 0x40>; status = "disabled"; }; + + fec0: ethernet@840 { + compatible = "fsl,mcf-fec"; + reg = <0x840 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5275.dtsi b/arch/m68k/dts/mcf5275.dtsi index b375609d4a2..99dd7d3924c 100644 --- a/arch/m68k/dts/mcf5275.dtsi +++ b/arch/m68k/dts/mcf5275.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it> + * Copyright (C) 2019 Angelo Dureghello <angelo@sysam.it> */ / { @@ -8,6 +8,8 @@ aliases { serial0 = &uart0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -39,6 +41,24 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x800>; + max-speed = <100>; + phy-addr = <(-1)>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@1800 { + compatible = "fsl,mcf-fec"; + reg = <0x1800 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5282.dtsi b/arch/m68k/dts/mcf5282.dtsi index 3ad1be7bb5d..d9916b1cd95 100644 --- a/arch/m68k/dts/mcf5282.dtsi +++ b/arch/m68k/dts/mcf5282.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,15 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5301x.dtsi b/arch/m68k/dts/mcf5301x.dtsi index 0891e4dfd56..f60898aa4a4 100644 --- a/arch/m68k/dts/mcf5301x.dtsi +++ b/arch/m68k/dts/mcf5301x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -44,5 +46,24 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x200>; + mii-base = <0>; + max-speed = <100>; + phy-addr = <(-1)>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc034000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc034000 0x800>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5329.dtsi b/arch/m68k/dts/mcf5329.dtsi index aeaa6430af6..de348968b56 100644 --- a/arch/m68k/dts/mcf5329.dtsi +++ b/arch/m68k/dts/mcf5329.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf537x.dtsi b/arch/m68k/dts/mcf537x.dtsi index aeaa6430af6..2a2a32a59ba 100644 --- a/arch/m68k/dts/mcf537x.dtsi +++ b/arch/m68k/dts/mcf537x.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5441x.dtsi b/arch/m68k/dts/mcf5441x.dtsi index 71b392adc36..6769bdc270a 100644 --- a/arch/m68k/dts/mcf5441x.dtsi +++ b/arch/m68k/dts/mcf5441x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -83,5 +85,23 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc0d4000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc0d4000 0x4000>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc0d8000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc0d8000 0x4000>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5445x.dtsi b/arch/m68k/dts/mcf5445x.dtsi index ccbee29a6cd..b7ecc99c098 100644 --- a/arch/m68k/dts/mcf5445x.dtsi +++ b/arch/m68k/dts/mcf5445x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -44,5 +46,23 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x4000>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc034000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc034000 0x4000>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf54xx.dtsi b/arch/m68k/dts/mcf54xx.dtsi index 537bb424f3e..e9cebb9f742 100644 --- a/arch/m68k/dts/mcf54xx.dtsi +++ b/arch/m68k/dts/mcf54xx.dtsi @@ -11,6 +11,8 @@ * no UARTS. */ spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -35,6 +37,36 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@9000 { + compatible = "fsl,mcf-dma-fec"; + reg = <0x9000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + rx-task = <0>; + tx-task = <1>; + rx-piority = <6>; + tx-piority = <7>; + rx-init = <16>; + tx-init = <17>; + status = "disabled"; + }; + + fec1: ethernet@9800 { + compatible = "fsl,mcf-dma-fec"; + reg = <0x9800 0x800>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + rx-task = <2>; + tx-task = <3>; + rx-piority = <6>; + tx-piority = <7>; + rx-init = <30>; + tx-init = <31>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts index fd8ce4fa356..306b56d679e 100644 --- a/arch/m68k/dts/stmark2.dts +++ b/arch/m68k/dts/stmark2.dts @@ -32,3 +32,12 @@ reg = <1>; }; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/include/asm/fec.h b/arch/m68k/include/asm/fec.h index 5742829c6d6..cdb8119d3ea 100644 --- a/arch/m68k/include/asm/fec.h +++ b/arch/m68k/include/asm/fec.h @@ -95,11 +95,12 @@ struct fec_info_s { int phyname_init; cbd_t *rxbd; /* Rx BD */ cbd_t *txbd; /* Tx BD */ - uint rxIdx; - uint txIdx; + uint rx_idx; + uint tx_idx; char *txbuf; int initialized; - struct fec_info_s *next; + int to_loop; + struct mii_dev *bus; }; #ifdef CONFIG_MCFFEC @@ -336,12 +337,22 @@ typedef struct fec { #define FEC_RESET_DELAY 100 #define FEC_RX_TOUT 100 -int fecpin_setclear(struct eth_device *dev, int setclear); +#ifdef CONFIG_MCF547x_8x +typedef struct fec_info_dma fec_info_t; +#define FEC_T fecdma_t +#else +typedef struct fec_info_s fec_info_t; +#define FEC_T fec_t +#endif + +int fecpin_setclear(fec_info_t *info, int setclear); +int mii_discover_phy(fec_info_t *info); +int fec_get_base_addr(int fec_idx, u32 *fec_iobase); +int fec_get_mii_base(int fec_idx, u32 *mii_base); #ifdef CONFIG_SYS_DISCOVER_PHY void __mii_init(void); uint mii_send(uint mii_cmd); -int mii_discover_phy(struct eth_device *dev); int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg); int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, u16 value); diff --git a/arch/m68k/include/asm/fsl_mcdmafec.h b/arch/m68k/include/asm/fsl_mcdmafec.h index c283ad4a955..de6c548fafd 100644 --- a/arch/m68k/include/asm/fsl_mcdmafec.h +++ b/arch/m68k/include/asm/fsl_mcdmafec.h @@ -72,20 +72,21 @@ struct fec_info_dma { int phyname_init; cbd_t *rxbd; /* Rx BD */ cbd_t *txbd; /* Tx BD */ - uint rxIdx; - uint txIdx; + uint rx_idx; + uint tx_idx; char *txbuf; int initialized; struct fec_info_dma *next; - - u16 rxTask; /* DMA receive Task Number */ - u16 txTask; /* DMA Transmit Task Number */ - u16 rxPri; /* DMA Receive Priority */ - u16 txPri; /* DMA Transmit Priority */ - u16 rxInit; /* DMA Receive Initiator */ - u16 txInit; /* DMA Transmit Initiator */ - u16 usedTbdIdx; /* next transmit BD to clean */ - u16 cleanTbdNum; /* the number of available transmit BDs */ + u16 rx_task; /* DMA receive Task Number */ + u16 tx_task; /* DMA Transmit Task Number */ + u16 rx_pri; /* DMA Receive Priority */ + u16 tx_pri; /* DMA Transmit Priority */ + u16 rx_init; /* DMA Receive Initiator */ + u16 tx_init; /* DMA Transmit Initiator */ + u16 used_tbd_idx; /* next transmit BD to clean */ + u16 clean_tbd_num; /* the number of available transmit BDs */ + int to_loop; + struct mii_dev *bus; }; /* Bit definitions and macros for IEVENT */ diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 80fa25769b2..9e84fb9d260 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -28,12 +28,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M520x */ @@ -62,12 +56,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M52277 */ @@ -91,12 +79,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5235 */ @@ -285,12 +267,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5301x */ @@ -315,12 +291,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5329 && CONFIG_M5373 */ @@ -355,12 +325,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (192) @@ -391,12 +355,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index 254a0a3998b..a040f40eb87 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -12,3 +12,4 @@ obj-y += cache.o obj-y += interrupts.o obj-y += time.o obj-y += traps.o +obj-y += fec.o diff --git a/arch/m68k/lib/fec.c b/arch/m68k/lib/fec.c new file mode 100644 index 00000000000..dde353ad17f --- /dev/null +++ b/arch/m68k/lib/fec.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) 2019 Angelo Dureghello <angelo.dureghello@timesys.com> + */ + +#include <common.h> +#include <linux/libfdt.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MCFFEC) || defined(CONFIG_FSLDMAFEC) +static int fec_get_node(int fec_idx) +{ + char fec_alias[5] = {"fec"}; + const char *path; + int node; + + if (fec_idx > 1) { + puts("Invalid MII base index"); + return -ENOENT; + } + + fec_alias[3] = fec_idx + '0'; + + path = fdt_get_alias(gd->fdt_blob, fec_alias); + if (!path) { + puts("Invalid MII path"); + return -ENOENT; + } + + node = fdt_path_offset(gd->fdt_blob, path); + if (node < 0) + return -ENOENT; + + return node; +} + +int fec_get_fdt_prop(int fec_idx, const char *prop, u32 *value) +{ + int node; + const u32 *val; + + node = fec_get_node(fec_idx); + if (node < 0) + return node; + + val = fdt_getprop(gd->fdt_blob, node, prop, NULL); + if (!val) + return -ENOENT; + + *value = fdt32_to_cpu(*val); + + return 0; +} + +int fec_get_base_addr(int fec_idx, u32 *fec_iobase) +{ + int node; + fdt_size_t size; + fdt_addr_t addr; + + node = fec_get_node(fec_idx); + if (node < 0) + return node; + + addr = fdtdec_get_addr_size(gd->fdt_blob, node, "reg", &size); + + *fec_iobase = (u32)addr; + + return 0; +} + +int fec_get_mii_base(int fec_idx, u32 *mii_base) +{ + return fec_get_fdt_prop(fec_idx, "mii-base", mii_base); +} + +#endif //CONFIG_MCFFEC || CONFIG_FSLDMAFEC diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index 8957d194d4a..bde1f4c2289 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -110,69 +110,6 @@ ulong get_timer(ulong base) #endif /* CONFIG_MCFTMR */ -#if defined(CONFIG_MCFPIT) -#if !defined(CONFIG_SYS_PIT_BASE) -# error "CONFIG_SYS_PIT_BASE not defined!" -#endif - -static unsigned short lastinc; - -void __udelay(unsigned long usec) -{ - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_UDELAY_BASE); - uint tmp; - - while (usec > 0) { - if (usec > 65000) - tmp = 65000; - else - tmp = usec; - usec = usec - tmp; - - /* Set up TIMER 3 as timebase clock */ - timerp->pcsr = PIT_PCSR_OVW; - timerp->pmr = 0; - /* set period to 1 us */ - timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; - - timerp->pmr = tmp; - while (timerp->pcntr > 0) ; - } -} - -void timer_init(void) -{ - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE); - timestamp = 0; - - /* Set up TIMER 4 as poll clock */ - timerp->pcsr = PIT_PCSR_OVW; - timerp->pmr = lastinc = 0; - timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; - - return 0; -} - -ulong get_timer(ulong base) -{ - unsigned short now, diff; - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE); - - now = timerp->pcntr; - diff = -(now - lastinc); - - timestamp += diff; - lastinc = now; - return timestamp - base; -} - -void wait_ticks(unsigned long ticks) -{ - u32 start = get_timer(0); - while (get_timer(start) < ticks) ; -} -#endif /* CONFIG_MCFPIT */ - /* * This function is derived from PowerPC code (read timebase as long long). * On M68K it just returns the timer value. |