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-rw-r--r--board/AndesTech/ae350/ae350.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c
index 1c2288b6ce9..d78ee403e6c 100644
--- a/board/AndesTech/ae350/ae350.c
+++ b/board/AndesTech/ae350/ae350.c
@@ -19,6 +19,8 @@
#include <fdtdec.h>
#include <dm.h>
#include <spl.h>
+#include <mapmem.h>
+#include <hang.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -26,6 +28,29 @@ DECLARE_GLOBAL_DATA_PTR;
* Miscellaneous platform dependent initializations
*/
+#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
+#define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x100000)
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+ /*
+ * Originally, u-boot-spl will place DTB directly after the kernel,
+ * but the size of the kernel did not include the BSS section, which
+ * means u-boot-spl will place the DTB in the kernel BSS section
+ * causing the DTB to be cleared by kernel BSS initializtion.
+ * Moving DTB in front of the kernel can avoid the error.
+ */
+ if (ANDES_SPL_FDT_ADDR < 0) {
+ printf("%s: CONFIG_TEXT_BASE needs to be larger than 0x100000\n",
+ __func__);
+ hang();
+ }
+
+ memcpy((void *)ANDES_SPL_FDT_ADDR, spl_image->fdt_addr,
+ fdt_totalsize(spl_image->fdt_addr));
+ spl_image->fdt_addr = map_sysmem(ANDES_SPL_FDT_ADDR, 0);
+}
+#endif
+
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;