diff options
Diffstat (limited to 'board/Marvell/dreamplug/dreamplug.c')
| -rw-r--r-- | board/Marvell/dreamplug/dreamplug.c | 94 |
1 files changed, 14 insertions, 80 deletions
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c index 7ba14021b2a..d15faa1cb7f 100644 --- a/board/Marvell/dreamplug/dreamplug.c +++ b/board/Marvell/dreamplug/dreamplug.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com> - * (C) Copyright 2011 - * Jason Cooper <u-boot@lakedaemon.net> + * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2011 Jason Cooper <u-boot@lakedaemon.net> * * Based on work by: * Marvell Semiconductor <www.marvell.com> @@ -11,16 +10,19 @@ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> -#include "dreamplug.h" DECLARE_GLOBAL_DATA_PTR; +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + int board_early_init_f(void) { /* @@ -90,83 +92,15 @@ int board_early_init_f(void) return 0; } -int board_init(void) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - return 0; -} - -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -void mv_phy_88e1116_init(const char *name, const char *path) +int board_eth_init(struct bd_info *bis) { - u16 reg; - int phyaddr; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(path); - if (phyaddr < 0) - return; - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg); - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, phyaddr); - - printf("88E1116 Initialized on %s\n", name); + return cpu_eth_init(bis); } -void reset_phy(void) +int board_init(void) { - char *eth0_name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - char *eth1_name = "ethernet-controller@76000"; - char *eth1_path = "/ocp@f1000000/ethernet-controller@76000/ethernet1-port@0"; + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - /* configure and initialize both PHY's */ - mv_phy_88e1116_init(eth0_name, eth0_path); - mv_phy_88e1116_init(eth1_name, eth1_path); + return 0; } -#endif /* CONFIG_RESET_PHY_R */ |