3 files changed, 18 insertions, 18 deletions
diff --git a/board/freescale/c29xpcie/ddr.c b/board/freescale/c29xpcie/ddr.c
index b017cfd9613..804ea1916d8 100644
--- a/board/freescale/c29xpcie/ddr.c
+++ b/board/freescale/c29xpcie/ddr.c
@@ -26,20 +26,20 @@ dimm_params_t ddr_raw_timing = {
 	.edc_config = 2,
 	.burst_lengths_bitmask = 0x0c,
 
-	.tCKmin_X_ps = 1650,
-	.caslat_X = 0x7e << 4,	/* 5,6,7,8,9,10 */
-	.tAA_ps = 14050,
-	.tWR_ps = 15000,
-	.tRCD_ps = 13500,
-	.tRRD_ps = 75000,
-	.tRP_ps = 13500,
-	.tRAS_ps = 40000,
-	.tRC_ps = 49500,
-	.tRFC_ps = 160000,
-	.tWTR_ps = 75000,
-	.tRTP_ps = 75000,
+	.tckmin_x_ps = 1650,
+	.caslat_x = 0x7e << 4,	/* 5,6,7,8,9,10 */
+	.taa_ps = 14050,
+	.twr_ps = 15000,
+	.trcd_ps = 13500,
+	.trrd_ps = 75000,
+	.trp_ps = 13500,
+	.tras_ps = 40000,
+	.trc_ps = 49500,
+	.trfc_ps = 160000,
+	.twtr_ps = 75000,
+	.trtp_ps = 75000,
 	.refresh_rate_ps = 7800000,
-	.tFAW_ps = 30000,
+	.tfaw_ps = 30000,
 };
 
 int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
@@ -62,7 +62,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 				unsigned int ctrl_num)
 {
 	int i;
-	popts->clk_adjust = 2;
+	popts->clk_adjust = 4;
 	popts->cpo_override = 0x1f;
 	popts->write_data_delay = 4;
 	popts->half_strength_driver_enable = 1;
diff --git a/board/freescale/c29xpcie/law.c b/board/freescale/c29xpcie/law.c
index cd8fc2105d8..80e5fff7c5f 100644
--- a/board/freescale/c29xpcie/law.c
+++ b/board/freescale/c29xpcie/law.c
@@ -10,8 +10,8 @@
 
 struct law_entry law_table[] = {
 	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
-	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
-	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
 	SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
 					LAW_TRGT_IF_PLATFORM_SRAM),
 };
diff --git a/board/freescale/c29xpcie/tlb.c b/board/freescale/c29xpcie/tlb.c
index ddd1ef80b2a..84844ee0f51 100644
--- a/board/freescale/c29xpcie/tlb.c
+++ b/board/freescale/c29xpcie/tlb.c
@@ -46,11 +46,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
 	SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
 			MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-			0, 4, BOOKE_PAGESZ_4K, 1),
+			0, 4, BOOKE_PAGESZ_64K, 1),
 
 	SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
 			MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-			0, 5, BOOKE_PAGESZ_16K, 1),
+			0, 5, BOOKE_PAGESZ_64K, 1),
 
 	SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE,
 			CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS,