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Diffstat (limited to 'board/freescale/m5253demo')
-rw-r--r--board/freescale/m5253demo/flash.c18
-rw-r--r--board/freescale/m5253demo/m5253demo.c10
2 files changed, 14 insertions, 14 deletions
diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c
index bff1ac5fb11..fbd48354160 100644
--- a/board/freescale/m5253demo/flash.c
+++ b/board/freescale/m5253demo/flash.c
@@ -42,7 +42,7 @@ ulong flash_init(void)
ulong size = 0;
ulong fbase = 0;
- fbase = (ulong) CONFIG_SYS_FLASH_BASE;
+ fbase = (ulong) CFG_SYS_FLASH_BASE;
flash_get_size((FPWV *) fbase, &flash_info[0]);
flash_get_offsets((ulong) fbase, &flash_info[0]);
fbase += flash_info[0].size;
@@ -64,9 +64,9 @@ int flash_get_offsets(ulong base, flash_info_t * info)
info->start[0] = base;
info->protect[0] = 0;
- for (i = 1; i < CONFIG_SYS_SST_SECT; i++) {
+ for (i = 1; i < CFG_SYS_SST_SECT; i++) {
info->start[i] = info->start[i - 1]
- + CONFIG_SYS_SST_SECTSZ;
+ + CFG_SYS_SST_SECTSZ;
info->protect[i] = 0;
}
}
@@ -162,8 +162,8 @@ ulong flash_get_size(FPWV * addr, flash_info_t * info)
info->sector_count = 0;
info->size = 0;
- info->sector_count = CONFIG_SYS_SST_SECT;
- info->size = CONFIG_SYS_SST_SECT * CONFIG_SYS_SST_SECTSZ;
+ info->sector_count = CFG_SYS_SST_SECT;
+ info->size = CFG_SYS_SST_SECT * CFG_SYS_SST_SECTSZ;
/* reset ID mode */
*addr = (FPWV) 0x00F000F0;
@@ -222,7 +222,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
start = get_timer(0);
- if ((s_last - s_first) == (CONFIG_SYS_SST_SECT - 1)) {
+ if ((s_last - s_first) == (CFG_SYS_SST_SECT - 1)) {
if (prot == 0) {
addr = (FPWV *) info->start[0];
@@ -259,7 +259,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
enable_interrupts();
return 0;
- } else if (prot == CONFIG_SYS_SST_SECT) {
+ } else if (prot == CFG_SYS_SST_SECT) {
return 1;
}
}
@@ -282,7 +282,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
flag = disable_interrupts();
- base = (FPWV *) (CONFIG_SYS_FLASH_BASE); /* First sector */
+ base = (FPWV *) (CFG_SYS_FLASH_BASE); /* First sector */
base[FLASH_CYCLE1] = 0x00AA; /* unlock */
base[FLASH_CYCLE2] = 0x0055; /* unlock */
@@ -411,7 +411,7 @@ int write_word(flash_info_t * info, FPWV * dest, u16 data)
return (2);
}
- base = (FPWV *) (CONFIG_SYS_FLASH_BASE);
+ base = (FPWV *) (CFG_SYS_FLASH_BASE);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index 85f5f0c0340..c1cff52fb3d 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -36,7 +36,7 @@ int dram_init(void)
if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) {
u32 RC, temp;
- RC = (CONFIG_SYS_CLK / 1000000) >> 1;
+ RC = (CFG_SYS_CLK / 1000000) >> 1;
RC = (RC * 15) >> 4;
/* Initialize DRAM Control Register: DCR */
@@ -47,7 +47,7 @@ int dram_init(void)
__asm__("nop");
/* Initialize DMR0 */
- dramsize = (CONFIG_SYS_SDRAM_SIZE << 20);
+ dramsize = (CFG_SYS_SDRAM_SIZE << 20);
temp = (dramsize - 1) & 0xFFFC0000;
mbar_writeLong(MCFSIM_DMR0, temp | 1);
__asm__("nop");
@@ -57,7 +57,7 @@ int dram_init(void)
__asm__("nop");
/* Write to this block to initiate precharge */
- *(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
+ *(u32 *) (CFG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
mb();
__asm__("nop");
@@ -74,7 +74,7 @@ int dram_init(void)
mbar_readLong(MCFSIM_DACR0) | 0x0040);
__asm__("nop");
- *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+ *(u32 *) (CFG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
mb();
}
@@ -113,7 +113,7 @@ void ide_set_reset(int idereset)
mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
#define CALC_TIMING(t) (t + period - 1) / period
- period = 1000000000 / (CONFIG_SYS_CLK / 2); /* period in ns */
+ period = 1000000000 / (CFG_SYS_CLK / 2); /* period in ns */
/*ata->ton = CALC_TIMING (180); */
out_8(&ata->t1, CALC_TIMING(piotms[2][0]));