diff options
Diffstat (limited to 'board/freescale/mpc8548cds/mpc8548cds.c')
| -rw-r--r-- | board/freescale/mpc8548cds/mpc8548cds.c | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index aa3f32bf678..23e552bde77 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007, 200 Freescale Semiconductor, Inc. + * Copyright 2004, 2007, 2009-2010 Freescale Semiconductor, Inc. * * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> * @@ -118,7 +118,7 @@ void local_bus_init(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; uint clkdiv; uint lbc_hz; @@ -154,7 +154,7 @@ sdram_init(void) #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) uint idx; - volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; uint cpu_board_rev; uint lsdmr_common; @@ -166,16 +166,11 @@ sdram_init(void) /* * Setup SDRAM Base and Option Registers */ - lbc->or2 = CONFIG_SYS_OR2_PRELIM; - asm("msync"); - - lbc->br2 = CONFIG_SYS_BR2_PRELIM; - asm("msync"); - + set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); + set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); lbc->lbcr = CONFIG_SYS_LBC_LBCR; asm("msync"); - lbc->lsrt = CONFIG_SYS_LBC_LSRT; lbc->mrtpr = CONFIG_SYS_LBC_MRTPR; asm("msync"); @@ -393,11 +388,6 @@ int last_stage_init(void) #if defined(CONFIG_OF_BOARD_SETUP) void ft_pci_setup(void *blob, bd_t *bd) { -#ifdef CONFIG_PCI1 - ft_fsl_pci_setup(blob, "pci0", &pci1_hose); -#endif -#ifdef CONFIG_PCIE1 - ft_fsl_pci_setup(blob, "pci1", &pcie1_hose); -#endif + FT_FSL_PCI_SETUP; } #endif |