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-rw-r--r--board/freescale/imx8mq_evk/MAINTAINERS1
-rw-r--r--board/freescale/imx8mq_evk/README3
-rw-r--r--board/freescale/ls1021aiot/ls1021aiot.c2
-rw-r--r--board/freescale/ls1021aqds/ddr.c2
-rw-r--r--board/freescale/ls1021aqds/ddr.h3
-rw-r--r--board/freescale/ls1021aqds/ls1021aqds.c30
-rw-r--r--board/freescale/ls1021atwr/ls1021atwr.c2
-rw-r--r--board/freescale/lx2160a/eth_lx2160aqds.c38
-rw-r--r--board/freescale/mx6sabreauto/README12
-rw-r--r--board/freescale/mx6sabresd/README18
-rw-r--r--board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c9
11 files changed, 61 insertions, 59 deletions
diff --git a/board/freescale/imx8mq_evk/MAINTAINERS b/board/freescale/imx8mq_evk/MAINTAINERS
index a2e320cb100..a00bb4ef786 100644
--- a/board/freescale/imx8mq_evk/MAINTAINERS
+++ b/board/freescale/imx8mq_evk/MAINTAINERS
@@ -1,5 +1,6 @@
i.MX8MQ EVK BOARD
M: Peng Fan <peng.fan@nxp.com>
+M: Fabio Estevam <festevam@gmail.com>
S: Maintained
F: board/freescale/imx8mq_evk/
F: include/configs/imx8mq_evk.h
diff --git a/board/freescale/imx8mq_evk/README b/board/freescale/imx8mq_evk/README
index 1da6eaf2427..2529f7da3d9 100644
--- a/board/freescale/imx8mq_evk/README
+++ b/board/freescale/imx8mq_evk/README
@@ -18,8 +18,9 @@ Get the ddr and hdmi firmware
Note: srctree is U-Boot source directory
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin
$ chmod +x firmware-imx-7.9.bin
+$ ./firmware-imx-7.9.bin
$ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(srctree)
-$ cp firmware-imx-7.9/firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srctee)
+$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srctee)
Build U-Boot
====================
diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c
index fb05b55b5c5..70992a5ce4e 100644
--- a/board/freescale/ls1021aiot/ls1021aiot.c
+++ b/board/freescale/ls1021aiot/ls1021aiot.c
@@ -97,6 +97,8 @@ int dram_init(void)
ddrmc_init();
#endif
+ erratum_a008850_post();
+
gd->ram_size = DDR_SIZE;
return 0;
}
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 98faf9389e4..d3e2e533217 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -179,6 +179,8 @@ int fsl_initdram(void)
fsl_dp_resume();
#endif
+ erratum_a008850_post();
+
gd->ram_size = dram_size;
return 0;
diff --git a/board/freescale/ls1021aqds/ddr.h b/board/freescale/ls1021aqds/ddr.h
index ff1fe8e2ec6..58a88384367 100644
--- a/board/freescale/ls1021aqds/ddr.h
+++ b/board/freescale/ls1021aqds/ddr.h
@@ -5,6 +5,9 @@
#ifndef __DDR_H__
#define __DDR_H__
+
+void erratum_a008850_post(void);
+
struct board_specific_parameters {
u32 n_ranks;
u32 datarate_mhz_high;
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index c08be1ee461..2ca2bd99093 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -200,10 +200,6 @@ int board_early_init_f(void)
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
- struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
- CONFIG_SYS_CCI400_OFFSET);
- unsigned int major;
-
#ifdef CONFIG_NAND_BOOT
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
u32 porsr1, pinctl;
@@ -240,10 +236,6 @@ void board_init_f(ulong dummy)
i2c_init_all();
#endif
- major = get_soc_major_rev();
- if (major == SOC_MAJOR_VER_1_0)
- out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
-
timer_init();
dram_init();
@@ -420,22 +412,12 @@ int misc_init_r(void)
int board_init(void)
{
- struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
- CONFIG_SYS_CCI400_OFFSET);
- unsigned int major;
-
#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
erratum_a010315();
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
erratum_a009942_check_cpo();
#endif
- major = get_soc_major_rev();
- if (major == SOC_MAJOR_VER_1_0) {
- /* Set CCI-400 control override register to
- * enable barrier transaction */
- out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
- }
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
@@ -456,18 +438,6 @@ int board_init(void)
#if defined(CONFIG_DEEP_SLEEP)
void board_sleep_prepare(void)
{
- struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR +
- CONFIG_SYS_CCI400_OFFSET);
- unsigned int major;
-
- major = get_soc_major_rev();
- if (major == SOC_MAJOR_VER_1_0) {
- /* Set CCI-400 control override register to
- * enable barrier transaction */
- out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
- }
-
-
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
#endif
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index beb82cebb62..01ba1bc9621 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -222,6 +222,8 @@ int dram_init(void)
ddrmc_init();
#endif
+ erratum_a008850_post();
+
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c
index 1e98d0c1f98..f6e22d7337b 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -628,8 +628,9 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle)
int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset)
{
char mdio_ioslot_str[] = "mdio@00";
- char mdio_mux_str[] = "mdio-mux-0";
struct lx2160a_qds_mdio *priv;
+ u64 reg;
+ u32 phandle;
int offset, mux_val;
/*Test if the MDIO bus is real mdio bus or muxing front end ?*/
@@ -643,15 +644,32 @@ int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset)
debug("real_bus_num = %d, ioslot = %d\n",
priv->realbusnum, priv->ioslot);
- sprintf(mdio_mux_str, "mdio-mux-%1d", priv->realbusnum);
- offset = fdt_subnode_offset(fdt, fpga_offset, mdio_mux_str);
+ if (priv->realbusnum == EMI1)
+ reg = CONFIG_SYS_FSL_WRIOP1_MDIO1;
+ else
+ reg = CONFIG_SYS_FSL_WRIOP1_MDIO2;
+
+ offset = fdt_node_offset_by_compat_reg(fdt, "fsl,fman-memac-mdio", reg);
+ if (offset < 0) {
+ printf("mdio@%llx node not found in device tree\n", reg);
+ return offset;
+ }
+
+ phandle = fdt_get_phandle(fdt, offset);
+ phandle = cpu_to_fdt32(phandle);
+ offset = fdt_node_offset_by_prop_value(fdt, -1, "mdio-parent-bus",
+ &phandle, 4);
if (offset < 0) {
- printf("%s node not found under node %s in device tree\n",
- mdio_mux_str, fdt_get_name(fdt, fpga_offset, NULL));
+ printf("mdio-mux-%d node not found in device tree\n",
+ priv->realbusnum == EMI1 ? 1 : 2);
return offset;
}
mux_val = lx2160a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot);
+ if (priv->realbusnum == EMI1)
+ mux_val >>= BRDCFG4_EMI1SEL_SHIFT;
+ else
+ mux_val >>= BRDCFG4_EMI2SEL_SHIFT;
sprintf(mdio_ioslot_str, "mdio@%x", (u8)mux_val);
offset = fdt_subnode_offset(fdt, offset, mdio_ioslot_str);
@@ -675,7 +693,9 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset,
*subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name);
if (*subnodeoffset <= 0) {
- printf("Could not add subnode %s\n", phy_node_name);
+ printf("Could not add subnode %s inside node %s err = %s\n",
+ phy_node_name, fdt_get_name(fdt, offset, NULL),
+ fdt_strerror(*subnodeoffset));
return *subnodeoffset;
}
@@ -779,7 +799,6 @@ int fdt_fixup_board_phy(void *fdt)
}
if (dpmac_id == NUM_WRIOP_PORTS)
continue;
-
ret = fdt_create_phy_node(fdt, offset, i,
&subnodeoffset,
phy_dev, phandle);
@@ -792,6 +811,11 @@ int fdt_fixup_board_phy(void *fdt)
fdt_del_node(fdt, subnodeoffset);
break;
}
+ /* calculate offset again as new node addition may have
+ * changed offset;
+ */
+ offset = fdt_get_ioslot_offset(fdt, mii_dev,
+ fpga_offset);
phandle++;
}
diff --git a/board/freescale/mx6sabreauto/README b/board/freescale/mx6sabreauto/README
index e8c589b92aa..4c0fda1a2de 100644
--- a/board/freescale/mx6sabreauto/README
+++ b/board/freescale/mx6sabreauto/README
@@ -9,15 +9,15 @@ $ make mx6sabreauto_defconfig
$ make
-This will generate the SPL and u-boot.img binaries.
+This will generate the SPL and u-boot-dtb.img binaries.
- Flash the SPL binary into the SD card:
$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync
-- Flash the u-boot.img binary into the SD card:
+- Flash the u-boot-dtb.img binary into the SD card:
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 && sync
Booting via Falcon mode
-----------------------
@@ -32,15 +32,15 @@ $ make mx6sabreauto_defconfig
$ make
-This will generate the SPL image called SPL and the u-boot.img.
+This will generate the SPL image called SPL and the u-boot-dtb.img.
- Flash the SPL image into the SD card:
$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync
-- Flash the u-boot.img image into the SD card:
+- Flash the u-boot-dtb.img image into the SD card:
-$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 && sync
Create a FAT16 boot partition to store uImage and the dtb file, then copy the files there:
diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README
index 4b4df063300..4ea4454b9f9 100644
--- a/board/freescale/mx6sabresd/README
+++ b/board/freescale/mx6sabresd/README
@@ -21,15 +21,15 @@ $ make mx6sabresd_defconfig
$ make
-This will generate the SPL and u-boot.img binaries.
+This will generate the SPL and u-boot-dtb.img binaries.
- Flash the SPL binary into the SD card:
$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync
-- Flash the u-boot.img binary into the SD card:
+- Flash the u-boot-dtb.img binary into the SD card:
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 && sync
2. Booting from eMMC
@@ -39,7 +39,7 @@ $ make mx6sabresd_defconfig
$ make
-This will generate the SPL and u-boot.img binaries.
+This will generate the SPL and u-boot-dtb.img binaries.
- Boot first from SD card as shown in the previous section
@@ -51,10 +51,10 @@ Mount the eMMC in the host PC:
=> ums 0 mmc 2
-- Flash SPL and u-boot.img binaries into the eMMC:
+- Flash SPL and u-boot-dtb.img binaries into the eMMC:
$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 && sync
Set SW6 to eMMC 8-bit boot: 11010110
@@ -65,15 +65,15 @@ Set SW6 to eMMC 8-bit boot: 11010110
$ make mx6sabresd_defconfig
$ make
-This will generate the SPL image called SPL and the u-boot.img.
+This will generate the SPL image called SPL and the u-boot-dtb.img.
- Flash the SPL image into the SD card:
$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none && sync
-- Flash the u-boot.img image into the SD card:
+- Flash the u-boot-dtb.img image into the SD card:
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none && sync
Create a partition for root file system and extract it there:
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 595ad76bbec..636c008993b 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -86,16 +86,13 @@ int power_init_board(void)
pmic_reg_write(dev, PFUZE3000_LDOGCTL, reg);
/* SW1B step ramp up time from 2us to 4us/25mV */
- reg = 0x40;
- pmic_reg_write(dev, PFUZE3000_SW1BCONF, reg);
+ pmic_reg_write(dev, PFUZE3000_SW1BCONF, 0x40);
/* SW1B mode to APS/PFM */
- reg = 0xc;
- pmic_reg_write(dev, PFUZE3000_SW1BMODE, reg);
+ pmic_reg_write(dev, PFUZE3000_SW1BMODE, 0xc);
/* SW1B standby voltage set to 0.975V */
- reg = 0xb;
- pmic_reg_write(dev, PFUZE3000_SW1BSTBY, reg);
+ pmic_reg_write(dev, PFUZE3000_SW1BSTBY, 0xb);
return 0;
}