diff options
Diffstat (limited to 'board/gateworks/gw_ventana/common.c')
| -rw-r--r-- | board/gateworks/gw_ventana/common.c | 511 |
1 files changed, 0 insertions, 511 deletions
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 7ec931c8a83..414406461e2 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -16,24 +16,9 @@ #include <fsl_esdhc_imx.h> #include <hwconfig.h> #include <linux/delay.h> -#include <power/pmic.h> -#include <power/ltc3676_pmic.h> -#include <power/pfuze100_pmic.h> -#include <power/mp5416.h> #include "common.h" -/* UART2: Serial Console */ -static iomux_v3_cfg_t const uart2_pads[] = { - IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), -}; - -void setup_iomux_uart(void) -{ - SETUP_IOMUX_PADS(uart2_pads); -} - /* MMC */ static iomux_v3_cfg_t const gw5904_emmc_pads[] = { IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), @@ -84,98 +69,6 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { }; /* - * I2C pad configs: - * I2C1: GSC - * I2C2: PMIC,PCIe Switch,Clock,Mezz - * I2C3: Multimedia/Expansion - */ -static struct i2c_pads_info mx6q_i2c_pad_info[] = { - { - .scl = { - .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } - }, { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } - }, { - .scl = { - .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC, - .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC, - .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC, - .gp = IMX_GPIO_NR(1, 6) - } - } -}; - -static struct i2c_pads_info mx6dl_i2c_pad_info[] = { - { - .scl = { - .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } - }, { - .scl = { - .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } - }, { - .scl = { - .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC, - .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC, - .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC, - .gp = IMX_GPIO_NR(1, 6) - } - } -}; - -void setup_ventana_i2c(int i2c) -{ - struct i2c_pads_info *p; - - if (is_cpu_type(MXC_CPU_MX6Q)) - p = &mx6q_i2c_pad_info[i2c]; - else - p = &mx6dl_i2c_pad_info[i2c]; - - setup_i2c(i2c, CONFIG_SYS_I2C_SPEED, 0x7f, p); -} - -/* * Baseboard specific GPIO */ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { @@ -1316,410 +1209,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) } } -/* setup GPIO pinmux and default configuration per baseboard and env */ -void setup_board_gpio(int board, struct ventana_board_info *info) -{ - const char *s; - char arg[10]; - size_t len; - int i; - int quiet = simple_strtol(env_get("quiet"), NULL, 10); - - if (board >= GW_UNKNOWN) - return; - - /* RS232_EN# */ - if (gpio_cfg[board].rs232_en) { - gpio_direction_output(gpio_cfg[board].rs232_en, - (hwconfig("rs232")) ? 0 : 1); - } - - /* MSATA Enable */ - if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { - gpio_direction_output(GP_MSATA_SEL, - (hwconfig("msata")) ? 1 : 0); - } - - /* USBOTG Select (PCISKT or FrontPanel) */ - if (gpio_cfg[board].usb_sel) { - gpio_direction_output(gpio_cfg[board].usb_sel, - (hwconfig("usb_pcisel")) ? 1 : 0); - } - - /* - * Configure DIO pinmux/padctl registers - * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions - */ - for (i = 0; i < gpio_cfg[board].dio_num; i++) { - struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i]; - iomux_v3_cfg_t ctrl = DIO_PAD_CFG; - unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1; - - if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1]) - continue; - sprintf(arg, "dio%d", i); - if (!hwconfig(arg)) - continue; - s = hwconfig_subarg(arg, "padctrl", &len); - if (s) { - ctrl = MUX_PAD_CTRL(hextoul(s, NULL) - & 0x1ffff) | MUX_MODE_SION; - } - if (hwconfig_subarg_cmp(arg, "mode", "gpio")) { - if (!quiet) { - printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i, - (cfg->gpio_param/32)+1, - cfg->gpio_param%32, - cfg->gpio_param); - } - imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] | - ctrl); - gpio_requestf(cfg->gpio_param, "dio%d", i); - gpio_direction_input(cfg->gpio_param); - } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && - cfg->pwm_padmux) { - if (!cfg->pwm_param) { - printf("DIO%d: Error: pwm config invalid\n", - i); - continue; - } - if (!quiet) - printf("DIO%d: pwm%d\n", i, cfg->pwm_param); - imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] | - MUX_PAD_CTRL(ctrl)); - } - } - - if (!quiet) { - if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { - printf("MSATA: %s\n", (hwconfig("msata") ? - "enabled" : "disabled")); - } - if (gpio_cfg[board].rs232_en) { - printf("RS232: %s\n", (hwconfig("rs232")) ? - "enabled" : "disabled"); - } - } -} - -/* setup board specific PMIC */ -void setup_pmic(void) -{ - struct pmic *p; - struct ventana_board_info ventana_info; - int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); - const int i2c_pmic = 1; - u32 reg; - char rev; - int i; - - /* determine board revision */ - rev = 'A'; - for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { - if (ventana_info.model[i] >= 'A') { - rev = ventana_info.model[i]; - break; - } - } - - i2c_set_bus_num(i2c_pmic); - - /* configure PFUZE100 PMIC */ - if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) { - debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); - power_pfuze100_init(i2c_pmic); - p = pmic_get("PFUZE100"); - if (p && !pmic_probe(p)) { - pmic_reg_read(p, PFUZE100_DEVICEID, ®); - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); - - /* Set VGEN1 to 1.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN1VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOA_1_50V | LDO_EN); - pmic_reg_write(p, PFUZE100_VGEN1VOL, reg); - - /* Set SWBST to 5.0V and enable */ - pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); - reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); - pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); - - if (board == GW54xx && (rev == 'G')) { - /* Disable VGEN5 */ - pmic_reg_write(p, PFUZE100_VGEN5VOL, 0); - - /* Set VGEN6 to 2.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOB_2_50V | LDO_EN); - pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); - } - } - - /* put all switchers in continuous mode */ - pmic_reg_read(p, PFUZE100_SW1ABMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW1ABMODE, reg); - - pmic_reg_read(p, PFUZE100_SW2MODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW2MODE, reg); - - pmic_reg_read(p, PFUZE100_SW3AMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW3AMODE, reg); - - pmic_reg_read(p, PFUZE100_SW3BMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW3BMODE, reg); - - pmic_reg_read(p, PFUZE100_SW4MODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW4MODE, reg); - } - - /* configure LTC3676 PMIC */ - else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) { - debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); - power_ltc3676_init(i2c_pmic); - p = pmic_get("LTC3676_PMIC"); - if (!p || pmic_probe(p)) - return; - puts("PMIC: LTC3676\n"); - /* - * set board-specific scalar for max CPU frequency - * per CPU based on the LDO enabled Operating Ranges - * defined in the respective IMX6DQ and IMX6SDL - * datasheets. The voltage resulting from the R1/R2 - * feedback inputs on Ventana is 1308mV. Note that this - * is a bit shy of the Vmin of 1350mV in the datasheet - * for LDO enabled mode but is as high as we can go. - */ - switch (board) { - case GW560x: - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - break; - case GW5903: - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - - /* mask PGOOD during SW4 transition */ - pmic_reg_write(p, LTC3676_DVB4B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW4 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB4A, 0x1f); - break; - case GW5905: - /* mask PGOOD during SW1 transition */ - pmic_reg_write(p, LTC3676_DVB1B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW1 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB1A, 0x1f); - - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - break; - default: - /* mask PGOOD during SW1 transition */ - pmic_reg_write(p, LTC3676_DVB1B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW1 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB1A, 0x1f); - - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - } - - /* put all switchers in continuous mode */ - pmic_reg_write(p, LTC3676_BUCK1, 0xc0); - pmic_reg_write(p, LTC3676_BUCK2, 0xc0); - pmic_reg_write(p, LTC3676_BUCK3, 0xc0); - pmic_reg_write(p, LTC3676_BUCK4, 0xc0); - } - - /* configure MP5416 PMIC */ - else if (!i2c_probe(0x69)) { - puts("PMIC: MP5416\n"); - switch (board) { - case GW5910: - /* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */ - reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000); - i2c_write(0x69, MP5416_VSET_SW1, 1, (uint8_t *)®, 1); - /* SW4: VDD_SOC 1.2V -> (1.350 to 1.475) */ - reg = MP5416_VSET_EN | MP5416_VSET_SW4_SVAL(1475000); - i2c_write(0x69, MP5416_VSET_SW4, 1, (uint8_t *)®, 1); - break; - } - } -} - -#include <fdt_support.h> -#define WDOG1_ADDR 0x20bc000 -#define WDOG2_ADDR 0x20c0000 -#define GPIO3_ADDR 0x20a4000 -#define USDHC3_ADDR 0x2198000 - -static void ft_board_wdog_fixup(void *blob, phys_addr_t addr) -{ - int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr); - - if (off) { - fdt_delprop(blob, off, "ext-reset-output"); - fdt_delprop(blob, off, "fsl,ext-reset-output"); - } -} - -void ft_early_fixup(void *blob, int board_type) -{ - struct ventana_board_info *info = &ventana_info; - char rev = 0; - int i; - - /* determine board revision */ - for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { - if (ventana_info.model[i] >= 'A') { - rev = ventana_info.model[i]; - break; - } - } - - /* - * Board model specific fixups - */ - switch (board_type) { - case GW51xx: - /* - * disable wdog node for GW51xx-A/B to work around - * errata causing wdog timer to be unreliable. - */ - if (rev >= 'A' && rev < 'C') { - i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", - WDOG1_ADDR); - if (i) - fdt_status_disabled(blob, i); - } - - /* GW51xx-E adds WDOG1_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - - case GW52xx: - /* GW522x Uses GPIO3_IO23 instead of GPIO1_IO29 */ - if (info->model[4] == '2') { - u32 handle = 0; - u32 *range = NULL; - - i = fdt_node_offset_by_compatible(blob, -1, - "fsl,imx6q-pcie"); - if (i) - range = (u32 *)fdt_getprop(blob, i, - "reset-gpio", NULL); - - if (range) { - i = fdt_node_offset_by_compat_reg(blob, - "fsl,imx6q-gpio", GPIO3_ADDR); - if (i) - handle = fdt_get_phandle(blob, i); - if (handle) { - range[0] = cpu_to_fdt32(handle); - range[1] = cpu_to_fdt32(23); - } - } - - /* these have broken usd_vsel */ - if (strstr((const char *)info->model, "SP318-B") || - strstr((const char *)info->model, "SP331-B")) - gpio_cfg[board_type].usd_vsel = 0; - - /* GW522x-B adds WDOG1_B external reset */ - if (rev < 'B') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - } - - /* GW520x-E adds WDOG1_B external reset */ - else if (info->model[4] == '0' && rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - - case GW53xx: - /* GW53xx-E adds WDOG1_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - - /* GW53xx-G has an adv7280 instead of an adv7180 */ - else if (rev > 'F') { - i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); - if (i) { - fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); - fdt_setprop_empty(blob, i, "adv,force-bt656-4"); - } - } - break; - - case GW54xx: - /* - * disable serial2 node for GW54xx for compatibility with older - * 3.10.x kernel that improperly had this node enabled in the DT - */ - fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED); - - /* GW54xx-E adds WDOG2_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG2_ADDR); - - /* GW54xx-G has an adv7280 instead of an adv7180 */ - else if (rev > 'F') { - i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); - if (i) { - fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); - fdt_setprop_empty(blob, i, "adv,force-bt656-4"); - } - } - break; - - case GW551x: - /* GW551x-C adds WDOG1_B external reset */ - if (rev < 'C') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - case GW5901: - case GW5902: - /* GW5901/GW5901 revB adds WDOG1_B as an external reset */ - if (rev < 'B') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - } - - /* remove no-1-8-v if UHS-I support is present */ - if (gpio_cfg[board_type].usd_vsel) { - debug("Enabling UHS-I support\n"); - i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc", - USDHC3_ADDR); - if (i) - fdt_delprop(blob, i, "no-1-8-v"); - } -} - #ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2]; |