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-rw-r--r--board/integratorcp/flash.c32
-rw-r--r--board/integratorcp/integratorcp.c18
2 files changed, 25 insertions, 25 deletions
diff --git a/board/integratorcp/flash.c b/board/integratorcp/flash.c
index 7effea6aacd..5059daeec92 100644
--- a/board/integratorcp/flash.c
+++ b/board/integratorcp/flash.c
@@ -37,7 +37,7 @@
#define DEBUG
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Board support for 1 or 2 flash devices */
#define FLASH_PORT_WIDTH32
@@ -106,23 +106,23 @@ unsigned long flash_init (void)
else
nbanks = 1;
- if (nbanks > CFG_MAX_FLASH_BANKS)
- nbanks = CFG_MAX_FLASH_BANKS;
+ if (nbanks > CONFIG_SYS_MAX_FLASH_BANKS)
+ nbanks = CONFIG_SYS_MAX_FLASH_BANKS;
/* Enable flash write */
cpcr[1] |= 3;
for (i = 0; i < nbanks; i++) {
- flash_get_size ((FPW *)(CFG_FLASH_BASE + size), &flash_info[i]);
- flash_get_offsets (CFG_FLASH_BASE + size, &flash_info[i]);
+ flash_get_size ((FPW *)(CONFIG_SYS_FLASH_BASE + size), &flash_info[i]);
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE + size, &flash_info[i]);
size += flash_info[i].size;
}
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection */
flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
#endif
#ifdef CONFIG_ENV_IS_IN_FLASH
@@ -228,8 +228,8 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
else
nsects = 64;
- if (nsects > CFG_MAX_FLASH_SECT)
- nsects = CFG_MAX_FLASH_SECT;
+ if (nsects > CONFIG_SYS_MAX_FLASH_SECT)
+ nsects = CONFIG_SYS_MAX_FLASH_SECT;
/* Write auto select command: read Manufacturer ID */
addr[0x5555] = (FPW) 0x00AA00AA;
@@ -280,10 +280,10 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
break;
}
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
+ if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
+ info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+ info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
}
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
@@ -308,7 +308,7 @@ void flash_unprotect_sectors (FPWV * addr)
reset_timer_masked();
while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
+ if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf("Timeout");
break;
}
@@ -384,7 +384,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
enable_interrupts();
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+ if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
*addr = (FPW)0x00700070;
status = *addr;
if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
@@ -538,7 +538,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
/* wait while polling the status register */
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
#ifdef DEBUG
*addr = (FPW) 0x00700070;
status = *addr;
diff --git a/board/integratorcp/integratorcp.c b/board/integratorcp/integratorcp.c
index 220513f3294..72629ce2b31 100644
--- a/board/integratorcp/integratorcp.c
+++ b/board/integratorcp/integratorcp.c
@@ -143,7 +143,7 @@ extern void dram_query(void);
* can be divided by 16 or 256
* and can be set up as a 32-bit timer
*/
-/* U-Boot expects a 32 bit timer, running at CFG_HZ */
+/* U-Boot expects a 32 bit timer, running at CONFIG_SYS_HZ */
/* Keep total timer count to avoid losing decrements < div_timer */
static unsigned long long total_count = 0;
static unsigned long long lastdec; /* Timer reading at last call */
@@ -151,13 +151,13 @@ static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
static unsigned long long div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
-/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
+/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */
static ulong timestamp; /* U-Boot ticks since startup */
#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
+#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
-/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
+/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec
* - unless otherwise stated
*/
@@ -166,7 +166,7 @@ static ulong timestamp; /* U-Boot ticks since startup */
int interrupt_init (void)
{
/* Load timer with initial value */
- *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;
/* Set timer to be
* enabled 1
* periodic 1
@@ -176,12 +176,12 @@ int interrupt_init (void)
* 32 bit 1
* wrapping 0
*/
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2;
/* init the timestamp */
total_count = 0ULL;
reset_timer_masked();
- div_timer = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
+ div_timer = (unsigned long long)(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ);
div_timer /= div_clock;
return (0);
@@ -212,7 +212,7 @@ void udelay (unsigned long usec)
ulong tmo, tmp;
/* Convert to U-Boot ticks */
- tmo = usec * CFG_HZ;
+ tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000000L);
tmp = get_timer_masked(); /* get current timestamp */
@@ -275,5 +275,5 @@ unsigned long long get_ticks(void)
*/
ulong get_tbclk (void)
{
- return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);
+ return (ulong)(((unsigned long long)CONFIG_SYS_HZ_CLOCK)/div_clock);
}