summaryrefslogtreecommitdiff
path: root/board/siemens/smartweb/smartweb.c
diff options
context:
space:
mode:
Diffstat (limited to 'board/siemens/smartweb/smartweb.c')
-rw-r--r--board/siemens/smartweb/smartweb.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index d500a6214d5..15044c7d0ed 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -42,8 +42,8 @@ DECLARE_GLOBAL_DATA_PTR;
static void smartweb_request_gpio(void)
{
- gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
- gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+ gpio_request(CFG_SYS_NAND_ENABLE_PIN, "nand ena");
+ gpio_request(CFG_SYS_NAND_READY_PIN, "nand rdy");
gpio_request(AT91_PIN_PA26, "ena PHY");
}
@@ -72,10 +72,10 @@ static void smartweb_nand_hw_init(void)
&smc->cs[3].mode);
/* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+ at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+ at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
}
static void smartweb_macb_hw_init(void)
@@ -167,7 +167,7 @@ int board_init(void)
#endif
/* Adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
smartweb_nand_hw_init();
smartweb_macb_hw_init();
@@ -177,8 +177,8 @@ int board_init(void)
int dram_init(void)
{
gd->ram_size = get_ram_size(
- (void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
+ (void *)CFG_SYS_SDRAM_BASE,
+ CFG_SYS_SDRAM_SIZE);
return 0;
}
@@ -246,7 +246,7 @@ void mem_init(void)
setting.cr = SDRAM_BASE_CONF;
setting.mdr = AT91_SDRAMC_MD_SDRAM;
- setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
+ setting.tr = (CFG_SYS_MASTER_CLOCK * 7) / 1000000;
/*
* I write here directly in this register, because this