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Diffstat (limited to 'board/xilinx/versal-net/board.c')
-rw-r--r--board/xilinx/versal-net/board.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 4d5913cff1d..65b2a451ad7 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -21,6 +21,8 @@
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
+#include <zynqmp_firmware.h>
+#include <versalpl.h>
#include "../common/board.h"
#include <linux/bitfield.h>
@@ -29,10 +31,21 @@
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_FPGA_VERSALPL)
+static xilinx_desc versalpl = {
+ xilinx_versal_net, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
+ FPGA_LEGACY
+};
+#endif
+
int board_init(void)
{
printf("EL Level:\tEL%d\n", current_el());
+#if defined(CONFIG_FPGA_VERSALPL)
+ fpga_init();
+ fpga_add(fpga_xilinx, &versalpl);
+#endif
return 0;
}
@@ -184,7 +197,11 @@ static u8 versal_net_get_bootmode(void)
u8 bootmode;
u32 reg = 0;
- reg = readl(&crp_base->boot_mode_usr);
+ if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) {
+ reg = zynqmp_pm_get_bootmode_reg();
+ } else {
+ reg = readl(&crp_base->boot_mode_usr);
+ }
if (reg >> BOOT_MODE_ALT_SHIFT)
reg >>= BOOT_MODE_ALT_SHIFT;