diff options
Diffstat (limited to 'board/xilinx/zynq/board.c')
-rw-r--r-- | board/xilinx/zynq/board.c | 49 |
1 files changed, 44 insertions, 5 deletions
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 5119c09037..485a5e4a24 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <fdtdec.h> #include <netdev.h> #include <zynqpl.h> #include <asm/arch/hardware.h> @@ -17,6 +18,7 @@ Xilinx_desc fpga; /* It can be done differently */ Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); +Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); @@ -34,6 +36,9 @@ int board_init(void) case XILINX_ZYNQ_7010: fpga = fpga010; break; + case XILINX_ZYNQ_7015: + fpga = fpga015; + break; case XILINX_ZYNQ_7020: fpga = fpga020; break; @@ -49,8 +54,6 @@ int board_init(void) } #endif - icache_enable(); - #ifdef CONFIG_FPGA fpga_init(); fpga_add(fpga_xilinx, &fpga); @@ -59,8 +62,26 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { + case ZYNQ_BM_NOR: + setenv("modeboot", "norboot"); + break; + case ZYNQ_BM_SD: + setenv("modeboot", "sdboot"); + break; + case ZYNQ_BM_JTAG: + setenv("modeboot", "jtagboot"); + break; + default: + setenv("modeboot", ""); + break; + } + + return 0; +} -#ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) { u32 ret = 0; @@ -94,7 +115,6 @@ int board_eth_init(bd_t *bis) #endif return ret; } -#endif #ifdef CONFIG_CMD_MMC int board_mmc_init(bd_t *bd) @@ -115,8 +135,27 @@ int board_mmc_init(bd_t *bd) int dram_init(void) { +#ifdef CONFIG_OF_CONTROL + int node; + fdt_addr_t addr; + fdt_size_t size; + const void *blob = gd->fdt_blob; + + node = fdt_node_offset_by_prop_value(blob, -1, "device_type", + "memory", 7); + if (node == -FDT_ERR_NOTFOUND) { + debug("ZYNQ DRAM: Can't get memory node\n"); + return -1; + } + addr = fdtdec_get_addr_size(blob, node, "reg", &size); + if (addr == FDT_ADDR_T_NONE || size == 0) { + debug("ZYNQ DRAM: Can't get base address or size\n"); + return -1; + } + gd->ram_size = size; +#else gd->ram_size = CONFIG_SYS_SDRAM_SIZE; - +#endif zynq_ddrc_init(); return 0; |