diff options
Diffstat (limited to 'board')
35 files changed, 6401 insertions, 0 deletions
diff --git a/board/ti/logic/Makefile b/board/ti/logic/Makefile new file mode 100644 index 00000000000..67c7fd3f926 --- /dev/null +++ b/board/ti/logic/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +PROD_ID_OBJS := prod-id/query.o prod-id/startup.o prod-id/crc-15.o \ + prod-id/extract.o prod-id/type.o prod-id/size.o + +COBJS := logic.o logic-data.o logic-at88.o logic-at24.o logic-i2c.o logic-gpio.o logic-display.o logic-product-id.o $(PROD_ID_OBJS) + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/ti/logic/config.mk b/board/ti/logic/config.mk new file mode 100644 index 00000000000..897b252b07d --- /dev/null +++ b/board/ti/logic/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2006 - 2008 +# Texas Instruments, <www.ti.com> +# +# EVM uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000'0000 (bank0) +# A000/0000 (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +CONFIG_SYS_TEXT_BASE = 0x80400000 diff --git a/board/ti/logic/logic-at24.c b/board/ti/logic/logic-at24.c new file mode 100644 index 00000000000..e1f03db2ce1 --- /dev/null +++ b/board/ti/logic/logic-at24.c @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/clocks.h> +#include <asm/arch/mem.h> +#include <i2c.h> +#include <asm/mach-types.h> +#include "logic-i2c.h" + +#define AT24_CHIP_ID 0xA0 +#define AT24_ACCESS_WRITE 0 +#define AT24_ACCESS_READ 1 + +#define AT24_DEVICE_ADDRESS(rw) (AT24_CHIP_ID | (rw & 1)) +#define AT24_SIZE_MASK 0x7FF /* 2048 byte AT24C16 */ +int at24_wakeup(void) +{ + int i; + gpio_i2c_init(100000); + + /* Need 9 clocks to wake up AT24 chips */ + gpio_i2c_config_pin(GPIO_I2C_SCLK, GPIO_I2C_OUTPUT); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + for (i=0; i<10; ++i) { + udelay(100); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + udelay(100); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + } + + /* We can't identify AT24 chips... */ + + return 0; + +} + +int at24_shutdown(void) +{ + /* Restore GPIO_OE registers back to reset state (All input) */ + gpio_i2c_config_pin(GPIO_I2C_SDATA, GPIO_I2C_INPUT); + gpio_i2c_config_pin(GPIO_I2C_SCLK, GPIO_I2C_INPUT); + /* Restore pins back to their intended use */ + gpio_i2c_restore_pins(); +} + +/* Send the offset to the AT24 chip */ +static int at24_send_offset(u32 offset) +{ + int sleeps = 100; + int timeout = 1000; + int err, i; + u32 byteoffset, sizemask, sentoffset; + + do { + while (gpio_i2c_busy() && timeout--) + udelay(100); + sleeps--; + + gpio_i2c_tx_start(); + + err = gpio_i2c_tx_byte(AT24_DEVICE_ADDRESS(AT24_ACCESS_WRITE)); + + /* If the eeprom is busy, reset the bus an start over */ + if (err) + gpio_i2c_tx_stop(); + + if (err && !sleeps) { + /* NACK, return error */ + return err; + } + } while (err); + + /* Write the destination offset to the AT24 */ + sizemask = AT24_SIZE_MASK; + sentoffset = offset & sizemask; + + for (i=0; i<4; ++i) { + byteoffset = (sentoffset & 0xFF000000) >> 24; + if (sizemask & 0xFF000000) { + err = gpio_i2c_tx_byte(byteoffset); + if (err) + return err; + } + sentoffset <<= 8; + sizemask <<= 8; + } + return 0; +} + +/* Read 'size' bytes from the AT88 at offset 'offset'; return 0 if good */ +int at24_read(u32 offset, u8 *buf, u32 size) +{ + int rx_mode; + int err, idx; + + err = at24_send_offset(offset); + if (err) + return err; + gpio_i2c_tx_stop(); + + gpio_i2c_tx_start(); + err = gpio_i2c_tx_byte(AT24_DEVICE_ADDRESS(AT24_ACCESS_READ)); + if (err) + return err; + + for (idx = 0; idx < size; ++idx) { + if (size == 1) + rx_mode = RX_MODE_ONE_BYTE; + else if (idx == (size - 1)) + rx_mode = RX_MODE_LAST_BYTE; + else if (idx == (size - 2)) + rx_mode = RX_MODE_NEXT_TO_LAST_BYTE; + else if (idx == 0) + rx_mode = RX_MODE_FIRST_BYTE; + else + rx_mode = RX_MODE_MIDDLE_BYTE; + + err = gpio_i2c_rx_byte(&buf[idx], rx_mode); + if (err) + printf("%s:%d err idx %d\n", __FUNCTION__, __LINE__, idx); + } + + gpio_i2c_tx_stop(); + return err; +} diff --git a/board/ti/logic/logic-at24.h b/board/ti/logic/logic-at24.h new file mode 100644 index 00000000000..43c8b1bc972 --- /dev/null +++ b/board/ti/logic/logic-at24.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +extern int at24_read(u32 offset, u8 *buf, u32 size); +extern int at24_wakeup(void); +extern int at24_shutdown(void); diff --git a/board/ti/logic/logic-at88.c b/board/ti/logic/logic-at88.c new file mode 100644 index 00000000000..21299cadc80 --- /dev/null +++ b/board/ti/logic/logic-at88.c @@ -0,0 +1,117 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/clocks.h> +#include <asm/arch/mem.h> +#include <i2c.h> +#include <asm/mach-types.h> +#include "product_id.h" +#include "logic-gpio.h" +#include "logic-i2c.h" +#include "logic-at88.h" +#include "logic-data.h" + +int at88_send_packet(uint8_t *data, int len, uint8_t *rxbuf, int rxlen) +{ + int timeout = 1000; + int retry; + int rx_mode; + int tick, err, idx; + + if (DEBUG_PRODUCTION_DATA) { + char buf[3 * len + 2]; + int i, offset; + for (offset = 0, i=0; i<len; ++i) { + if (!i) + offset = sprintf(buf, "%02x", data[i]); + else + offset += sprintf(&buf[offset], " %02x", data[i]); + } + printf("%s: %s\n", __FUNCTION__, buf); + } + + /* Wait for bus */ + while (gpio_i2c_busy() && timeout--) + udelay(100); + + if (!timeout) + printf("%s:%d i2c_busy never return zero!\n", __FUNCTION__, __LINE__); + + retry = 0; + do { + tick = 0; + do { + gpio_i2c_tx_stop(); + gpio_i2c_tx_start(); + + /* send cmd */ + err = gpio_i2c_tx_byte(data[0]); + tick++; + } while (err && tick < 100); + + if (tick > 3) + printf("I2C ACK polling tick %d!\n", tick); + + for (idx = 1; idx<len; ++idx) { + err = gpio_i2c_tx_byte(data[idx]); + if (err) { + printf("%s:%d NACK idx %d\n", __FUNCTION__, __LINE__, idx); + } + } + } while (err && (retry++ < 5)); + + if (err) + return err; + + /* Are we expecting a response? */ + if (rxbuf) { + for (idx = 0; idx < rxlen; ++idx) { + if (rxlen == 1) + rx_mode = RX_MODE_ONE_BYTE; + else if (idx == (rxlen - 1)) + rx_mode = RX_MODE_LAST_BYTE; + else if (idx == (rxlen - 2)) + rx_mode = RX_MODE_NEXT_TO_LAST_BYTE; + else if (idx == 0) + rx_mode = RX_MODE_FIRST_BYTE; + else + rx_mode = RX_MODE_MIDDLE_BYTE; + + err = gpio_i2c_rx_byte(&rxbuf[idx], rx_mode); + if (DEBUG_PRODUCTION_DATA) { + if (err) + printf("%s:%d err idx %d\n", __FUNCTION__, __LINE__, idx); + } + } + } + + gpio_i2c_tx_stop(); + return err; +} + + + diff --git a/board/ti/logic/logic-at88.h b/board/ti/logic/logic-at88.h new file mode 100644 index 00000000000..6f66f8a0c8d --- /dev/null +++ b/board/ti/logic/logic-at88.h @@ -0,0 +1,23 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +extern int at88_send_packet(uint8_t *data, int len, uint8_t *rxbuf, int rxlen); diff --git a/board/ti/logic/logic-data.c b/board/ti/logic/logic-data.c new file mode 100644 index 00000000000..ba4633bf891 --- /dev/null +++ b/board/ti/logic/logic-data.c @@ -0,0 +1,643 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/clocks.h> +#include <asm/arch/mem.h> +#include <i2c.h> +#include <asm/mach-types.h> +#include "product_id.h" +#include "logic-gpio.h" +#include "logic-i2c.h" +#include "logic-at88.h" +#include "logic-product-id.h" +#include "logic-data.h" + +static int header_version = -1; + + +/* + * Identify the device + */ +struct device_param { + char *name; + unsigned char reset[8]; /* ATR for part */ + unsigned int zones; /* number of zones */ + unsigned int zonesize; /* bytes per zone */ +}; + +static const struct device_param answers[] = { + { + .name = "AT88SC0104C", + .reset = {0x3B, 0xB2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x01}, + .zones = 4, + .zonesize = 32 + }, + { + .name = "AT88SC0204C", + .reset = {0x3B, 0xB2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x02}, + .zones = 4, + .zonesize = 64 + }, + { + .name = "AT88SC0404C", + .reset = {0x3B, 0xB2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x04}, + .zones = 4, + .zonesize = 128 + }, + { + .name = "AT88SC0808C", + .reset = {0x3B, 0xB2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x08}, + .zones = 8, + .zonesize = 128 + }, + { + .name = "AT88SC1616C", + .reset = {0x3B, 0xB2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x16}, + .zones = 16, + .zonesize = 128 + }, + { + .name = "AT88SC3216C", + .reset = {0x3B, 0xB3, 0x11, 0x00, 0x00, 0x00, 0x00, 0x32}, + .zones = 16, + .zonesize = 256 + }, + { + .name = "AT88SC6416C", + .reset = {0x3B, 0xB3, 0x11, 0x00, 0x00, 0x00, 0x00, 0x64}, + .zones = 16, + .zonesize = 512 + }, + { + .name = "AT88SC12816C", + .reset = {0x3B, 0xB3, 0x11, 0x00, 0x00, 0x00, 0x01, 0x28}, + .zones = 16, + .zonesize = 1024 + }, + { + .name = "AT88SC25616C", + .reset = {0x3B, 0xB3, 0x11, 0x00, 0x00, 0x00, 0x02, 0x56}, + .zones = 16, + .zonesize = 2048 + }, +}; + +static const struct device_param *devptr; /* pointer to ID'd device */ + +#define CMD_SYSTEM_READ 0xB6 + +static int +identify_device(void) +{ + const struct device_param *p; + unsigned char cmd[] = { CMD_SYSTEM_READ, 0x00, 0x00, 0x00 }; + unsigned char buf[8]; + int err; + int i,j; + + err = at88_send_packet(cmd, sizeof(cmd), buf, sizeof(buf)); + if (err) + return err; + + if (DEBUG_PRODUCTION_DATA) + printf("%s: ident %02x %02x %02x %02x %02x %02x %02x %02x\n", __FUNCTION__, + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); + + for (p=answers,i=0; i<sizeof(answers)/sizeof(answers[0]); ++i,++p) { + for (j=0; j<8 && (p->reset[j] == buf[j]); ++j) + ; + if (j==8) { + devptr = p; + + if (DEBUG_PRODUCTION_DATA) + printf("%s: device %s zones %u zonesize %u\n", __FUNCTION__, + devptr->name, devptr->zones, devptr->zonesize); + + return 0; + } + } + + if (DEBUG_PRODUCTION_DATA) + printf("%s: Huh? couldn't ID productID device\n", __FUNCTION__); + + return -1; +} + +#define CMD_SYSTEM_WRITE 0xB4 + +static int +set_user_zone(int zone) +{ + unsigned char cmd[] = { CMD_SYSTEM_WRITE, 0x03, 0x00, 0x00 }; + + if (DEBUG_PRODUCTION_DATA) + printf("%s: zone %d\n", __FUNCTION__, zone); + cmd[2] = zone; + return at88_send_packet(cmd, sizeof(cmd), NULL, 0); +} + +#define CMD_READ_USER_ZONE 0xB2 + +static int +read_user_zone(unsigned int startzone, unsigned int offset,unsigned char *buf, int len) +{ + unsigned char cmd[] = { CMD_READ_USER_ZONE, 0x00, 0x00, 0x00 }; + int ret; + unsigned int endzone; + unsigned int nbytes, zone_offset; + + if (DEBUG_PRODUCTION_DATA) + printf("%s: offset %u len %d\n", __FUNCTION__, offset, len); + + /* If zone is non-zero, then we use zone/offset addressing, not + offset from start of chip */ + + /* abort if we'll go past the end of the device */ + if (startzone) { + if (offset > devptr->zonesize) { + printf("%s: offset %u > zonesize %u\n", __FUNCTION__, offset, devptr->zonesize); + return -1; + } + if (startzone > devptr->zones) { + printf("%s: startzone %u > numzones %u\n", __FUNCTION__, startzone, devptr->zones); + return -1; + } + } else { + startzone = offset / devptr->zonesize; + } + endzone = (offset + (len - 1)) / devptr->zonesize; + if (endzone > devptr->zones) { + printf("%s: endzone %u > numzones %u\n", __FUNCTION__, endzone, devptr->zones); + return -1; + } + + do { + /* Set the zone */ + if (set_user_zone(startzone)) + return -1; + + zone_offset = offset % devptr->zonesize; + nbytes = devptr->zonesize - zone_offset; + if (nbytes > len) + nbytes = len; + + cmd[2] = zone_offset; + cmd[3] = nbytes; + ret = at88_send_packet(cmd, sizeof(cmd), buf, nbytes); + if (DEBUG_PRODUCTION_DATA_BUF) { + char obuf[128]; + int i,j,offset; + for (i = 0, offset=0; i<len; i+=16) { + for (j = 0; j<16 && i+j<len; ++j) + if (!j) + offset = sprintf(obuf, "%02x", buf[i+j]); + else + offset += sprintf(&obuf[offset], " %02x", buf[i+j]); + printf("%s\n", obuf); + } + } + + buf += nbytes; + len -= nbytes; + offset += nbytes; + startzone++; + } while (len); + return ret; +} + +#define XMK_STR(x) #x +#define MK_STR(x) XMK_STR(x) +int production_data_valid; + +static struct product_id_data product_id_data; + +static int valid_mac_address(unsigned char mac[3]) +{ + if (mac[0] == 0xff && mac[1] == 0xff && mac[2] == 0xff) + return 0; + if (mac[0] == 0x00 && mac[1] == 0x00 && mac[2] == 0x00) + return 0; + return !0; +} + +static int valid_full_mac_address(unsigned char mac[6]) +{ + return (valid_mac_address(&mac[0]) && valid_mac_address(&mac[3])); +} + +int extract_mac_address(struct product_id_data *p, int position, unsigned char mac[6]) +{ + unsigned char *m = NULL; + if (!production_data_valid) + return -1; + + if (DEBUG_PRODUCTION_DATA) + printf("%s: position %d\n", __FUNCTION__, position); + switch(position) { + case 0: + if (header_version >= 2) { + if (valid_full_mac_address(p->d.u_zone0.pz_0r2.full_mac)) { + memcpy(mac, p->d.u_zone0.pz_0r2.full_mac, 6); + goto out; + } + } + m = p->d.zone2.pz_2r0.mac0; + break; + case 1: + m = p->d.zone2.pz_2r0.mac1; + break; + case 2: + m = p->d.zone2.pz_2r0.mac2; + break; + case 3: + m = p->d.zone2.pz_2r0.mac3; + break; + default: + return -1; + } + if (valid_mac_address(m)) { + mac[0] = 0x00; + mac[1] = 0x08; + mac[2] = 0xee; + mac[3] = m[0]; + mac[4] = m[1]; + mac[5] = m[2]; + } else { + return -1; + } + +out: + if (DEBUG_PRODUCTION_DATA) + printf("%s:%d valid %d position %d %02x:%02x:%02x:%02x:%02x:%02x\n", __FUNCTION__, __LINE__, + production_data_valid, position, + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + return 0; +} + +/* + * Extract/set an ethernet address. + * Which is the address in the environment, position is which MAC address + * in the product ID data + */ +void board_get_nth_enetaddr (unsigned char *enetaddr, int which, int position) +{ + unsigned char mac[6]; + char buf[32]; + char *s = NULL, *e; + int i; + char ethbuf[18]; + int ret; + + /* We only handle the first two interfaces (LAN/WiFi)... */ + if (which >= 2) + return; + + memset(mac, 0, sizeof(mac)); + ret = extract_mac_address(&product_id_data, position, mac); + if (DEBUG_PRODUCTION_DATA) + printf("%s: ret %d valid %d which %d position %d %02x:%02x:%02x:%02x:%02x:%02x\n", __FUNCTION__, + ret, production_data_valid, which, position, + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + + memset(enetaddr, '\0', 6); + if (!production_data_valid || + !valid_full_mac_address(mac)) { + if (DEBUG_PRODUCTION_DATA) + printf("%s: no valid address\n", __FUNCTION__); + s = getenv("ethaddr"); + +#ifdef CONFIG_ETHADDR + if (!s) + s = MK_STR(CONFIG_ETHADDR); +#endif + + /* If no ethaddr found in productID or environment, then punt*/ + if (!s) + return; + + for (i = 0; i < 6; ++i) { + enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; + if (s) + s = (*e) ? e + 1 : e; + } + goto set_it; + } + + memcpy(enetaddr, mac, 6); + +set_it: + if (which == 0) { + sprintf(ethbuf, "%02x:%02x:%02x:%02x:%02x:%02x", enetaddr[0], enetaddr[1], enetaddr[2], enetaddr[3], enetaddr[4], enetaddr[5]); + sprintf(buf, "ethaddr"); + } else { + sprintf(ethbuf, "%02x:%02x:%02x:%02x:%02x:%02x", enetaddr[0], enetaddr[1], enetaddr[2], enetaddr[3], enetaddr[4], enetaddr[5]); + sprintf(buf, "eth%daddr", which); + } + if (DEBUG_PRODUCTION_DATA) + printf("setenv '%s' '%s'\n", __FUNCTION__, ethbuf); + + /* If already set, then don't change it */ + s = getenv(buf); + if (s) { + if (strcmp(s, ethbuf) != 0) + printf("Overriding %s productID value %s with environment value\n", buf, ethbuf); + return; + } + setenv(buf, ethbuf); +} + +static int extract_product_id_part_number(struct product_id_data *p, char *buf, int buflen) +{ + int size; + + if (!production_data_valid) + return -1; + + buf[0] = '\0'; + if (header_version == LOGIC_HEADER_VERSION_0) { + size = sizeof(p->d.u_zone0.pz_0r0.part_number); + if (buflen < sizeof(p->d.u_zone0.pz_0r0.part_number)) + size = buflen; + strncpy(buf, p->d.u_zone0.pz_0r0.part_number, sizeof(p->d.u_zone0.pz_0r0.part_number)); + buf[sizeof(p->d.u_zone0.pz_0r0.part_number)] = '\0'; + return 0; + } + + if (header_version == LOGIC_HEADER_VERSION_1) { + size = sizeof(p->d.u_zone0.pz_0r1.part_number); + if (buflen < sizeof(p->d.u_zone0.pz_0r1.part_number)) + size = buflen; + strncpy(buf, p->d.u_zone0.pz_0r1.part_number, sizeof(p->d.u_zone0.pz_0r1.part_number)); + buf[sizeof(p->d.u_zone0.pz_0r1.part_number)] = '\0'; + return 0; + } + + if (p->d.u_zone0.pz_0r0.header_version == LOGIC_HEADER_VERSION_2 + || p->d.u_zone0.pz_0r0.header_version == LOGIC_HEADER_VERSION_3) { + size = sizeof(p->d.u_zone0.pz_0r2.part_number); + if (buflen < sizeof(p->d.u_zone0.pz_0r2.part_number)) + size = buflen; + strncpy(buf, p->d.u_zone0.pz_0r2.part_number, sizeof(p->d.u_zone0.pz_0r2.part_number)); + buf[sizeof(p->d.u_zone0.pz_0r2.part_number)] = '\0'; + return 0; + } + + return -1; +} + + +static int extract_header_version(struct product_id_data *p, int *header_version) +{ + if (p->d.u_zone0.pz_0r0.header_version == LOGIC_HEADER_VERSION_0) { + *header_version = p->d.u_zone0.pz_0r0.header_version; + return 0; + } + + if (p->d.u_zone0.pz_0r1.header_version == LOGIC_HEADER_VERSION_1) { + *header_version = p->d.u_zone0.pz_0r1.header_version; + return 0; + } + + if (p->d.u_zone0.pz_0r2.header_version == LOGIC_HEADER_VERSION_2 + || p->d.u_zone0.pz_0r2.header_version == LOGIC_HEADER_VERSION_3) { + *header_version = p->d.u_zone0.pz_0r2.header_version; + return 0; + } + + *header_version = -1; + return -1; + +} + +static int extract_serial_number(struct product_id_data *p, char *buf, int buflen) +{ + buf[0] = '\0'; + + if (!production_data_valid) + return -1; + + if (header_version == LOGIC_HEADER_VERSION_0) { + sprintf(buf, "%02d%02d%c%05d", p->d.u_zone0.pz_0r0.sn_week, + p->d.u_zone0.pz_0r0.sn_year, p->d.u_zone0.pz_0r0.sn_site, + p->d.u_zone0.pz_0r0.sn_cnt); + return 0; + } + if (header_version == LOGIC_HEADER_VERSION_1) { + sprintf(buf, "%02d%02d%c%05d", p->d.u_zone0.pz_0r1.sn_week, + p->d.u_zone0.pz_0r1.sn_year, p->d.u_zone0.pz_0r1.sn_site, + p->d.u_zone0.pz_0r1.sn_cnt); + return 0; + } + if (header_version == LOGIC_HEADER_VERSION_2 + || header_version == LOGIC_HEADER_VERSION_3) { + sprintf(buf, "%02d%02d%c%05d", p->d.u_zone0.pz_0r2.sn_week, + p->d.u_zone0.pz_0r2.sn_year, p->d.u_zone0.pz_0r2.sn_site, + p->d.u_zone0.pz_0r2.sn_cnt); + return 0; + } + return -1; +} + +static void extract_model_number_revision(struct product_id_data *p, char *buf, int buflen) +{ + int i; + + strncpy(buf, product_id_data.d.zone1.model_number, buflen); + buf[buflen-1] = '\0'; + if (header_version < LOGIC_HEADER_VERSION_2) { + i = strlen(buf); + if (i + 3 < buflen) { + buf[i] = '-'; + buf[i+1] = product_id_data.d.zone1.model_revision; + buf[i+2] = '\0'; + } + } +} + +int _fetch_production_data(void) +{ + int err = 0; + int checksum; + int i; + + production_data_valid = 0; + + /* Make sure voltage is to productID chip! */ + gpio_i2c_init(50000); + + /* The productID chip wants at least 5 clocks to wake it up... */ + gpio_i2c_config_pin(GPIO_I2C_SCLK, GPIO_I2C_OUTPUT); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + for (i=0; i<10; ++i) { + udelay(100); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + udelay(100); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + } + + printf("Read production data: "); + + if (identify_device()) { + printf("failed to identify device!\n"); + err = -1; + goto out; + } + + if (read_user_zone(0, 0, (unsigned char *)&product_id_data.d.u_zone0, sizeof(product_id_data.d.u_zone0))) { + printf("failed!\n"); + err = -1; + goto out; + } + + /* If the header doesn't match, we can't map any of the data */ + if (extract_header_version(&product_id_data, &header_version)) { + printf("failed - invalid header version %d!\n", header_version); + err = -2; + goto out; + } + + if (read_user_zone(0, 32, (unsigned char *)&product_id_data.d.zone1, sizeof(product_id_data.d.zone1))) { + printf("failed reading zone1 data!\n"); + err = -3; + goto out; + } + + if (read_user_zone(0, 64, (unsigned char *)&product_id_data.d.zone2, sizeof(product_id_data.d.zone2))) { + printf("failed reading zone2 data!\n"); + err = -4; + goto out; + } + + printf("done\n"); + + production_data_valid = 1; + /* Correct endianess issues */ + product_id_data.d.zone2.pz_2r0.processor_type = le16_to_cpu(product_id_data.d.zone2.pz_2r0.processor_type); + + if (header_version < 2) + product_id_data.d.zone2.pz_2r0.feature_bits = le32_to_cpu(product_id_data.d.zone2.pz_2r0.feature_bits); + + product_id_data.d.zone2.pz_2r0.platform_bits = le32_to_cpu(product_id_data.d.zone2.pz_2r0.platform_bits); + + /* WiFi config data starts at begining of zone 2. Don't bother + reading it if we know it can't fit in the productID chip */ + if (2 + sizeof(product_id_data.d.wifi_config_data.data) / devptr->zonesize < devptr->zones) { + if (read_user_zone(2, 0, (unsigned char *)&product_id_data.d.wifi_config_data.data, sizeof(product_id_data.d.wifi_config_data.data))) { + printf("failed reading wifi_config data!\n"); + } else + product_id_data.d.wifi_config_data.valid = 1; + } + +out: + + /* Restore GPIO_OE registers back to reset state (All input) */ + gpio_i2c_config_pin(GPIO_I2C_SDATA, GPIO_I2C_INPUT); + gpio_i2c_config_pin(GPIO_I2C_SCLK, GPIO_I2C_INPUT); + + /* Restore pins back to their intended use */ + gpio_i2c_restore_pins(); + + /* Calculate a checksum for the data and copy the + * production data to the start of SRAM */ + checksum = calculate_checksum(&product_id_data.d, + sizeof(product_id_data.d)); + product_id_data.checksum = checksum; + + *(struct product_id_data *)(SRAM_BASE) = product_id_data; + + return err; +} + +void _dump_production_data(void) +{ + /* DECLARE_GLOBAL_DATA_PTR; */ + char buf[36]; + unsigned char mac[6]; + int ret; + int i; + + if (!production_data_valid) + return; + + /* Print out the name, model number, and set MAC addresses */ + extract_product_id_part_number(&product_id_data, buf, sizeof(buf)); + printf("Part Number : %s\n", buf); + + extract_model_number_revision(&product_id_data, buf, sizeof(buf)); + if (strlen(buf)) + printf("Model Name : %s\n", buf); + + extract_serial_number(&product_id_data, buf, sizeof(buf)); + printf("Serial Number: %s\n", buf); + + ret = extract_mac_address(&product_id_data, 0, mac); + if (!ret) { + printf("LAN ethaddr : %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + } + + for (i=1; i<4; ++i) { + if (!extract_mac_address(&product_id_data, i, mac)) + printf("LAN[%d] = %02x:%02x:%02x:%02x:%02x:%02x\n", + i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + } +} + +#ifdef CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID +static int has_new_product_id_data; +#endif + +/* Stub functions that call into current AT88 product ID code. + * Need to add tests for *new* product ID data before looking for older + * data device/format. */ +int fetch_production_data(void) +{ +#ifdef CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID + + /* This makes first pass through the EEPROM so we have to initialize + * software i2c before reading and clean up after we are done */ + + if (logic_has_new_product_id()) { + has_new_product_id_data = 1; + return 0; + } +#endif + return _fetch_production_data(); +} + +void dump_production_data(void) +{ +#ifdef CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID + + if (has_new_product_id_data) { + logic_dump_serialization_info(); + return; + } +#endif + _dump_production_data(); + +} diff --git a/board/ti/logic/logic-data.h b/board/ti/logic/logic-data.h new file mode 100644 index 00000000000..b296d2c4d0f --- /dev/null +++ b/board/ti/logic/logic-data.h @@ -0,0 +1,23 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define DEBUG_PRODUCTION_DATA 0 +#define DEBUG_PRODUCTION_DATA_BUF 0 diff --git a/board/ti/logic/logic-display.c b/board/ti/logic/logic-display.c new file mode 100644 index 00000000000..3c0d17c188d --- /dev/null +++ b/board/ti/logic/logic-display.c @@ -0,0 +1,889 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mux.h> +#include <asm/arch/dss.h> +#include <asm/arch/timer.h> +#include <twl4030.h> +#include <lcd.h> +#include "splash-332x57.h" +#include "logic-proto.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* LCD-required members */ +int lcd_line_length; /* initialized in lcd.c */ +int lcd_color_fg; +int lcd_color_bg; +void *lcd_base; /* initialized in lcd.c */ +void *lcd_console_address; /* where is this initialized? */ +short console_col = 0; +short console_row = 0; + +vidinfo_t panel_info; /* Filled in by find_screen */ + +void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) +{ + /* Empty */ +} + +void lcd_initcolregs(void) +{ + /* Empty */ +} + +struct omap_video_timings { + /* Unit: pixels */ + u16 x_res; + /* Unit: pixels */ + u16 y_res; + /* Unit: KHz */ + u32 pixel_clock; + /* Unit: pixel clocks */ + u16 hsw; /* Horizontal synchronization pulse width */ + /* Unit: pixel clocks */ + u16 hfp; /* Horizontal front porch */ + /* Unit: pixel clocks */ + u16 hbp; /* Horizontal back porch */ + /* Unit: line clocks */ + u16 vsw; /* Vertical synchronization pulse width */ + /* Unit: line clocks */ + u16 vfp; /* Vertical front porch */ + /* Unit: line clocks */ + u16 vbp; /* Vertical back porch */ +}; + +struct logic_panel { + char *name; + int config; + int acb; + char data_lines; + struct omap_video_timings timing; +}; + + +static struct logic_panel default_panel; + +static struct omap_custom_lcd_fields { + char *field; + char *format; + void *ptr; + int len; +} omap_custom_lcd_fields[] = { + { "xres", "%u", &default_panel.timing.x_res , 2}, + { "yres", "%u", &default_panel.timing.y_res , 2}, + { "left margin", "%u", &default_panel.timing.hbp, 2 }, + { "right margin", "%u", &default_panel.timing.hfp, 2 }, + { "top margin", "%u", &default_panel.timing.vbp, 2 }, + { "bottom margin", "%u", &default_panel.timing.vfp, 2 }, + { "hsync length", "%u", &default_panel.timing.hsw, 2 }, + { "vsync length", "%u", &default_panel.timing.vsw, 2 }, + { "pixclock", "%u", &default_panel.timing.pixel_clock, 4 }, + { "config", "%u", &default_panel.config, 4 }, + { "data_lines", "%u", &default_panel.data_lines, 1 }, +}; + +ulong calc_fbsize(void) { + ulong size; + if (!default_panel.timing.x_res || !default_panel.timing.y_res) + return 0; + + size = default_panel.timing.x_res * default_panel.timing.y_res; + size *= (default_panel.data_lines / 8); + + return size; +} + + +struct logic_panel logic_panels[] = { + { + .name = "15", + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS + | OMAP_DSS_LCD_ONOFF | OMAP_DSS_LCD_RF | OMAP_DSS_LCD_IEO + | OMAP_DSS_LCD_IHS, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 480 x 272, LQ043T1DG01 */ + .x_res = 480, + .y_res = 272, + .pixel_clock = 9000, + .hfp = 3, + .hsw = 42, + .hbp = 2, + .vfp = 4, + .vsw = 11, + .vbp = 3, + }, + }, + { + .name = "3", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 320 x 240, LQ036Q1DA01 */ + .x_res = 320, + .y_res = 240, + .pixel_clock = 24500, + .hfp = 20, + .hsw = 20, + .hbp = 20, + .vfp = 3, + .vsw = 3, + .vbp = 4, + }, + }, + { + .name = "7", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 640 x 480, LQ10D368 */ + .x_res = 640, + .y_res = 480, + .pixel_clock = 27000, + .hfp = 24, + .hsw = 48, + .hbp = 135, + .vfp = 34, + .vsw = 1, + .vbp = 34, + }, + }, + { + .name = "5", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 640 x 240, LQ036Q1DA01 */ + .x_res = 640, + .y_res = 480, + .pixel_clock = 27000, + .hfp = 24, + .hsw = 48, + .hbp = 135, + .vfp = 34, + .vsw = 1, + .vbp = 34, + }, + }, + { + .name = "2", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 800 x 600, LQ121S1DG31 */ + .x_res = 800, + .y_res = 600, + .pixel_clock = 42000, + .hfp = 120, + .hsw = 5, + .hbp = 88-4-2, + .vfp = 100, + .vsw = 4, + .vbp = 21-1, + }, + }, + { + .name = "vga", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 640 x 480, VGA on DVI */ + .x_res = 640, + .y_res = 480, + .pixel_clock = 24685, + .hfp = 16, + .hsw = 96, + .hbp = 48, + .vfp = 10, + .vsw = 2, + .vbp = 33, + }, + }, + { + .name = "svga", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 800 x 600, SVGA on DVI */ + .x_res = 800, + .y_res = 600, + .pixel_clock = 42000, + .hfp = 120, + .hsw = 5, + .hbp = 88-4-2, + .vfp = 100, + .vsw = 4, + .vbp = 21-1, + }, + }, + { + .name = "xga", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 1024 x 769, XGA on DVI */ + .x_res = 1024, + .y_res = 768, + .pixel_clock = 61714, + .hfp = 24, + .hsw = 41, + .hbp = 160, + .vfp = 3, + .vsw = 6, + .vbp = 29, + }, + }, + { + .name = "720p", + .config = OMAP_DSS_LCD_TFT, + .acb = 0x28, + .data_lines = 16, + .timing = { + /* 1280 x 720, 720P on DVI */ + .x_res = 1280, + .y_res = 720, + .pixel_clock = 72000, + .hfp = 110, + .hsw = 40, + .hbp = 220, + .vfp = 5, + .vsw = 5, + .vbp = 20, + }, + }, +}; + + + +struct logic_panel *logic_find_panel(void) +{ + char *p, *q, *r; + struct omap_custom_lcd_fields *f; + char *panel; + char panel_name[128]; + unsigned int val; + int err = 0, i; + int last, data_lines; + int found = 0; + + panel = getenv("display"); + if (!panel) { + printf("No 'display' variable found in environment; suppress splashimage\n"); + return NULL; + } + + if (strchr(panel, ':')) { + default_panel = logic_panels[0]; + default_panel.name = "custom"; + default_panel.data_lines = 16; + strcpy(panel_name, panel); + found = 1; + last = 0; + p = panel_name; + for (i=0, f=omap_custom_lcd_fields; !last && i<ARRAY_SIZE(omap_custom_lcd_fields); ++i, ++f) { + q = strchr(p, ':'); + if (q) + *q = '\0'; + else + last = 1; + + val = simple_strtoul(p, &r, 0); + + if (q && (r != q)) { + printf("Custom display field '%s' value of '%s' invalid\n", f->field, p); + err = 1; + break; + } + switch(f->len) { + case 1: { + u8 *ptr = f->ptr; + *ptr = val; + } + break; + case 2: { + u16 *ptr = f->ptr; + *ptr = val; + } + break; + default: + case 4: { + u32 *ptr = f->ptr; + *ptr = val; + } + break; + } + p = q+1; + } + strcpy(panel_name, default_panel.name); + if (calc_fbsize() > board_lcd_setmem(0)) { + printf("Custom screen definition too large!\n"); + found = 0; + } + } else { + /* Copy panel name and null-terminate it */ + strncpy(panel_name, panel, sizeof(panel_name)); + panel_name[sizeof(panel_name)-1] = '\0'; + + /* Search for trailing "-dvi" or "-hdmi", if found + * set data_lines and strip off trailing specifier */ + data_lines = 16; + if ((p = strrchr(panel_name, '-')) != NULL) { + if (!strcmp(p+1, "dvi")) { + data_lines = 16; + *p='\0'; + } else if (!strcmp(p+1, "hdmi")) { + data_lines = 24; + *p='\0'; + } + } + + for (i=0; i<ARRAY_SIZE(logic_panels); ++i) + if (!strcmp(panel_name, logic_panels[i].name)) { + default_panel = logic_panels[i]; + default_panel.data_lines = data_lines; + found = 1; + break; + } + } + + if (found) { + printf("Found '%s' display panel\n", panel_name); + panel_info.vl_col = default_panel.timing.x_res; + panel_info.vl_row = default_panel.timing.y_res; + if (default_panel.data_lines == 16) + panel_info.vl_bpix = LCD_COLOR16; + else + panel_info.vl_bpix = LCD_COLOR24; + lcd_line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8; + return &default_panel; + } + printf("display='%s' does not describe a valid screen!\n", panel); + return NULL; +} + +/* Return size of largest framebuffer (so system can reserve memory on start) */ +ulong board_lcd_setmem(ulong addr) +{ + return 1600*1200*4; /* sxga at 24bpp(w 8bits of alpha) */ +} + +void touchup_display_env(void) +{ + // enable the splash screen + char splash_bmp_gz_str[12]; + + sprintf(splash_bmp_gz_str, "0x%08X", (unsigned int)splash_bmp_gz); + setenv("splashimage", splash_bmp_gz_str); + setenv("splashpos", "m,m"); +} + +void lcd_setup_pinmux(int data_lines) +{ + u32 arch_number; + + arch_number = gd->bd->bi_arch_number; + + /* Setup common pins */ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)); /*DSS_PCLK*/ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)); /*DSS_HSYNC*/ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)); /*DSS_VSYNC*/ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)); /*DSS_ACBIAS*/ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ + + /* omap35x use DSS_DATA0:15 + * dm37x SOM uses DSS_DATA0:15 + * dm37x Torpedo uses DSS_DATA18:23 as DSS_DATA0:5 */ + + if (arch_number == MACH_TYPE_DM3730_TORPEDO) { + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)); /*DSS_DATA5*/ + } else { + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); /*DSS_DATA5*/ + } + + /* No need to mux the top 8 pins if not using them */ + if (data_lines <= 16) + return; + + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)); /*DSS_DATA16*/ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)); /*DSS_DATA17*/ + + if (arch_number == MACH_TYPE_DM3730_TORPEDO) { + MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)); /*DSS_DATA18*/ + MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)); /*DSS_DATA19*/ + MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)); /*DSS_DATA20*/ + MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)); /*DSS_DATA21*/ + MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)); /*DSS_DATA22*/ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)); /*DSS_DATA23*/ + } else { + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); /*DSS_DATA18*/ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); /*DSS_DATA19*/ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); /*DSS_DATA20*/ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); /*DSS_DATA21*/ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); /*DSS_DATA22*/ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); /*DSS_DATA23*/ + } +} + +void lcd_ctrl_init(void *lcdbase) +{ + struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + struct logic_panel *panel; + struct panel_config dss_panel; + + memset(&panel_info, 0, sizeof(panel_info)); + panel = logic_find_panel(); + if (!panel) + return; + + /* Convert from timings into panel_config structure */ + dss_panel.panel_color = 0x0; /* black */ + dss_panel.load_mode = 0x2; /* Frame Mode */ + dss_panel.panel_type = 1; /* Active TFT */ + + dss_panel.timing_h = panel->timing.hsw - 1; + dss_panel.timing_h |= ((panel->timing.hfp - 1) << 8); + dss_panel.timing_h |= ((panel->timing.hbp - 1) << 20); + dss_panel.timing_v = panel->timing.vsw - 1; + dss_panel.timing_v |= ((panel->timing.vfp - 1) << 8); + dss_panel.timing_v |= ((panel->timing.vbp - 1) << 20); + dss_panel.pol_freq = panel->acb; + dss_panel.pol_freq |= ((panel->config & 0x3f) << 12); + dss_panel.lcd_size = panel->timing.x_res - 1; + dss_panel.lcd_size |= (panel->timing.y_res - 1) << 16; + if (panel->data_lines == 16) + dss_panel.data_lines = 1; + else if (panel->data_lines == 24) + dss_panel.data_lines = 3; + else { + printf("%s: Invalid data_lines!\n", __FUNCTION__); + memset(&panel_info, 0, sizeof(panel_info)); + return; + } + + dss_panel.pixel_clock = panel->timing.pixel_clock; + + lcd_setup_pinmux(panel->data_lines); + + /* configure DSS for single graphics layer */ + omap3_dss_panel_config(&dss_panel); + + writel((ulong)lcdbase, &dispc->gfx_ba0); /* frame buffer address */ + writel((ulong)lcdbase, &dispc->gfx_ba1); /* frame buffer address */ + writel(dss_panel.lcd_size, &dispc->gfx_size); /* size - same as LCD */ + if (panel->data_lines == 16) + writel((1<<0)|(6<<1), &dispc->gfx_attributes); /* 6=RGB16,8=RGB24 */ + else + writel(0x91, &dispc->gfx_attributes); /* 6=RGB16,8=RGB24 */ + + + if (panel->data_lines == 16) { + lcd_color_fg = 0xffff; + lcd_color_bg = 0x0000; + } else { + lcd_color_fg = 0x00ffffff; + lcd_color_bg = 0x00000000; + } +} + +void lcd_enable(void) +{ + int mSec; + u32 arch_number; + int gpio_backlight_pwr; + int gpio_panel_pwr; + + arch_number = gd->bd->bi_arch_number; + if (arch_number == MACH_TYPE_DM3730_TORPEDO + || arch_number == MACH_TYPE_OMAP3_TORPEDO) { + gpio_backlight_pwr = 154; + gpio_panel_pwr = 155; + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | EN | M4)); /*GPIO_154*/ + + } else { + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTU | DIS | M4)); /*GPIO_8 */ + gpio_backlight_pwr = 8; + gpio_panel_pwr = 155; + } + MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | EN | M4)); /*GPIO_155*/ + + /* Kill LCD_BACKLIGHT_PWR */ + if (!omap_request_gpio(gpio_backlight_pwr)) { + omap_set_gpio_direction(gpio_backlight_pwr, 0); + omap_set_gpio_dataout(gpio_backlight_pwr, 0); + } + + lcd_is_enabled = 0; /* keep console messages on the serial port */ + + /* Start clocks */ + omap3_dss_enable(); + + /* Delay 300mS to allow 4.3" panel to initialize */ + for (mSec=0; mSec<300; ++mSec) + udelay(1000); + + /* + * panel_enable = 155 + * backlight 154 (torpedo); 8 (som) + */ + + /* turn on LCD_PANEL_PWR */ + if (!omap_request_gpio(gpio_panel_pwr)) { + omap_set_gpio_direction(gpio_panel_pwr, 0); + omap_set_gpio_dataout(gpio_panel_pwr, 1); + } else + printf("%s:%d fail!\n", __FUNCTION__, __LINE__); + + + /* Torpedo-20 boards uses GPIO_56 as their backlight SOM + * use GPIO.6 on TWL4030 */ + + if (arch_number == MACH_TYPE_DM3730_TORPEDO + || arch_number == MACH_TYPE_OMAP3_TORPEDO) { + + MUX_VAL(CP(GPMC_NCS5), (IEN | PTD | EN | M3)); /*GPT10 backlight */ + init_gpt_timer(10, 70, 100); + } else { + twl4030_set_pwm0(70, 100); /* 70% backlight brighntess */ + } + + /* Sleep 300mS to allow panel to stabilize */ + for (mSec=0; mSec < 300; ++mSec) + udelay(1000); + + /* turn on LCD_BACKLIGHT_PWR SOM LV */ + if (!omap_request_gpio(gpio_backlight_pwr)) { + omap_set_gpio_direction(gpio_backlight_pwr, 0); + omap_set_gpio_dataout(gpio_backlight_pwr, 1); + } else + printf("%s:%d fail!\n", __FUNCTION__, __LINE__); + +} + +int do_backlight(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + u32 arch_number; + ulong level; + + level = simple_strtoul(argv[1], NULL, 10); + + arch_number = gd->bd->bi_arch_number; + if (arch_number == MACH_TYPE_DM3730_TORPEDO + || arch_number == MACH_TYPE_OMAP3_TORPEDO) { + + /* Adjust Torpedo GPT10 timer (used for LCD_PWM0) */ + init_gpt_timer(10, level, 100); + } else { + /* Adjust SOM LV TWL4030 PWM0 (used for LCD_PWM0) */ + twl4030_set_pwm0(level, 100); + } + + return 0; +} + +U_BOOT_CMD(backlight, 2, 1, do_backlight, + "backlight - change backlight level", + "<level>" +); + +int do_dump_pwm0(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + twl4030_dump_pwm0(); + return 0; +} + +U_BOOT_CMD(dump_pwm0, 1, 1, do_dump_pwm0, + " - dump TWL PWM registers", + "" +); + +struct fb_bitfield { + u8 length; + u8 offset; +}; +static struct fb_var_screeninfo { + int bits_per_pixel; + u32 xres, yres; + struct fb_bitfield red, green, blue; + u32 line_length; /* bytes/line */ +} fb_var; + +void *fb_ptr; +unsigned int fb_stride; +unsigned int fb_size; +int fb_max_x, fb_max_y; + +typedef struct { + unsigned int x,y; +} point_t; + +typedef unsigned int color_t; + +void +draw_pixel_32(point_t *p, color_t c) +{ + unsigned int offset; + + if (p->x >= fb_max_x || p->y >= fb_max_y) + printf("%s: point [%u:%u] out of range\n", __FUNCTION__, p->x, p->y); + + offset = p->y * fb_stride + p->x*sizeof(int); + *((unsigned int *)((unsigned char *)fb_ptr + offset)) = c; +} + +void +draw_pixel_16(point_t *p, color_t c) +{ + unsigned int offset; + + if (p->x >= fb_max_x || p->y >= fb_max_y) + printf("%s: point [%u:%u] out of range\n", __FUNCTION__, p->x, p->y); + + offset = p->y * fb_stride + p->x*sizeof(short); + *((unsigned short *)((unsigned char *)fb_ptr + offset)) = c; +} + +void +draw_pixel_8(point_t *p, color_t c) +{ + unsigned int offset; + + if (p->x >= fb_max_x || p->y >= fb_max_y) + printf("%s: point [%u:%u] out of range\n", __FUNCTION__, p->x, p->y); + + offset = p->y * fb_stride + p->x*sizeof(char); + *((unsigned char *)((unsigned char *)fb_ptr + offset)) = c; +} + +void (*draw_pixel)(point_t *p, color_t c); + +void draw_rect(point_t *p1, point_t *p2, color_t c, int fill) +{ + point_t p; + + if (fill) { + for (p.y = p1->y; p.y <= p2->y; ++p.y) + for (p.x = p1->x; p.x <= p2->x; ++p.x) + (*draw_pixel)(&p, c); + } else { + for (p.x = p1->x; p.x <= p2->x; ++p.x) { + p.y = p1->y; + (*draw_pixel)(&p, c); + p.y = p2->y; + (*draw_pixel)(&p, c); + } + for (p.y = p1->y; p.y <= p2->y; ++p.y) { + p.x = p1->x; + (*draw_pixel)(&p, c); + p.x = p2->x; + (*draw_pixel)(&p, c); + } + } +} + +void draw_test_frame(int x, int y, int margin, color_t c) +{ + point_t start, end; + + start.x = margin; + end.x = x - margin - 1; + start.y = margin; + end.y = y - margin - 1; + + draw_rect(&start, &end, c, 0); +} + +void +clear_video_frame(void) +{ + memset(fb_ptr, 0, fb_size); +} + +/* Draw a ramp, [l,r] to [l+w,r+h], in color *color */ +void draw_ramp (point_t *start, point_t *end, struct fb_bitfield *fb_bits, struct fb_var_screeninfo *fb_var) +{ + point_t ul, br; + int i, width_round_up; + int colors; + + ul = *start; + br = *end; + + colors = 1<<fb_bits->length; + width_round_up = (end->x % colors) ? 1 : 0; + + for (i=0; i<colors; ++i) { + draw_rect(&ul, &br, i<<fb_bits->offset, 1); + ul.x = br.x; + br.x += fb_var->xres / colors + ((i % 2) * width_round_up); + if (br.x >= fb_var->xres) + br.x = fb_var->xres-1; + } +} + +void scribble_frame_buffer(void) +{ + unsigned int x,y; + color_t color_white, color_black, color_blue, color_red; + unsigned int colorbitwidth, width_round_up; + point_t start, end; + + if (fb_var.bits_per_pixel == 8) + draw_pixel = draw_pixel_8; + else if (fb_var.bits_per_pixel == 16) + draw_pixel = draw_pixel_16; + else + draw_pixel = draw_pixel_32; + + printf("%s:%d draw_pixel %p\n", __FUNCTION__, __LINE__, draw_pixel); + + // white is all bits on + color_white = (((1<<fb_var.red.length)-1) << fb_var.red.offset) + | (((1<<fb_var.green.length)-1) << fb_var.green.offset) + | (((1<<fb_var.blue.length)-1) << fb_var.blue.offset); + + // black is all bits off + color_black = 0; + + color_blue = (((1 << fb_var.blue.length) - 1) << fb_var.blue.offset); + + color_red = (((1 << fb_var.red.length) - 1) << fb_var.red.offset); + + + + x = fb_var.xres; + y = fb_var.yres; + colorbitwidth = 32; + + start.x = 0; + width_round_up = (x % colorbitwidth) ? 1 : 0; + end.x = x / colorbitwidth + width_round_up; + + end.y = y/4; + start.y = 0; + draw_ramp(&start, &end, &fb_var.red, &fb_var); + start.y = end.y; + end.y += y/4; + draw_ramp(&start, &end, &fb_var.green, &fb_var); + start.y = end.y; + end.y += y/4; + draw_ramp(&start, &end, &fb_var.blue, &fb_var); + /* draw stipple, stop test when error is encountered */ + for (start.y = 3 * (y / 4); start.y < y; start.y++) { + for (start.x = 0; start.x < (x / 3); start.x++) { + draw_rect(&start, &start, + (start.x ^ start.y) & 1 ? color_white : color_black, + 0); + } + } + + /* draw vert-lines, stop test when error is encountered */ + start.y = 3 * (y / 4); + end.y = y-1; + for (start.x = x / 3; start.x < 2 * (x / 3); start.x++) { + end.x = start.x; + draw_rect(&start, &end, + start.x & 1 ? color_white : color_black, 0); + } + + /* draw horiz-lines, stop test when error is encountered */ + start.x = 2 * (x / 3); + end.x = x-1; + for (start.y = 3 * (y / 4); start.y < y; start.y++) { + end.y = start.y; + draw_rect(&start, &end, + start.y & 1 ? color_white : color_black, 0); + } + + + // Draw some frames + draw_test_frame(x, y, 0, color_white); + draw_test_frame(x, y, 1, color_red); + draw_test_frame(x, y, 2, color_blue); +} + +int do_draw_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + if (panel_info.vl_col && panel_info.vl_row) { + fb_var.xres = panel_info.vl_col; + fb_var.yres = panel_info.vl_row; + if (panel_info.vl_bpix == LCD_COLOR16) { + fb_var.bits_per_pixel = 16; + fb_var.red.offset = 11; + fb_var.red.length = 5; + fb_var.blue.offset = 5; + fb_var.blue.length = 6; + fb_var.green.offset = 0; + fb_var.green.length = 5; + } else if (panel_info.vl_bpix == LCD_COLOR24) { + fb_var.bits_per_pixel = 32; + fb_var.red.offset = 16; + fb_var.red.length = 8; + fb_var.blue.offset = 8; + fb_var.blue.length = 8; + fb_var.green.offset = 0; + fb_var.green.length = 8; + } + fb_var.line_length = fb_var.xres * (fb_var.bits_per_pixel / 8); + fb_ptr = (void *)gd->fb_base; + fb_stride = fb_var.line_length; + fb_size = fb_stride * fb_var.yres; + fb_max_x = fb_var.xres; + fb_max_y = fb_var.yres; + scribble_frame_buffer(); + } + return 0; +} + +U_BOOT_CMD(draw_test, 1, 1, do_draw_test, + " - Draw ramps/stipples/boarders on LCD", + "" +); diff --git a/board/ti/logic/logic-gpio.c b/board/ti/logic/logic-gpio.c new file mode 100644 index 00000000000..1b631839788 --- /dev/null +++ b/board/ti/logic/logic-gpio.c @@ -0,0 +1,161 @@ +/* + * (C) Copyright 2008 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +// #include <asm/arch/bits.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +// #include <asm/arch/sys_info.h> +#include <asm/arch/clocks.h> +#include <asm/arch/mem.h> +#include <i2c.h> +#include <asm/mach-types.h> +#include "logic-gpio.h" + +#define NUM_OF_BITS_IN_REG 32 +#define MAX_GPIO_PINS 192 +#define GPIO_PIN 1 +#define GPIO_MAX_MODULES 6 + +/* GPIO base address */ +#define GPIO1_MODULE_BA 0x48310000 +#define GPIO2_MODULE_BA 0x49050000 +#define GPIO3_MODULE_BA 0x49052000 +#define GPIO4_MODULE_BA 0x49054000 +#define GPIO5_MODULE_BA 0x49056000 +#define GPIO6_MODULE_BA 0x49058000 + +#define GPIO_DATAIN ((uint32_t)0x038) +#define GPIO_DATAOUT ((uint32_t)0x03C) +#define GPIO_OE ((uint32_t)0x034) + +/* int and long both fit to 32 bits */ +typedef volatile uint32_t* PREG_U32; +typedef volatile int32_t* PREG_S32; + +#define in_regl(offSet) (*(PREG_U32)(offSet)) +#define out_regl(offSet, value) (*(PREG_U32)(offSet) = (uint32_t)(value)) + +static uint32_t g_gpio_module_base_address[GPIO_MAX_MODULES] + = {GPIO1_MODULE_BA, GPIO2_MODULE_BA, GPIO3_MODULE_BA, + GPIO4_MODULE_BA, GPIO5_MODULE_BA, GPIO6_MODULE_BA}; + +uint32_t check_gpio_pin_num(uint32_t pin_num) +{ + return (pin_num > MAX_GPIO_PINS); +} + +uint32_t get_module_pin_mask(uint32_t pin_num, uint32_t *module_num, uint32_t *offset, uint32_t *pinmask) +{ + uint32_t snum, ret_val; + + *module_num = pin_num / NUM_OF_BITS_IN_REG + 1; + snum = (*module_num-1)*NUM_OF_BITS_IN_REG; + *offset = pin_num - snum; + ret_val = check_gpio_pin_num(pin_num); + if (ret_val) + return ret_val; + + *pinmask = GPIO_PIN<<*offset; + return 0; +} + + +void gpio_write_output_pin(int module_num, uint32_t pin_mask, uint32_t data) +{ + uint32_t temp, gpio_data_out_reg; + + gpio_data_out_reg = (g_gpio_module_base_address[module_num-1]+GPIO_DATAOUT); + + temp = in_regl(gpio_data_out_reg); + temp = temp & ~pin_mask; + + out_regl(gpio_data_out_reg, (temp | (data & pin_mask))); +} + +void gpio_read_input_pin(uint32_t module_num, uint32_t pin_mask, uint32_t *data) +{ + uint32_t gpio_data_in_reg, temp; + + gpio_data_in_reg = (g_gpio_module_base_address[module_num-1]+GPIO_DATAIN); + + temp = in_regl(gpio_data_in_reg); + *data = temp & pin_mask; +} + +uint32_t pin_get_gpio_input(uint32_t pin_num) +{ + uint32_t module_num, pinmask, offset, data; + + get_module_pin_mask(pin_num, &module_num, &offset, &pinmask); + + gpio_read_input_pin(module_num, (1<<offset), &data); + data >>= offset; + + // printf("%s:%d pin %d data %d\n", __FUNCTION__, __LINE__, pin_num, data); + + return data; +} + + +uint32_t pin_set_gpio_dataout(uint32_t pin_num, uint32_t set) +{ + uint32_t module_num, pinmask, offset, ret_val; + + // printf("%s:%d pin %d set %d\n", __FUNCTION__, __LINE__, pin_num, set); + + ret_val = get_module_pin_mask(pin_num, &module_num, &offset, &pinmask); + + if (set) + gpio_write_output_pin(module_num, (1<<offset), (1<<offset)); + else + gpio_write_output_pin(module_num, (1<<offset), (0<<offset)); + + return ret_val; +} + +uint32_t set_gpio_in_out(uint32_t module_num, uint32_t pin_mask, uint32_t io_mask) +{ + uint32_t temp_oe, gpio_pin_output_en_reg; + + gpio_pin_output_en_reg = (g_gpio_module_base_address[module_num-1]+GPIO_OE); + + temp_oe = in_regl(gpio_pin_output_en_reg); + temp_oe &= ~pin_mask; + temp_oe |= io_mask; + + out_regl(gpio_pin_output_en_reg, temp_oe); + + return 0; +} + +uint32_t pin_init_gpio(uint32_t pin_num, uint32_t in_out) +{ + uint32_t module_num, pinmask, offset, ret_val; + + ret_val = get_module_pin_mask(pin_num, &module_num, &offset, &pinmask); + + set_gpio_in_out(module_num, pinmask, in_out<<offset); + + return ret_val; +} diff --git a/board/ti/logic/logic-gpio.h b/board/ti/logic/logic-gpio.h new file mode 100644 index 00000000000..fca023f93fb --- /dev/null +++ b/board/ti/logic/logic-gpio.h @@ -0,0 +1,28 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +// GPIO +extern unsigned int pin_get_gpio_input(unsigned int pin); +extern unsigned int pin_set_gpio_dataout(unsigned int pin, unsigned int set); +extern unsigned int pin_init_gpio(unsigned int pin_num, unsigned int in_out); + +// Turn on VAUX1 voltage for Product ID +extern void init_vaux1_voltage(void); diff --git a/board/ti/logic/logic-i2c.c b/board/ti/logic/logic-i2c.c new file mode 100644 index 00000000000..0ff463afcfc --- /dev/null +++ b/board/ti/logic/logic-i2c.c @@ -0,0 +1,242 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/clocks.h> +#include <asm/arch/mem.h> +#include <i2c.h> +#include <asm/mach-types.h> +#include "logic-i2c.h" +#include "product_id.h" +#include "logic-gpio.h" +#include "logic-data.h" + +static enum { + GPIO_I2C_UNINIT, + GPIO_I2C_STOPPED, + GPIO_I2C_STARTED, +} gpio_i2c_bus_state; + +static int gpio_i2c_clock_high_width, gpio_i2c_clock_low_width; +static int gpio_i2c_coarse_delay; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ + +/* Put SCLK/SDA pins connected to the product ID into GPIO mode */ +static void gpio_i2c_config_pins(void) +{ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M4)); /*I2C3_SCL*/ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M4)); /*I2C3_SDA*/ +} + +/* Restore SCLK/SDA pins connected to the product ID back to I2C mode */ + +void gpio_i2c_restore_pins(void) +{ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); /*I2C3_SCL*/ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); /*I2C3_SDA*/ +} + +#define GPIO_I2C_GPIO_SCLK 184 +#define GPIO_I2C_GPIO_SDATA 185 + +void gpio_i2c_config_pin(GPIO_I2C_PIN pin, GPIO_I2C_DIRECTION dir) +{ + if (dir == GPIO_I2C_INPUT) { + if (pin == GPIO_I2C_SCLK) + pin_init_gpio(GPIO_I2C_GPIO_SCLK, 1); + else + pin_init_gpio(GPIO_I2C_GPIO_SDATA, 1); + } else if (dir == GPIO_I2C_OUTPUT) { + if (pin == GPIO_I2C_SCLK) + pin_init_gpio(GPIO_I2C_GPIO_SCLK, 0); + else + pin_init_gpio(GPIO_I2C_GPIO_SDATA, 0); + } +} + +static int gpio_i2c_read_pin(GPIO_I2C_PIN pin) +{ + if (pin == GPIO_I2C_SCLK) + return pin_get_gpio_input(GPIO_I2C_GPIO_SCLK); + else + return pin_get_gpio_input(GPIO_I2C_GPIO_SDATA); + return 0; +} + +void gpio_i2c_set_pin_level(GPIO_I2C_PIN pin, int level) +{ + uint8_t pin_level; + + if (pin == GPIO_I2C_SCLK) { + pin_level = pin_get_gpio_input(GPIO_I2C_GPIO_SCLK); + if (((level == 1) && (pin_level == 0)) || + ((level == 0) && (pin_level == 1))) + pin_set_gpio_dataout(GPIO_I2C_GPIO_SCLK, level); + } else if (pin == GPIO_I2C_SDATA) { + if (level == 0) { + gpio_i2c_config_pin(pin, GPIO_I2C_OUTPUT); + pin_set_gpio_dataout(GPIO_I2C_GPIO_SDATA, 0); + } else { + gpio_i2c_config_pin(pin, GPIO_I2C_INPUT); + } + } +} + + +void gpio_i2c_init(int bps) +{ + gpio_i2c_bus_state = GPIO_I2C_UNINIT; + + /* Config SCLK, SDATA pins */ + gpio_i2c_config_pin(GPIO_I2C_SCLK, GPIO_I2C_OUTPUT); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + + gpio_i2c_config_pin(GPIO_I2C_SDATA, GPIO_I2C_INPUT); + + gpio_i2c_config_pins(); + + /* Assume 1:1 clock duty cycle */ + gpio_i2c_clock_high_width = gpio_i2c_clock_low_width + = 1000000 / bps / 2; + + gpio_i2c_coarse_delay = gpio_i2c_clock_high_width; +} + +int gpio_i2c_busy(void) +{ + return (gpio_i2c_bus_state == GPIO_I2C_STARTED); +} + +void gpio_i2c_tx_stop(void) +{ + if (gpio_i2c_bus_state == GPIO_I2C_STARTED) { + udelay(gpio_i2c_coarse_delay); + + /* Pull SDATA low */ + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 0); + udelay(gpio_i2c_coarse_delay); + + /* Push SCLK high */ + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_coarse_delay); + + /* Now drive SDATA high - thats a STOP. */ + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 1); + udelay(gpio_i2c_coarse_delay); + gpio_i2c_bus_state = GPIO_I2C_STOPPED; + } +} + +void gpio_i2c_tx_start(void) +{ + if (gpio_i2c_bus_state == GPIO_I2C_UNINIT + || gpio_i2c_bus_state == GPIO_I2C_STOPPED) { + udelay(gpio_i2c_coarse_delay); + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 1); + udelay(gpio_i2c_coarse_delay); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_coarse_delay); + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 0); + udelay(gpio_i2c_coarse_delay); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + udelay(gpio_i2c_coarse_delay); + gpio_i2c_bus_state = GPIO_I2C_STARTED; + } +} + +/* Return !0 if NACK */ +int gpio_i2c_tx_byte(uint8_t data) +{ + uint8_t clock, tx_bit_mask=0x80, nack; + + if (gpio_i2c_bus_state != GPIO_I2C_STARTED) + printf("%s: Unexpected I2C bus state!\n", __FUNCTION__); + + udelay(gpio_i2c_coarse_delay); + + for (clock=0; clock <= 7; ++clock) { + if (data & tx_bit_mask) + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 1); + else + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 0); + udelay(gpio_i2c_clock_low_width); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_clock_high_width); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + tx_bit_mask >>= 1; + } + gpio_i2c_config_pin(GPIO_I2C_SDATA, GPIO_I2C_INPUT); + udelay(gpio_i2c_clock_low_width); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_clock_high_width); + nack = gpio_i2c_read_pin(GPIO_I2C_SDATA); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + return (nack != 0); +} + +int gpio_i2c_rx_byte(uint8_t *data, int rx_mode) +{ + uint8_t clock, data_bit; + + *data = 0; + + gpio_i2c_config_pin(GPIO_I2C_SDATA, GPIO_I2C_INPUT); + + udelay(gpio_i2c_coarse_delay); + + for (clock=0; clock<=8; ++clock) { + if (clock < 8) { + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_clock_high_width); + data_bit = gpio_i2c_read_pin(GPIO_I2C_SDATA); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + *data = (*data << 1) | data_bit; + } else { + if ((rx_mode == RX_MODE_LAST_BYTE) || (rx_mode == RX_MODE_ONE_BYTE)) + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 1); + else + gpio_i2c_set_pin_level(GPIO_I2C_SDATA, 0); + + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 1); + udelay(gpio_i2c_clock_high_width); + gpio_i2c_set_pin_level(GPIO_I2C_SCLK, 0); + } + udelay(gpio_i2c_clock_low_width); + } + + return 0; +} + diff --git a/board/ti/logic/logic-i2c.h b/board/ti/logic/logic-i2c.h new file mode 100644 index 00000000000..bd1f01aea01 --- /dev/null +++ b/board/ti/logic/logic-i2c.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2008-2011 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +typedef enum { + GPIO_I2C_INPUT, + GPIO_I2C_OUTPUT, +} GPIO_I2C_DIRECTION; + +typedef enum { + RX_MODE_FIRST_BYTE, + RX_MODE_MIDDLE_BYTE, + RX_MODE_NEXT_TO_LAST_BYTE, + RX_MODE_LAST_BYTE, + RX_MODE_ONE_BYTE +} I2C_RX_MODE; + +typedef enum { + GPIO_I2C_SDATA, + GPIO_I2C_SCLK, +} GPIO_I2C_PIN; + +extern int gpio_i2c_busy(void); +extern void gpio_i2c_tx_stop(void); +extern void gpio_i2c_tx_start(void); +extern int gpio_i2c_tx_byte(uint8_t data); +extern int gpio_i2c_rx_byte(uint8_t *data, int rx_mode); +extern void gpio_i2c_init(int bps); +extern void gpio_i2c_config_pin(GPIO_I2C_PIN pin, GPIO_I2C_DIRECTION dir); +extern void gpio_i2c_set_pin_level(GPIO_I2C_PIN pin, int level); +extern void gpio_i2c_restore_pins(void); diff --git a/board/ti/logic/logic-id-data.h b/board/ti/logic/logic-id-data.h new file mode 100644 index 00000000000..73a7ddaa369 --- /dev/null +++ b/board/ti/logic/logic-id-data.h @@ -0,0 +1,156 @@ +const unsigned char id_data_buf[] /* __attribute__ ((section ("id_data"))) */ = { +/* ID data header: */ +/* offset 0 */ 0x4c, 0x70, 0x49, 0x64, /* Magic key "LpId" */ +/* offset 4 */ 0x04, /* (0x04) one-byte version of id format */ +/* offset 5 */ 0x00, /* (0x00) unused byte */ +/* offset 6 */ 0x94, 0x02, /* (660) LE two-byte length of data following header */ + +/* ID checksums: */ +/* offset 8 */ 0xf1, 0x4c, /* (0x4cf1) LE CRC-15 of data header */ +/* offset 10 */ 0x0f, 0x29, /* (0x290f) LE CRC-15 of following 660 ID data bytes */ + +/* ID data: */ +/* offset 12 */ 0xa0|0x12, 0x29, /* (658) dict; size */ +/* offset 14 */ 0xc0|0x00, /* (0) key 'serialization_group' */ +/* offset 15 */ 0xa0|0x19, 0x1e, /* (489) dict; size */ +/* offset 17 */ 0xc0|0x01, /* (1) key 'serial_number' */ +/* offset 18 */ 0x40|0x0a, /* (10) string; len */ +/* offset 19 */ 0x31, 0x31, 0x31, 0x31, 0x4d, 0x30, 0x31, 0x38, +/* offset 27 */ 0x32, 0x35, +/* offset 29 */ 0xc0|0x02, /* (2) key 'lan_ethaddr1' */ +/* offset 30 */ 0x60|0x06, /* (6) string; len */ +/* offset 31 */ 0x00, 0x08, 0xee, 0x04, 0xb7, 0xd2, +/* offset 37 */ 0xc0|0x06, /* (6) key 'nvs' */ +/* offset 38 */ 0x60|0x12, 0x1d, /* (466) string; len */ +/* offset 40 */ 0x01, 0x6d, 0x54, 0x00, 0x00, 0xef, 0xbe, 0x01, +/* offset 48 */ 0x71, 0x54, 0xad, 0xde, 0x00, 0x00, 0x00, 0x00, +/* offset 56 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* offset 64 */ 0x01, 0x99, 0x01, 0xfa, 0xd6, 0xd0, 0xca, 0xc2, +/* offset 72 */ 0xc9, 0xd6, 0xda, 0x05, 0x00, 0xf8, 0xfc, 0x0c, +/* offset 80 */ 0x04, 0x00, 0xfb, 0x0c, 0x04, 0x00, 0xfc, 0x0a, +/* offset 88 */ 0x03, 0xff, 0xfa, 0x0b, 0x02, 0xfe, 0xfb, 0x10, +/* offset 96 */ 0x04, 0xff, 0xfa, 0x12, 0x04, 0x00, 0xfa, 0x12, +/* offset 104 */ 0x05, 0x00, 0xfb, 0xea, 0xfc, 0x09, 0x09, 0x0c, +/* offset 112 */ 0x0c, 0x0e, 0x11, 0x13, 0x17, 0x1a, 0x1d, 0x21, +/* offset 120 */ 0x26, 0x2c, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3d, +/* offset 128 */ 0x00, 0x41, 0x00, 0x46, 0x00, 0x4c, 0x00, 0x4f, +/* offset 136 */ 0x00, 0x4f, 0x00, 0x4e, 0x00, 0x41, 0x00, 0x40, +/* offset 144 */ 0x00, 0x38, 0x00, 0xe9, 0xfc, 0x07, 0x08, 0x09, +/* offset 152 */ 0x0b, 0x0a, 0x0e, 0x10, 0x13, 0x16, 0x19, 0x1d, +/* offset 160 */ 0x1f, 0x23, 0x00, 0x28, 0x00, 0x2e, 0x00, 0x31, +/* offset 168 */ 0x00, 0x37, 0x00, 0x3d, 0x00, 0x44, 0x00, 0x4e, +/* offset 176 */ 0x00, 0x55, 0x00, 0x5f, 0x00, 0x67, 0x00, 0x6c, +/* offset 184 */ 0x00, 0x6d, 0x00, 0xeb, 0xfc, 0x07, 0x09, 0x0a, +/* offset 192 */ 0x0b, 0x0a, 0x0f, 0x11, 0x14, 0x18, 0x1a, 0x1d, +/* offset 200 */ 0x21, 0x25, 0x00, 0x2a, 0x00, 0x2f, 0x00, 0x33, +/* offset 208 */ 0x00, 0x39, 0x00, 0x3f, 0x00, 0x46, 0x00, 0x4d, +/* offset 216 */ 0x00, 0x59, 0x00, 0x5d, 0x00, 0x64, 0x00, 0x6a, +/* offset 224 */ 0x00, 0x69, 0x00, 0xee, 0xfc, 0x08, 0x09, 0x0a, +/* offset 232 */ 0x0e, 0x10, 0x12, 0x15, 0x18, 0x1d, 0x20, 0x23, +/* offset 240 */ 0x26, 0x00, 0x2d, 0x00, 0x30, 0x00, 0x3a, 0x00, +/* offset 248 */ 0x3d, 0x00, 0x44, 0x00, 0x4d, 0x00, 0x57, 0x00, +/* offset 256 */ 0x5e, 0x00, 0x6c, 0x00, 0x70, 0x00, 0x72, 0x00, +/* offset 264 */ 0x6c, 0x00, 0xef, 0xfc, 0x08, 0x09, 0x0b, 0x0a, +/* offset 272 */ 0x0e, 0x10, 0x14, 0x15, 0x18, 0x1e, 0x20, 0x23, +/* offset 280 */ 0x2a, 0x00, 0x2b, 0x00, 0x32, 0x00, 0x3c, 0x00, +/* offset 288 */ 0x3e, 0x00, 0x48, 0x00, 0x51, 0x00, 0x5b, 0x00, +/* offset 296 */ 0x63, 0x00, 0x72, 0x00, 0x75, 0x00, 0x78, 0x00, +/* offset 304 */ 0x72, 0x00, 0xf2, 0xfc, 0x08, 0x0a, 0x0b, 0x0a, +/* offset 312 */ 0x10, 0x11, 0x14, 0x17, 0x1a, 0x1e, 0x21, 0x25, +/* offset 320 */ 0x29, 0x00, 0x2e, 0x00, 0x33, 0x00, 0x3b, 0x00, +/* offset 328 */ 0x3f, 0x00, 0x49, 0x00, 0x4f, 0x00, 0x5a, 0x00, +/* offset 336 */ 0x63, 0x00, 0x6f, 0x00, 0x74, 0x00, 0x77, 0x00, +/* offset 344 */ 0x77, 0x00, 0xf1, 0xfc, 0x08, 0x0a, 0x0c, 0x0c, +/* offset 352 */ 0x0f, 0x11, 0x14, 0x16, 0x1c, 0x1c, 0x21, 0x25, +/* offset 360 */ 0x29, 0x00, 0x2f, 0x00, 0x35, 0x00, 0x3b, 0x00, +/* offset 368 */ 0x41, 0x00, 0x4b, 0x00, 0x53, 0x00, 0x5e, 0x00, +/* offset 376 */ 0x69, 0x00, 0x70, 0x00, 0x75, 0x00, 0x79, 0x00, +/* offset 384 */ 0x84, 0x00, 0xef, 0xfc, 0x07, 0x0b, 0x0a, 0x0e, +/* offset 392 */ 0x10, 0x13, 0x16, 0x19, 0x1d, 0x1f, 0x23, 0x29, +/* offset 400 */ 0x00, 0x2d, 0x00, 0x33, 0x00, 0x3b, 0x00, 0x40, +/* offset 408 */ 0x00, 0x4a, 0x00, 0x54, 0x00, 0x62, 0x00, 0x6e, +/* offset 416 */ 0x00, 0x76, 0x00, 0x81, 0x00, 0x81, 0x00, 0x8c, +/* offset 424 */ 0x00, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe, 0x00, +/* offset 432 */ 0x02, 0x03, 0x05, 0x06, 0x07, 0x08, 0x0a, 0xfe, +/* offset 440 */ 0x00, 0x01, 0x01, 0xff, 0x00, 0x01, 0xff, 0xff, +/* offset 448 */ 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0xfe, 0x00, +/* offset 456 */ 0x00, 0x01, 0x09, 0x04, 0x00, 0xfb, 0xf6, 0x04, +/* offset 464 */ 0x02, 0x00, 0xfe, 0xfd, 0xfc, 0x03, 0x02, 0x00, +/* offset 472 */ 0xfd, 0xfb, 0x02, 0x13, 0x00, 0x00, 0x00, 0x00, +/* offset 480 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* offset 488 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* offset 496 */ 0xaa, 0x03, 0x00, 0x00, 0x01, 0x02, 0xff, 0xff, +/* offset 504 */ 0x00, 0x00, +/* offset 506 */ 0xc0|0x07, /* (7) key 'model_group' */ +/* offset 507 */ 0xa0|0x15, 0x02, /* (37) dict; size */ +/* offset 509 */ 0xc0|0x08, /* (8) key 'model_name' */ +/* offset 510 */ 0x40|0x17, 0x01, /* (23) string; len */ +/* offset 512 */ 0x53, 0x4f, 0x4d, 0x44, 0x4d, 0x33, 0x37, 0x33, +/* offset 520 */ 0x30, 0x2d, 0x31, 0x30, 0x2d, 0x32, 0x37, 0x38, +/* offset 528 */ 0x32, 0x49, 0x46, 0x43, 0x52, 0x2d, 0x41, +/* offset 535 */ 0xc0|0x09, /* (9) key 'part_number' */ +/* offset 536 */ 0x20|0x16, 0xde, 0xf0, 0x03, /* (0xf85e6) +num */ +/* offset 540 */ 0xc0|0x0a, /* (10) key 'version_code' */ +/* offset 541 */ 0x20|0x1e, 0x01, /* (0x1e) +num */ +/* offset 543 */ 0xc0|0x0b, /* (11) key 'hardware_platform' */ +/* offset 544 */ 0x40|0x01, /* (1) string; len */ +/* offset 545 */ 0x74, +/* offset 546 */ 0xc0|0x0c, /* (12) key 'cpu0_group' */ +/* offset 547 */ 0xa0|0x0f, /* (15) dict; size */ +/* offset 548 */ 0xc0|0x0d, /* (13) key 'type' */ +/* offset 549 */ 0x40|0x02, /* (2) string; len */ +/* offset 550 */ 0x64, 0x6d, +/* offset 552 */ 0xc0|0x0e, /* (14) key 'number' */ +/* offset 553 */ 0x20|0x12, 0xe9, 0x01, /* (0xe92) +num */ +/* offset 556 */ 0xc0|0x0f, /* (15) key 'speed_mhz' */ +/* offset 557 */ 0x20|0x18, 0x3e, /* (0x3e8) +num */ +/* offset 559 */ 0xc0|0x10, 0x01, /* (16) key 'temp_class' */ +/* offset 561 */ 0x40|0x01, /* (1) string; len */ +/* offset 562 */ 0x63, +/* offset 563 */ 0xc0|0x11, 0x01, /* (17) key 'cpu0_bus_group' */ +/* offset 565 */ 0xa0|0x19, 0x06, /* (105) dict; size */ +/* offset 567 */ 0xc0|0x12, 0x01, /* (18) key 'dram_bus_group' */ +/* offset 569 */ 0xa0|0x16, 0x03, /* (54) dict; size */ +/* offset 571 */ 0xc0|0x13, 0x01, /* (19) key 'sysconfig_reg' */ +/* offset 573 */ 0x20|0x12, 0x01, /* (0x12) +num */ +/* offset 575 */ 0xc0|0x14, 0x01, /* (20) key 'sharing_reg' */ +/* offset 577 */ 0x20|0x10, 0x10, /* (0x100) +num */ +/* offset 579 */ 0xc0|0x1d, 0x01, /* (29) key 'power_reg' */ +/* offset 581 */ 0x20|0x09, /* (0x9) +num */ +/* offset 582 */ 0xc0|0x16, 0x01, /* (22) key 'cs_cfg_reg' */ +/* offset 584 */ 0x20|0x02, /* (0x2) +num */ +/* offset 585 */ 0xc0|0x1f, 0x01, /* (31) key 'cs0_group' */ +/* offset 587 */ 0xa0|0x14, 0x02, /* (36) dict; size */ +/* offset 589 */ 0xc0|0x17, 0x01, /* (23) key 'mcfg_reg' */ +/* offset 591 */ 0x20|0x19, 0x81, 0x90, 0xd6, 0x01, /* (0x3588019) +num */ +/* offset 596 */ 0xc0|0x18, 0x01, /* (24) key 'mr_reg' */ +/* offset 598 */ 0x20|0x12, 0x03, /* (0x32) +num */ +/* offset 600 */ 0xc0|0x19, 0x01, /* (25) key 'rfr_ctrl_reg' */ +/* offset 602 */ 0x20|0x11, 0xf0, 0x92, 0x01, /* (0x49701) +num */ +/* offset 606 */ 0xc0|0x1a, 0x01, /* (26) key 'emr2_reg' */ +/* offset 608 */ 0x20|0x10, 0x02, /* (0x20) +num */ +/* offset 610 */ 0xc0|0x1b, 0x01, /* (27) key 'actim_ctrla_reg' */ +/* offset 612 */ 0x20|0x17, 0xf0, 0xc8, 0xc9, 0x41, /* (0x83264707) +num */ +/* offset 617 */ 0xc0|0x1c, 0x01, /* (28) key 'actim_ctrlb_reg' */ +/* offset 619 */ 0x20|0x13, 0xe2, 0x42, /* (0x21623) +num */ +/* offset 622 */ 0xc0|0x15, 0x01, /* (21) key 'dlla_ctrl_reg' */ +/* offset 624 */ 0x20|0x08, /* (0x8) +num */ +/* offset 625 */ 0xc0|0x1e, 0x01, /* (30) key 'local_bus_group' */ +/* offset 627 */ 0xa0|0x1b, 0x02, /* (43) dict; size */ +/* offset 629 */ 0xc0|0x1f, 0x01, /* (31) key 'cs0_group' */ +/* offset 631 */ 0xa0|0x17, 0x02, /* (39) dict; size */ +/* offset 633 */ 0xc0|0x16, 0x02, /* (38) key 'config1_reg' */ +/* offset 635 */ 0x20|0x10, 0x80, 0x03, /* (0x1800) +num */ +/* offset 638 */ 0xc0|0x17, 0x02, /* (39) key 'config2_reg' */ +/* offset 640 */ 0x20|0x10, 0x90, 0xa1, 0x02, /* (0x90900) +num */ +/* offset 644 */ 0xc0|0x18, 0x02, /* (40) key 'config3_reg' */ +/* offset 646 */ 0x20|0x10, 0x90, 0xa1, 0x02, /* (0x90900) +num */ +/* offset 650 */ 0xc0|0x19, 0x02, /* (41) key 'config4_reg' */ +/* offset 652 */ 0x20|0x10, 0xd0, 0x80, 0x80, 0x03, /* (0x6000500) +num */ +/* offset 657 */ 0xc0|0x1a, 0x02, /* (42) key 'config5_reg' */ +/* offset 659 */ 0x20|0x1a, 0x80, 0xe1, 0x01, /* (0x7080a) +num */ +/* offset 663 */ 0xc0|0x1b, 0x02, /* (43) key 'config6_reg' */ +/* offset 665 */ 0x20|0x1f, 0x2c, /* (0x2cf) +num */ +/* offset 667 */ 0xc0|0x1c, 0x02, /* (44) key 'config7_reg' */ +/* offset 669 */ 0x20|0x1f, 0xf5, 0x01, /* (0xf5f) +num */ +}; diff --git a/board/ti/logic/logic-product-id.c b/board/ti/logic/logic-product-id.c new file mode 100644 index 00000000000..4f427f94b63 --- /dev/null +++ b/board/ti/logic/logic-product-id.c @@ -0,0 +1,285 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Code to extract x-loader perntinent data from product ID chip */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> + +// #include "dm3730logic-ddr.h" +// #include "dm3730logic-product-id.h" + +#include "prod-id/interface.h" +#include "prod-id/id-errno.h" +#include "logic-i2c.h" +#include "logic-id-data.h" +#include "logic-at24.h" +#include "logic-gpio.h" + +struct id_data id_data; + +/* Fetch a byte of data from the ID data on the i2c bus */ +unsigned char id_fetch_byte(unsigned char *mem_ptr, int offset, int *oor) +{ + unsigned char val; + + /* If data is off end of known size then complain */ + if (id_data.root_size && (offset >= (id_data.root_offset + id_data.root_size))) { + id_printf("Attempt to read past end of buffer (offset %u >= size %u)\n", offset, sizeof(id_data_buf)); + *oor = -ID_ERANGE; + return 0; /* Force upper layer to recover */ + } + + *oor = ID_EOK; + + if (mem_ptr) { + val = mem_ptr[offset]; + return val; + } else { + if (at24_read(offset, &val, 1) == 0) { + return val; + } + } + + *oor = ID_ENODEV; + return 0; +} + +int id_printf(const char *fmt, ...) +{ + va_list args; + char printbuffer[256]; + + va_start (args, fmt); + /* For this to work, printbuffer must be larger than + * anything we ever want to print. + */ + vsprintf (printbuffer, fmt, args); + va_end (args); + /* Print the string */ + serial_puts (printbuffer); + + return 0; +} + +void id_error(const char *fmt, ...) +{ + va_list args; + char printbuffer[256]; + + va_start (args, fmt); + /* For this to work, printbuffer must be larger than + * anything we ever want to print. + */ + vsprintf (printbuffer, fmt, args); + va_end (args); + /* Print the string */ + serial_puts (printbuffer); + +} + +static int found_id_data; +/* Initialize the product ID data and return 0 if found */ +static int product_id_init(void) +{ + int ret; + + memset(&id_data, 0, sizeof(id_data)); + + /* id_data.mem_ptr is an address top copy the ID data from the AT24 + * chip into during startup(since startup codehas to CRC whole data + * area). Once its read there we can access the copy instead of + * going back to the AT24 to read the data. */ + id_data.mem_ptr = (void *)SRAM_BASE; + + ret=at24_wakeup(); + if(ret) { + printf("wakeup_err=%d\n", ret); + } + + ret = id_startup(&id_data); + + + at24_shutdown(); + + if (ret != ID_EOK) { + return -1; + } + + return 0; +} + +int logic_has_new_product_id(void) +{ + if (!found_id_data) { + if (!product_id_init()) { + found_id_data = 1; + } + } + return found_id_data; +} + + +int logic_dump_serialization_info(void) +{ + int ret; + struct id_cookie cookie; + int part_number; + u8 model_name[32]; + u32 model_name_size; + u8 serial_number[10]; + u32 serial_number_size; + + if (!found_id_data) { + return -1; + } + + ret = id_init_cookie(&id_data, &cookie); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* find /serialization_group from root */ + ret = id_find_dict(&cookie, ID_KEY_serialization_group, IDENUM_DICT); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* Find serial_number */ + serial_number_size = sizeof(serial_number); + ret = id_find_string(&cookie, ID_KEY_serial_number, serial_number, &serial_number_size); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* Reinitialise cookie back to the root */ + ret = id_init_cookie(&id_data, &cookie); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* find /model_group from root */ + ret = id_find_dict(&cookie, ID_KEY_model_group, IDENUM_DICT); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* Find part number */ + ret = id_find_number(&cookie, ID_KEY_part_number, &part_number); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + /* Find model name */ + model_name_size = sizeof(model_name); + ret = id_find_string(&cookie, ID_KEY_model_name, model_name, &model_name_size); + if (ret != ID_EOK) { + printf("%s:%d ret %d\n", __FUNCTION__, __LINE__, ret); + return ret; + } + + printf("Part Number : %u\n", part_number); + printf("Model Name : %.*s\n", model_name_size, model_name); + printf("Serial Number: %.*s\n", serial_number_size, serial_number); + return 0; +} + +/* Extract GPMC timings for particular CS register */ +id_keys_t gpmc_ncs_keys[] = { + ID_KEY_cs0_group, + ID_KEY_cs1_group, + ID_KEY_cs2_group, + ID_KEY_cs3_group, + ID_KEY_cs4_group, + ID_KEY_cs5_group, + ID_KEY_cs6_group, +}; + +id_keys_t gpmc_config_reg_keys[] = { + ID_KEY_config1_reg, + ID_KEY_config2_reg, + ID_KEY_config3_reg, + ID_KEY_config4_reg, + ID_KEY_config5_reg, + ID_KEY_config6_reg, + ID_KEY_config7_reg, +}; + +int logic_extract_gpmc_timing(int cs, int *config_regs) +{ + int ret; + struct id_cookie cookie; + // int gpmc_config_values[ARRAY_SIZE(gpmc_config_reg_keys)]; + + if (!found_id_data) + return -1; + + ret = id_init_cookie(&id_data, &cookie); + if (ret != ID_EOK) { + return ret; + } + + /* find /cpu0_bus_group from root */ + ret = id_find_dict(&cookie, ID_KEY_cpu0_bus_group, IDENUM_DICT); + if (ret != ID_EOK) { + return ret; + } + + /* find /local_bus_group from /cpu0_bus_group */ + ret = id_find_dict(&cookie, ID_KEY_local_bus_group, IDENUM_DICT); + if (ret != ID_EOK) { + return ret; + } + + /* Now look for the particular chip select group */ + ret = id_find_dict(&cookie, gpmc_ncs_keys[cs], IDENUM_DICT); + if (ret != ID_EOK) { + return ret; + } + + /* We have the group, now extract all the config registers */ + ret = id_find_numbers(&cookie, gpmc_config_reg_keys, ARRAY_SIZE(gpmc_config_reg_keys), config_regs); + + return ret; +} + +int do_dump_id_data(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[]) +{ + printf("id_data: mem_ptr %p root_offset %u root_size %u\n", + id_data.mem_ptr, id_data.root_offset, id_data.root_size); + return 1; +} + +U_BOOT_CMD( + dump_id_data, 1, 1, do_dump_id_data, + "dump_id_data - dump product ID data", + "dump product ID data in human-readable form" +); diff --git a/board/ti/logic/logic-product-id.h b/board/ti/logic/logic-product-id.h new file mode 100644 index 00000000000..b4af92d606c --- /dev/null +++ b/board/ti/logic/logic-product-id.h @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +extern int logic_has_new_product_id(void); +extern void logic_dump_new_product_data(void); +extern void logic_dump_serialization_info(void); diff --git a/board/ti/logic/logic-proto.h b/board/ti/logic/logic-proto.h new file mode 100644 index 00000000000..2e67f76b978 --- /dev/null +++ b/board/ti/logic/logic-proto.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2010 + * Logic Product Development <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Function to touchup environment variables for display */ +extern void touchup_display_env(void); + diff --git a/board/ti/logic/logic.c b/board/ti/logic/logic.c new file mode 100644 index 00000000000..94562bdd40c --- /dev/null +++ b/board/ti/logic/logic.c @@ -0,0 +1,1300 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * + * Author : + * Peter Barada <peter.barada@logicpd.com> + * + * Derived from Beagle Board and 3430 SDP code by + * Richard Woodruff <r-woodruff2@ti.com> + * Syed Mohammed Khasim <khasim@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <netdev.h> +#include <flash.h> +#include <nand.h> +#include <i2c.h> +#include <twl4030.h> +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> +#include <asm/mach-types.h> +#include "logic.h" +#include "product_id.h" +#include "logic-proto.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define MUX_LOGIC_HSUSB0_D5_GPIO_MUX() \ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4)) /*GPIO_189*/ + +#define MUX_LOGIC_HSUSB0_D5_DATA5() \ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/ + +/* + * Routine: logic_identify + * Description: Detect if we are running on a Logic or Torpedo. + * This can be done by GPIO_189. If its low after driving it high, + * then its a SOM LV, else Torpedo. + */ +unsigned int logic_identify(void) +{ + unsigned int val = 0; + u32 cpu_family = get_cpu_family(); + int i; + + MUX_LOGIC_HSUSB0_D5_GPIO_MUX(); + + if (!omap_request_gpio(189)) { + + omap_set_gpio_direction(189, 0); + omap_set_gpio_dataout(189, 1); + + /* Let it soak for a bit */ + for (i=0; i<0x100; ++i) + asm("nop"); + + omap_set_gpio_direction(189, 1); + val = omap_get_gpio_datain(189); + omap_free_gpio(189); + + printf("Board:"); + if (cpu_family == CPU_OMAP36XX) { + printf(" DM37xx"); + if (val) { + printf(" Torpedo\n"); + val = MACH_TYPE_DM3730_TORPEDO; + } else { + printf(" SOM LV\n"); + val = MACH_TYPE_DM3730_SOM_LV; + } + } else { + printf(" OMAP35xx"); + if (val) { + printf(" Torpedo\n"); + val = MACH_TYPE_OMAP3_TORPEDO; + } else { + printf(" SOM LV\n"); + val = MACH_TYPE_OMAP3530_LV_SOM; + } + } + } + + MUX_LOGIC_HSUSB0_D5_DATA5(); + + return val; +} + +/* + * Set the default NAND ECC method used for the environment + */ +static int omap3logic_nand_default = -1; +void nand_setup_default_ecc_method(void) +{ + if (omap_nand_chip_has_ecc()) + omap3logic_nand_default = OMAP_ECC_CHIP; + else + omap3logic_nand_default = OMAP_ECC_HW; + + omap_nand_switch_ecc(omap3logic_nand_default); +} + +/* + * Switch NAND ECC method to that used for the environment, + * returning the current ECC method through *method + */ +void nand_switch_ecc_default(int *method) +{ + enum omap_nand_ecc_mode curr_mode; + + curr_mode = omap_nand_current_ecc_method(); + *method = (int) curr_mode; + + if (curr_mode != omap3logic_nand_default) + omap_nand_switch_ecc(omap3logic_nand_default); +} + +/* + * Switch ECC method + */ +void nand_switch_ecc_method(int method) +{ + enum omap_nand_ecc_mode curr_mode, new_mode; + + curr_mode = omap_nand_current_ecc_method(); + new_mode = (enum omap_nand_ecc_mode)method; + if (curr_mode != new_mode) + omap_nand_switch_ecc(new_mode); +} + +/* + * Touchup the environment, specificaly to setenv "defaultecc" + */ +void touchup_env(void) +{ + /* Set the defaultecc environment variable to the "natural" + * ECC method supported by the NAND chip */ + if (omap3logic_nand_default == OMAP_ECC_CHIP) + setenv("defaultecc", "chip"); + else if (omap3logic_nand_default == OMAP_ECC_HW) + setenv("defaultecc", "hw"); + else + printf("%s: bad NAND ECC default %d!\n", __FUNCTION__, omap3logic_nand_default); + + /* touchup the display environment variable(s) */ + touchup_display_env(); +} + +/* + * If the user tries to 'setenv foo', check if 'foo' is a "reserved" name. + * certain system variables should not be changed as they are board-specific + * variables + */ +int setenv_reserved_name(const char *name) +{ + if (!strcmp(name, "defaultecc")) + return 1; + return 0; +} + +#ifdef CONFIG_USB_OMAP3 +/* + * MUSB port on OMAP3EVM Rev >= E requires extvbus programming. + */ +u8 omap3_evm_need_extvbus(void) +{ + u8 retval = 0; + + retval = 1; + + return retval; +} +#endif + +static void setup_nand_settings(void); +static void setup_isp176x_settings(void); +static void setup_compact_flash_settings(void); +static void fix_flash_sync(void); + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + + /* board id for Linux */ + gd->bd->bi_arch_number = logic_identify(); + + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + /* Update NAND settings */ + setup_nand_settings(); + + /* Setup ISP176x settings */ + if (gd->bd->bi_arch_number == MACH_TYPE_DM3730_TORPEDO + || gd->bd->bi_arch_number == MACH_TYPE_OMAP3_TORPEDO) + setup_isp176x_settings(); + + /* Setup ComactFlash GPMC settings */ + if (gd->bd->bi_arch_number == MACH_TYPE_DM3730_SOM_LV + || gd->bd->bi_arch_number == MACH_TYPE_OMAP3530_LV_SOM) + setup_compact_flash_settings(); + + /* Probe for NOR and if found put into sync mode */ + fix_flash_sync(); + + return 0; +} + +int board_late_init(void) +{ + unsigned char enetaddr[6]; + + dump_production_data(); + + /* Fetch the ethaddr of the LAN */ + board_get_nth_enetaddr(enetaddr, 0, 0); +#ifdef CONFIG_HAS_ETH1 + /* Fetch the ethaddr of the WiFi */ + board_get_nth_enetaddr(enetaddr, 1, 1); +#endif + +#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK + nand_unlock(&nand_info[0], 0x0, nand_info[0].size); +#endif + +#ifdef CONFIG_ENABLE_TWL4030_CHARGING + /* Enable charging on Torpedo unless $disablecharging == yes */ + if (gd->bd->bi_arch_number == MACH_TYPE_OMAP3_TORPEDO) { + char *str; + str = getenv("disablecharging"); + if (!str || strcmp(str, "yes") != 0) { + printf("Torpedo: Enabling battery charging\n"); + twl4030_enable_charging(); + } + } +#endif + +#ifdef CONFIG_CMD_CACHE + dcache_enable(); + printf ("Data (writethrough) Cache is %s\n", + dcache_status() ? "ON" : "OFF"); +#endif + return 0; +} + +/* Turn on VAUX1 voltage to 3.0 volts to drive level shifters and + * power 3.0v parts (tsc2004 and Product ID chip) */ +#define I2C_TRITON2 0x4b /* Address of Triton power group */ + +void init_vaux1_voltage(void) +{ +#ifdef CONFIG_DRIVER_OMAP34XX_I2C + unsigned char data; + unsigned short msg; + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + /* Select the output voltage */ + data = 0x04; + i2c_write(I2C_TRITON2, 0x72, 1, &data, 1); + /* Select the Processor resource group */ + data = 0x20; + i2c_write(I2C_TRITON2, 0x72, 1, &data, 1); + /* Enable I2C access to the Power bus */ + data = 0x02; + i2c_write(I2C_TRITON2, 0x4a, 1, &data, 1); + /* Send message MSB */ + msg = (1<<13) | (1<<4) | (0xd<<0); /* group(process_grp1):resource(vaux1):res_active; */ + data = msg >> 8; + i2c_write(I2C_TRITON2, 0x4b, 1, &data, 1); + /* Send message LSB */ + data = msg & 0xff; + i2c_write(I2C_TRITON2, 0x4c, 1, &data, 1); +#endif +} + +/* + * Check _SYSCONFIG registers and fixup bootrom code leaving them in + * non forced-idle/smart-stdby mode + */ + +static void check_sysconfig_regs(void) +{ + unsigned int temp, temp2; + + /* Since DM3730Logic boards have bootorder of 0x2f, the bootrom + * attempts to boot via USB and leaves OTG_SYSCONFIG in non-idle */ + temp = *(unsigned int *)OTG_SYSCONFIG; + temp2 = OTG_SYSCONFIG_MIDLEMODE_SMART_STDBY + | OTG_SYSCONFIG_SIDLEMODE_FORCE_IDLE + | OTG_SYSCONFIG_AUTOIDLE; + if (temp != temp2) { + printf("OTG_SYSCONFIG: %08x - needs to be %08x\n", temp, temp2); + *(unsigned int *)OTG_SYSCONFIG = temp2; + } +} + + + +/* + * Routine: misc_init_r + * Description: Init ethernet (done here so udelay works) + */ +int misc_init_r(void) +{ + +#ifdef CONFIG_DRIVER_OMAP34XX_I2C + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + + /* Turn on vaux1 to make sure voltage is to the product ID chip. + * Extract production data from ID chip, used to selectively + * initialize portions of the system */ + init_vaux1_voltage(); + fetch_production_data(); + +#if defined(CONFIG_CMD_NET) + setup_net_chip(); +#endif + + dieid_num_r(); + + check_sysconfig_regs(); + + return 0; +} + + +/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */ +#define LOGIC_NET_GPMC_CONFIG1 0x00001000 +#define LOGIC_NET_GPMC_CONFIG2 0x00080801 +#define LOGIC_NET_GPMC_CONFIG3 0x00000000 +#define LOGIC_NET_GPMC_CONFIG4 0x08010801 +#define LOGIC_NET_GPMC_CONFIG5 0x00080a0a +#define LOGIC_NET_GPMC_CONFIG6 0x03000280 +#define LOGIC_NET_GPMC_CONFIG7 0x00000848 + +/* + * Routine: setup_net_chip + * Description: Setting up the configuration GPMC registers specific to the + * Ethernet hardware. + */ +static void setup_net_chip(void) +{ + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; + + /* Configure GPMC registers */ + writel(LOGIC_NET_GPMC_CONFIG1, &gpmc_cfg->cs[1].config1); + writel(LOGIC_NET_GPMC_CONFIG2, &gpmc_cfg->cs[1].config2); + writel(LOGIC_NET_GPMC_CONFIG3, &gpmc_cfg->cs[1].config3); + writel(LOGIC_NET_GPMC_CONFIG4, &gpmc_cfg->cs[1].config4); + writel(LOGIC_NET_GPMC_CONFIG5, &gpmc_cfg->cs[1].config5); + writel(LOGIC_NET_GPMC_CONFIG6, &gpmc_cfg->cs[1].config6); + writel(LOGIC_NET_GPMC_CONFIG7, &gpmc_cfg->cs[1].config7); + + /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ + writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); + /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); + /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, + &ctrl_base->gpmc_nadv_ale); + +} + +/* GPMC CS0 settings for Logic SOM LV/Torpedo NAND settings */ +#define LOGIC_NAND_GPMC_CONFIG1 0x00001800 +#define LOGIC_NAND_GPMC_CONFIG2 0x00090900 +#define LOGIC_NAND_GPMC_CONFIG3 0x00090900 +#define LOGIC_NAND_GPMC_CONFIG4 0x06000500 +#define LOGIC_NAND_GPMC_CONFIG5 0x0007080A +#define LOGIC_NAND_GPMC_CONFIG6 0x000002CF +#define LOGIC_NAND_GPMC_CONFIG7 0x00000C70 + +static void setup_nand_settings(void) +{ + /* struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; */ + + /* Configure GPMC registers */ + writel(0x00000000, &gpmc_cfg->cs[0].config7); + sdelay(1000); + writel(LOGIC_NAND_GPMC_CONFIG1, &gpmc_cfg->cs[0].config1); + writel(LOGIC_NAND_GPMC_CONFIG2, &gpmc_cfg->cs[0].config2); + writel(LOGIC_NAND_GPMC_CONFIG3, &gpmc_cfg->cs[0].config3); + writel(LOGIC_NAND_GPMC_CONFIG4, &gpmc_cfg->cs[0].config4); + writel(LOGIC_NAND_GPMC_CONFIG5, &gpmc_cfg->cs[0].config5); + writel(LOGIC_NAND_GPMC_CONFIG6, &gpmc_cfg->cs[0].config6); + writel(LOGIC_NAND_GPMC_CONFIG7, &gpmc_cfg->cs[0].config7); + sdelay(2000); +} + +#define LOGIC_CF_GPMC_CONFIG1 0x00001210 +#define LOGIC_CF_GPMC_CONFIG2 0x00131000 +#define LOGIC_CF_GPMC_CONFIG3 0x001f1f01 +#define LOGIC_CF_GPMC_CONFIG4 0x10030e03 +#define LOGIC_CF_GPMC_CONFIG5 0x010f1411 +#define LOGIC_CF_GPMC_CONFIG6 0x80030600 +#define LOGIC_CF_GPMC_CONFIG7 0x00000f58 + +static void setup_compact_flash_settings(void) +{ + /* Configure GPMC registers */ + writel(0x00000000, &gpmc_cfg->cs[3].config7); + sdelay(1000); + writel(LOGIC_CF_GPMC_CONFIG1, &gpmc_cfg->cs[3].config1); + writel(LOGIC_CF_GPMC_CONFIG2, &gpmc_cfg->cs[3].config2); + writel(LOGIC_CF_GPMC_CONFIG3, &gpmc_cfg->cs[3].config3); + writel(LOGIC_CF_GPMC_CONFIG4, &gpmc_cfg->cs[3].config4); + writel(LOGIC_CF_GPMC_CONFIG5, &gpmc_cfg->cs[3].config5); + writel(LOGIC_CF_GPMC_CONFIG6, &gpmc_cfg->cs[3].config6); + writel(LOGIC_CF_GPMC_CONFIG7, &gpmc_cfg->cs[3].config7); + sdelay(2000); +} + +/* GPMC CS6 settings for Logic SOM LV/Torpedo ISP176x settings */ +#define LOGIC_ISP176X_GPMC_CONFIG1 0x00001000 +#define LOGIC_ISP176X_GPMC_CONFIG2 0x00090900 +#define LOGIC_ISP176X_GPMC_CONFIG3 0x00000000 +#define LOGIC_ISP176X_GPMC_CONFIG4 0x05000900 +#define LOGIC_ISP176X_GPMC_CONFIG5 0x0007090c +#define LOGIC_ISP176X_GPMC_CONFIG6 0x04010200 +#define LOGIC_ISP176X_GPMC_CONFIG7 0x00000f5c + +static void setup_isp176x_settings(void) +{ + /* struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; */ + + /* Configure GPMC registers */ + writel(0x00000000, &gpmc_cfg->cs[6].config7); + sdelay(1000); + writel(LOGIC_ISP176X_GPMC_CONFIG1, &gpmc_cfg->cs[6].config1); + writel(LOGIC_ISP176X_GPMC_CONFIG2, &gpmc_cfg->cs[6].config2); + writel(LOGIC_ISP176X_GPMC_CONFIG3, &gpmc_cfg->cs[6].config3); + writel(LOGIC_ISP176X_GPMC_CONFIG4, &gpmc_cfg->cs[6].config4); + writel(LOGIC_ISP176X_GPMC_CONFIG5, &gpmc_cfg->cs[6].config5); + writel(LOGIC_ISP176X_GPMC_CONFIG6, &gpmc_cfg->cs[6].config6); + writel(LOGIC_ISP176X_GPMC_CONFIG7, &gpmc_cfg->cs[6].config7); + sdelay(2000); +} + +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG1 0x00001210 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG2 0x00101001 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG3 0x00020201 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG4 0x0f031003 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG5 0x000f1111 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG6 0x0f030080 +#define LOGIC_STNOR_ASYNC_GPMC_CONFIG7 0x00000c50 + +#define LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG1 0x6A411213 +#define LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG2 0x000C1503 +#define LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG3 0x00050503 +#define LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG4 0x0B051506 + +#define LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG1 0x68411213 +#define LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG2 0x000C1502 +#define LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG3 0x00040402 +#define LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG4 0x0B051505 + +#define LOGIC_STNOR_SYNC_GPMC_CONFIG5 0x020E0C15 +#define LOGIC_STNOR_SYNC_GPMC_CONFIG6 0x0B0603C3 +#define LOGIC_STNOR_SYNC_GPMC_CONFIG7 0x00000c50 + + +#define LOGIC_FLASH_BASE 0x10000000 + +/* These are bit definitions for the RCR register of the NOR flash */ +/* 28FxxxP30 device. This register sets the bus configration for reads. */ +/* settings, located on address pins A[15:0]. */ +#define FLASH_28FxxxP30_RCR_RM 0x8000 +#define FLASH_28FxxxP30_RCR_R 0x4000 +#define FLASH_28FxxxP30_RCR_LC(x) ((x & 0x7) << 11) +#define FLASH_28FxxxP30_RCR_WP 0x0400 +#define FLASH_28FxxxP30_RCR_DH 0x0200 +#define FLASH_28FxxxP30_RCR_WD 0x0100 +#define FLASH_28FxxxP30_RCR_BS 0x0080 +#define FLASH_28FxxxP30_RCR_CE 0x0040 +#define FLASH_28FxxxP30_RCR_BW 0x0008 +#define FLASH_28FxxxP30_RCR_BL(x) ((x & 0x7) << 0) +#define FLASH_28FxxxP30_BL_4 0x1 +#define FLASH_28FxxxP30_BL_8 0x2 +#define FLASH_28FxxxP30_BL_16 0x3 +#define FLASH_28FxxxP30_BL_CONT 0x7 + +/* + * Routine: fix_flash_sync + * Description: Setting up the configuration GPMC registers specific to the + * NOR flash (and place in sync mode if not done). + */ +int omap3logic_flash_exists; +static void fix_flash_sync(void) +{ + int arch_number; + u16 rcrval; + + /* Check the arch_number - Torpedo doesn't have NOR flash */ + arch_number = gd->bd->bi_arch_number; + if (!(arch_number == MACH_TYPE_DM3730_SOM_LV + || arch_number == MACH_TYPE_OMAP3530_LV_SOM)) + return; + + /* Check CS2 config, if its not in sync, or not valid, then configure it */ + if ( !(readl(&gpmc_cfg->cs[2].config1) & TYPE_READTYPE) || + !(readl(&gpmc_cfg->cs[2].config7) & 0x00000040) ) { + + /* Invalidate, in case it is set valid */ + writel(0x00000000, &gpmc_cfg->cs[2].config7); + + /* clear WAIT1 polarity */ + writel(readl(&gpmc_cfg->config) & ~0x200, &gpmc_cfg->config); + + /* clear GPMC_TIMEOUT */ + writel(0x0, &gpmc_cfg->timeout_control); + + /* Configure GPMC registers for async */ + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG1, &gpmc_cfg->cs[2].config1); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG2, &gpmc_cfg->cs[2].config2); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG3, &gpmc_cfg->cs[2].config3); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG4, &gpmc_cfg->cs[2].config4); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG5, &gpmc_cfg->cs[2].config5); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG6, &gpmc_cfg->cs[2].config6); + writel(LOGIC_STNOR_ASYNC_GPMC_CONFIG7, &gpmc_cfg->cs[2].config7); + + /* Test if this NOR flash is connected */ + *(volatile u16 *)LOGIC_FLASH_BASE = 0x0070; // Read status reg + if (*(volatile u16 *)LOGIC_FLASH_BASE != 0x0080) + { + writel(0x00000000, &gpmc_cfg->cs[2].config7); /* Invalidate chip select */ + puts("NOR: no flash device detected\n"); + return; // fail - no NOR flash detected + } + *(volatile u16 *)LOGIC_FLASH_BASE = 0x0050; // Restore to read mode + + puts("NOR: initialize in sync mode\n"); + + /* 1st NOR cycle, send read config register setup 0x60 */ + *(volatile u16 *)LOGIC_FLASH_BASE = 0x0060; + + /* 2nd NOR cycle, send 0x03 to latch in read + * configuration register setttings, located on A[15:0] */ + rcrval = FLASH_28FxxxP30_RCR_LC(4) | FLASH_28FxxxP30_RCR_WP | + FLASH_28FxxxP30_RCR_BS | FLASH_28FxxxP30_RCR_CE | + FLASH_28FxxxP30_RCR_BW | FLASH_28FxxxP30_RCR_BL(FLASH_28FxxxP30_BL_4); + *(volatile u16 *)(LOGIC_FLASH_BASE | (rcrval << 1)) = 0x0003; + + /* Give a chance for accesses to finish... */ + sdelay(2000); + + /* Third, set GPMC for sync. */ + if (arch_number == MACH_TYPE_DM3730_SOM_LV) { + /* Use DM3730 SOM LV NOR timings */ + writel(LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG1, &gpmc_cfg->cs[2].config1); + writel(LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG2, &gpmc_cfg->cs[2].config2); + writel(LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG3, &gpmc_cfg->cs[2].config3); + writel(LOGIC_STNOR_DM37x_SYNC_GPMC_CONFIG4, &gpmc_cfg->cs[2].config4); + } + if (arch_number == MACH_TYPE_OMAP3530_LV_SOM) { + /* Use DM3730 SOM LV NOR timings */ + writel(LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG1, &gpmc_cfg->cs[2].config1); + writel(LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG2, &gpmc_cfg->cs[2].config2); + writel(LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG3, &gpmc_cfg->cs[2].config3); + writel(LOGIC_STNOR_OMAP35x_SYNC_GPMC_CONFIG4, &gpmc_cfg->cs[2].config4); + } + writel(LOGIC_STNOR_SYNC_GPMC_CONFIG5, &gpmc_cfg->cs[2].config5); + writel(LOGIC_STNOR_SYNC_GPMC_CONFIG6, &gpmc_cfg->cs[2].config6); + writel(LOGIC_STNOR_SYNC_GPMC_CONFIG7, &gpmc_cfg->cs[2].config7); + /* And lastly, set the WAIT1 polarity high */ + writel(readl(&gpmc_cfg->config) | 0x200, &gpmc_cfg->config); + } else + puts ("NOR: Already initialized in sync mode\n"); + + omap3logic_flash_exists = 1; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} + +#ifdef CONFIG_CMD_GPMC_CONFIG +int do_dump_gpmc(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[]) +{ + gpmc_cfg = (struct gpmc *)GPMC_BASE; + int i; + printf("GPMC_SYSCONFIG: %08x\n", gpmc_cfg->sysconfig); + printf("GPMC_CONFIG: %08x\n", gpmc_cfg->config); + for (i=0; i<8; ++i) { + struct gpmc_cs *p = &gpmc_cfg->cs[i]; + if (p->config7 & (1<<6)) { + printf("GPMC%d: %08x %08x %08x %08x\n", i, + p->config1, p->config2, p->config3, p->config4); + printf(" %08x %08x %03x\n", + p->config5, p->config6, p->config7); + } + } + return 1; +} + +U_BOOT_CMD( + gpmc_config, 1, 1, do_dump_gpmc, + "gpmc_config - dump GPMC settings", + "dump valid GPMC configuration" +); +#endif + +#ifdef CONFIG_CMD_MUX_CONFIG +int do_dump_mux_config(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + int i,j; + u16 val; + struct { + u16 start; + u16 stop; + } mux_offsets[] = { + { + CONTROL_PADCONF_SDRC_D0, /* 0x0030 */ + CONTROL_PADCONF_SDRC_CKE1, /* 0x0264 */ + }, + { + CONTROL_PADCONF_SYS_32K, /* 0x0A04 */ + CONTROL_PADCONF_D2D_SWAKEUP, /* 0x0A4C */ + }, + { + CONTROL_PADCONF_ETK_CLK_ES2, /* 0x05D8 */ + CONTROL_PADCONF_ETK_D15_ES2, /* 0x05FA */ + }, + }; + + for (i=0; i<ARRAY_SIZE(mux_offsets); ++i) { + for (j=mux_offsets[i].start; j<mux_offsets[i].stop; j+= sizeof(u16)) { + val = readw(OMAP34XX_CTRL_BASE + j); + if ((val & M7) != M7) { + printf("%04x: %04x (", + j, val); + if (val & IEN) + printf("IEN "); + else + printf("IDIS"); + if (val & PTU) + printf(" | PTU"); + else + printf(" | PTD"); + if (val & EN) + printf(" | EN "); + else + printf(" | DIS"); + printf(" | M%d)\n", (val & M7)); + } + } + } + return 0; +} + +U_BOOT_CMD(mux_config, 1, 1, do_dump_mux_config, + "mux_config - dump active mux registers", + "dump active mux configuration" +); +#endif + + + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +#define SAFE_MODE_PINS_1 +#define SAFE_MODE_PINS_2 +#define SAFE_MODE_PINS_3 +#define SAFE_MODE_PINS_4 +#undef SAFE_MODE_PINS_5 +#define SAFE_MODE_PINS_5A +#define SAFE_MODE_PINS_6 +void set_muxconf_regs(void) +{ + /*SDRC*/ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); /*SDRC_D1*/ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); /*SDRC_D2*/ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); /*SDRC_D3*/ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); /*SDRC_D4*/ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); /*SDRC_D5*/ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); /*SDRC_D6*/ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); /*SDRC_D7*/ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); /*SDRC_D8*/ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); /*SDRC_D9*/ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); /*SDRC_D10*/ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); /*SDRC_D11*/ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); /*SDRC_D12*/ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); /*SDRC_D13*/ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); /*SDRC_D14*/ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); /*SDRC_D15*/ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); /*SDRC_D16*/ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); /*SDRC_D17*/ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); /*SDRC_D18*/ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); /*SDRC_D19*/ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); /*SDRC_D20*/ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); /*SDRC_D21*/ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); /*SDRC_D22*/ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); /*SDRC_D23*/ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); /*SDRC_D24*/ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); /*SDRC_D25*/ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); /*SDRC_D26*/ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); /*SDRC_D27*/ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); /*SDRC_D28*/ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); /*SDRC_D29*/ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); /*SDRC_D30*/ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); /*SDRC_D31*/ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); /*SDRC_CLK*/ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); /*SDRC_DQS0*/ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); /*SDRC_DQS1*/ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/ + /*GPMC*/ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); /*GPMC_A3*/ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); /*GPMC_A4*/ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); /*GPMC_A5*/ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); /*GPMC_A6*/ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); /*GPMC_A7*/ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); /*GPMC_A8*/ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); /*GPMC_A9*/ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); /*GPMC_A10*/ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); /*GPMC_D0*/ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); /*GPMC_D1*/ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); /*GPMC_D2*/ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); /*GPMC_D3*/ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); /*GPMC_D4*/ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); /*GPMC_D5*/ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); /*GPMC_D6*/ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); /*GPMC_D7*/ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); /*GPMC_D8*/ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); /*GPMC_D9*/ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); /*GPMC_D10*/ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); /*GPMC_D11*/ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); /*GPMC_D12*/ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); /*GPMC_D13*/ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); /*GPMC_D14*/ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); /*GPMC_D15*/ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); /*GPMC_nCS0*/ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); /*GPMC_nCS1*/ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); /*GPMC_nCS2*/ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); /*GPMC_nCS3*/ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/ +#if 1 + /* Display GPIO */ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); /*GPIO_65 backlight */ +#else + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)); /*GPMC_nCS5*/ +#endif + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)); /*GPMC_nCS6*/ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ + MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M0)); /*GPMC_CLK*/ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*GPMC_nADV_ALE*/ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); /*GPMC_nOE*/ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); /*GPMC_nWE*/ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); /*GPMC_nBE0_CLE*/ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)); /*GPMC_nBE1*/ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); /*GPMC_nWP*/ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); /*GPMC_WAIT0*/ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); /*GPMC_WAIT1*/ +#ifdef SAFE_MODE_PINS_1 + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTD | EN | M7)); /*safe mode */ +#else + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)); /*GPIO_64*/ + /* - ETH_nRESET*/ +#endif + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)); /*GPMC_WAIT3*/ + /*DSS*/ +#ifdef SAFE_MODE_PINS_2 + MUX_VAL(CP(DSS_PCLK), (IEN | PTD | EN | M7)); /*DSS_PCLK*/ + MUX_VAL(CP(DSS_HSYNC), (IEN | PTD | EN | M7)); /*DSS_HSYNC*/ + MUX_VAL(CP(DSS_VSYNC), (IEN | PTD | EN | M7)); /*DSS_VSYNC*/ + MUX_VAL(CP(DSS_ACBIAS), (IEN | PTD | EN | M7)); /*DSS_ACBIAS*/ + MUX_VAL(CP(DSS_DATA0), (IEN | PTD | EN | M7)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA1), (IEN | PTD | EN | M7)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA2), (IEN | PTD | EN | M7)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA3), (IEN | PTD | EN | M7)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA4), (IEN | PTD | EN | M7)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA5), (IEN | PTD | EN | M7)); /*DSS_DATA5*/ + MUX_VAL(CP(DSS_DATA6), (IEN | PTD | EN | M7)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA7), (IEN | PTD | EN | M7)); /*DSS_DATA7*/ + MUX_VAL(CP(DSS_DATA8), (IEN | PTD | EN | M7)); /*DSS_DATA8*/ + MUX_VAL(CP(DSS_DATA9), (IEN | PTD | EN | M7)); /*DSS_DATA9*/ + MUX_VAL(CP(DSS_DATA10), (IEN | PTD | EN | M7)); /*DSS_DATA10*/ + MUX_VAL(CP(DSS_DATA11), (IEN | PTD | EN | M7)); /*DSS_DATA11*/ + MUX_VAL(CP(DSS_DATA12), (IEN | PTD | EN | M7)); /*DSS_DATA12*/ + MUX_VAL(CP(DSS_DATA13), (IEN | PTD | EN | M7)); /*DSS_DATA13*/ + MUX_VAL(CP(DSS_DATA14), (IEN | PTD | EN | M7)); /*DSS_DATA14*/ + MUX_VAL(CP(DSS_DATA15), (IEN | PTD | EN | M7)); /*DSS_DATA15*/ + MUX_VAL(CP(DSS_DATA16), (IEN | PTD | EN | M7)); /*DSS_DATA16*/ + MUX_VAL(CP(DSS_DATA17), (IEN | PTD | EN | M7)); /*DSS_DATA17*/ + MUX_VAL(CP(DSS_DATA18), (IEN | PTD | EN | M7)); /*DSS_DATA18*/ + MUX_VAL(CP(DSS_DATA19), (IEN | PTD | EN | M7)); /*DSS_DATA19*/ + MUX_VAL(CP(DSS_DATA20), (IEN | PTD | EN | M7)); /*DSS_DATA20*/ + MUX_VAL(CP(DSS_DATA21), (IEN | PTD | EN | M7)); /*DSS_DATA21*/ + MUX_VAL(CP(DSS_DATA22), (IEN | PTD | EN | M7)); /*DSS_DATA22*/ + MUX_VAL(CP(DSS_DATA23), (IEN | PTD | EN | M7)); /*DSS_DATA23*/ + /*CAMERA*/ + MUX_VAL(CP(CAM_HS), (IEN | PTD | EN | M7)); /*CAM_HS */ + MUX_VAL(CP(CAM_VS), (IEN | PTD | EN | M7)); /*CAM_VS */ + MUX_VAL(CP(CAM_XCLKA), (IEN | PTD | EN | M7)); /*CAM_XCLKA*/ + MUX_VAL(CP(CAM_PCLK), (IEN | PTD | EN | M7)); /*CAM_PCLK*/ + MUX_VAL(CP(CAM_FLD), (IEN | PTD | EN | M7)); /*GPIO_98*/ + /* - CAM_RESET*/ + MUX_VAL(CP(CAM_D0), (IEN | PTD | EN | M7)); /*CAM_D0*/ + MUX_VAL(CP(CAM_D1), (IEN | PTD | EN | M7)); /*CAM_D1*/ + MUX_VAL(CP(CAM_D2), (IEN | PTD | EN | M7)); /*CAM_D2*/ + MUX_VAL(CP(CAM_D3), (IEN | PTD | EN | M7)); /*CAM_D3*/ + MUX_VAL(CP(CAM_D4), (IEN | PTD | EN | M7)); /*CAM_D4*/ + MUX_VAL(CP(CAM_D5), (IEN | PTD | EN | M7)); /*CAM_D5*/ + MUX_VAL(CP(CAM_D6), (IEN | PTD | EN | M7)); /*CAM_D6*/ + MUX_VAL(CP(CAM_D7), (IEN | PTD | EN | M7)); /*CAM_D7*/ + MUX_VAL(CP(CAM_D8), (IEN | PTD | EN | M7)); /*CAM_D8*/ + MUX_VAL(CP(CAM_D9), (IEN | PTD | EN | M7)); /*CAM_D9*/ + MUX_VAL(CP(CAM_D10), (IEN | PTD | EN | M7)); /*CAM_D10*/ + MUX_VAL(CP(CAM_D11), (IEN | PTD | EN | M7)); /*CAM_D11*/ + MUX_VAL(CP(CAM_XCLKB), (IEN | PTD | EN | M7)); /*CAM_XCLKB*/ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | EN | M7)); /*GPIO_167*/ + MUX_VAL(CP(CAM_STROBE), (IEN | PTD | EN | M7)); /*CAM_STROBE*/ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M7)); /*CSI2_DX0*/ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M7)); /*CSI2_DY0*/ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M7)); /*CSI2_DX1*/ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M7)); /*CSI2_DY1*/ + /*Audio Interface */ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M7)); /*McBSP2_FSX*/ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M7)); /*McBSP2_CLKX*/ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M7)); /*McBSP2_DR*/ + MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M7)); /*McBSP2_DX*/ +#else + /*CAMERA*/ + MUX_VAL(CP(CAM_HS), (IEN | PTD | EN | M0)); /*CAM_HS */ + MUX_VAL(CP(CAM_VS), (IEN | PTD | EN | M0)); /*CAM_VS */ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | EN | M0)); /*CAM_XCLKA*/ + MUX_VAL(CP(CAM_PCLK), (IEN | PTD | EN | M0)); /*CAM_PCLK*/ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | EN | M4)); /*GPIO_98*/ + /* - CAM_RESET*/ + MUX_VAL(CP(CAM_D0), (IEN | PTD | EN | M0)); /*CAM_D0*/ + MUX_VAL(CP(CAM_D1), (IEN | PTD | EN | M0)); /*CAM_D1*/ + MUX_VAL(CP(CAM_D2), (IEN | PTD | EN | M0)); /*CAM_D2*/ + MUX_VAL(CP(CAM_D3), (IEN | PTD | EN | M0)); /*CAM_D3*/ + MUX_VAL(CP(CAM_D4), (IEN | PTD | EN | M0)); /*CAM_D4*/ + MUX_VAL(CP(CAM_D5), (IEN | PTD | EN | M0)); /*CAM_D5*/ + MUX_VAL(CP(CAM_D6), (IEN | PTD | EN | M0)); /*CAM_D6*/ + MUX_VAL(CP(CAM_D7), (IEN | PTD | EN | M0)); /*CAM_D7*/ + MUX_VAL(CP(CAM_D8), (IEN | PTD | EN | M0)); /*CAM_D8*/ + MUX_VAL(CP(CAM_D9), (IEN | PTD | EN | M0)); /*CAM_D9*/ + MUX_VAL(CP(CAM_D10), (IEN | PTD | EN | M0)); /*CAM_D10*/ + MUX_VAL(CP(CAM_D11), (IEN | PTD | EN | M0)); /*CAM_D11*/ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | EN | M0)); /*CAM_XCLKB*/ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | EN | M4)); /*GPIO_167*/ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | EN | M0)); /*CAM_STROBE*/ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M0)); /*CSI2_DX0*/ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M0)); /*CSI2_DY0*/ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M0)); /*CSI2_DX1*/ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M0)); /*CSI2_DY1*/ + /*Audio Interface */ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M0)); /*McBSP2_FSX*/ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M0)); /*McBSP2_CLKX*/ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M0)); /*McBSP2_DR*/ + MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | EN | M0)); /*McBSP2_DX*/ +#endif + +#if 0 /* Setup in lcd_setup_pinmux() */ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | EN | M0)); /*DSS_PCLK*/ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | EN | M0)); /*DSS_HSYNC*/ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | EN | M0)); /*DSS_VSYNC*/ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | EN | M0)); /*DSS_ACBIAS*/ +#if 1 + /*DSS - with DATA18-23 muxed as DATA0-5 */ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | EN | M0)); /*DSS_PCLK*/ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | EN | M0)); /*DSS_HSYNC*/ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | EN | M0)); /*DSS_VSYNC*/ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | EN | M0)); /*DSS_ACBIAS*/ +#if 1 + /* SOM used DATA0-5 for output */ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | EN | M0)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | EN | M0)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | EN | M0)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | EN | M0)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | EN | M0)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | EN | M0)); /*DSS_DATA5*/ +#else + /* Torpedo doesn't used DATA0-5 for output */ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | EN | M7)); /*SAFE*/ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | EN | M7)); /*SAFE*/ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | EN | M7)); /*SAFE*/ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | EN | M7)); /*SAFE*/ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | EN | M7)); /*SAFE*/ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | EN | M7)); /*SAFE*/ +#endif + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | EN | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | EN | M0)); /*DSS_DATA7*/ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | EN | M0)); /*DSS_DATA8*/ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | EN | M0)); /*DSS_DATA9*/ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | EN | M0)); /*DSS_DATA10*/ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | EN | M0)); /*DSS_DATA11*/ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | EN | M0)); /*DSS_DATA12*/ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | EN | M0)); /*DSS_DATA13*/ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | EN | M0)); /*DSS_DATA14*/ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | EN | M0)); /*DSS_DATA15*/ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | EN | M0)); /*DSS_DATA16*/ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | EN | M0)); /*DSS_DATA17*/ +#if 1 + /* SOM uses DATA18-23 as they are*/ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | EN | M0)); /*DSS_DATA18*/ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | EN | M0)); /*DSS_DATA19*/ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | EN | M0)); /*DSS_DATA20*/ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | EN | M0)); /*DSS_DATA21*/ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | EN | M0)); /*DSS_DATA22*/ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | EN | M0)); /*DSS_DATA23*/ +#else + /* Torpedo uses DATA18-23 as DATA0-5 */ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | EN | M3)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | EN | M3)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | EN | M3)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | EN | M3)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | EN | M3)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | EN | M3)); /*DSS_DATA5*/ +#endif +#else + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | EN | M0)); /*DSS_DATA0*/ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | EN | M0)); /*DSS_DATA1*/ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | EN | M0)); /*DSS_DATA2*/ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | EN | M0)); /*DSS_DATA3*/ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | EN | M0)); /*DSS_DATA4*/ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | EN | M0)); /*DSS_DATA5*/ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | EN | M0)); /*DSS_DATA6*/ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | EN | M0)); /*DSS_DATA7*/ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | EN | M0)); /*DSS_DATA8*/ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | EN | M0)); /*DSS_DATA9*/ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | EN | M0)); /*DSS_DATA10*/ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | EN | M0)); /*DSS_DATA11*/ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | EN | M0)); /*DSS_DATA12*/ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | EN | M0)); /*DSS_DATA13*/ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | EN | M0)); /*DSS_DATA14*/ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | EN | M0)); /*DSS_DATA15*/ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | EN | M0)); /*DSS_DATA16*/ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | EN | M0)); /*DSS_DATA17*/ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | EN | M0)); /*DSS_DATA18*/ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | EN | M0)); /*DSS_DATA19*/ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | EN | M0)); /*DSS_DATA20*/ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | EN | M0)); /*DSS_DATA21*/ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | EN | M0)); /*DSS_DATA22*/ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | EN | M0)); /*DSS_DATA23*/ +#endif +#endif + + /*Expansion card */ + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); /*MMC1_CLK*/ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); /*MMC1_CMD*/ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); /*MMC1_DAT0*/ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/ +#ifdef SAFE_MODE_PINS_3 + MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | EN | M7)); /*MMC1_DAT4*/ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | EN | M7)); /*MMC1_DAT5*/ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTD | EN | M7)); /*MMC1_DAT6*/ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTD | EN | M7)); /*MMC1_DAT7*/ + /*Wireless LAN */ + MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M7)); /*MMC2_CLK*/ + MUX_VAL(CP(MMC2_CMD), (IEN | PTD | EN | M7)); /*MMC2_CMD*/ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTD | EN | M7)); /*MMC2_DAT0*/ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTD | EN | M7)); /*MMC2_DAT1*/ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTD | EN | M7)); /*MMC2_DAT2*/ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTD | EN | M7)); /*MMC2_DAT3*/ + MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M7)); /*MMC2_DAT4*/ + MUX_VAL(CP(MMC2_DAT5), (IEN | PTD | EN | M7)); /*MMC2_DAT5*/ + MUX_VAL(CP(MMC2_DAT6), (IEN | PTD | EN | M7)); /*MMC2_DAT6 */ + MUX_VAL(CP(MMC2_DAT7), (IEN | PTD | EN | M7)); /*MMC2_DAT7*/ + /*Bluetooth*/ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | EN | M7)); /*McBSP3_DX*/ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | EN | M7)); /*McBSP3_DR*/ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | EN | M7)); /*McBSP3_CLKX */ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | EN | M7)); /*McBSP3_FSX*/ + MUX_VAL(CP(UART2_CTS), (IEN | PTD | EN | M7)); /*UART2_CTS*/ + MUX_VAL(CP(UART2_RTS), (IEN | PTD | EN | M7)); /*UART2_RTS*/ + MUX_VAL(CP(UART2_TX), (IEN | PTD | EN | M7)); /*UART2_TX*/ + MUX_VAL(CP(UART2_RX), (IEN | PTD | EN | M7)); /*UART2_RX*/ +#else + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)); /*MMC1_DAT4*/ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)); /*MMC1_DAT5*/ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)); /*MMC1_DAT6*/ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)); /*MMC1_DAT7*/ + /*Wireless LAN */ + MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)); /*MMC2_CLK*/ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)); /*MMC2_CMD*/ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)); /*MMC2_DAT0*/ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)); /*MMC2_DAT1*/ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)); /*MMC2_DAT2*/ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)); /*MMC2_DAT3*/ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M0)); /*MMC2_DAT4*/ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M0)); /*MMC2_DAT5*/ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M0)); /*MMC2_DAT6 */ + MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)); /*MMC2_DAT7*/ + /*Bluetooth*/ + MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)); /*McBSP3_DX*/ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)); /*McBSP3_DR*/ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)); /*McBSP3_CLKX */ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)); /*McBSP3_FSX*/ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)); /*UART2_CTS*/ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)); /*UART2_RTS*/ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)); /*UART2_TX*/ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)); /*UART2_RX*/ +#endif + /*Modem Interface */ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); /*UART1_TX*/ + MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); /*UART1_CTS*/ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); /*UART1_RX*/ +#ifdef SAFE_MODE_PINS_4 + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | EN | M7)); /*GPIO_152*/ + /* - LCD_INI*/ + MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | EN | M7)); /*GPIO_153*/ + /* - LCD_ENVDD */ +#if 1 +#if 1 + /* SOM doesn't use GPIO_154 for backlight pwr */ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | EN | M7)); /*GPIO_154*/ +#else + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | EN | M4)); /*GPIO_154*/ +#endif + MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | EN | M4)); /*GPIO_155*/ +#else + MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | EN | M7)); /*GPIO_154*/ + /* - LCD_QVGA/nVGA */ + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | EN | M7)); /*GPIO_155*/ + /* - LCD_RESB */ +#endif + + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M7)); /*MCBSP1_CLKR */ + MUX_VAL(CP(MCBSP1_FSR), (IEN | PTD | EN | M7)); /*MCBSP1_FSR*/ + MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | EN | M7)); /*MCBSP1_DX*/ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | EN | M7)); /*MCBSP1_DR*/ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M7)); /*MCBSP_CLKS */ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | EN | M7)); /*MCBSP1_FSX*/ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | EN | M7)); /*MCBSP1_CLKX */ + /*Serial Interface*/ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M7)); /*UART3_CTS_*/ + /* RCTX*/ + MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | EN | M7)); /*UART3_RTS_SD */ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | EN | M7)); /*UART3_RX_IRRX*/ + MUX_VAL(CP(UART3_TX_IRTX), (IEN | PTD | EN | M7)); /*UART3_TX_IRTX*/ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | EN | M7)); /*HSUSB0_CLK*/ + MUX_VAL(CP(HSUSB0_STP), (IEN | PTD | EN | M7)); /*HSUSB0_STP*/ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | EN | M7)); /*HSUSB0_DIR*/ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | EN | M7)); /*HSUSB0_NXT*/ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | EN | M7)); /*HSUSB0_DATA0*/ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | EN | M7)); /*HSUSB0_DATA1*/ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | EN | M7)); /*HSUSB0_DATA2*/ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | EN | M7)); /*HSUSB0_DATA3*/ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | EN | M7)); /*HSUSB0_DATA4*/ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | EN | M7)); /*HSUSB0_DATA5*/ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | EN | M7)); /*HSUSB0_DATA6*/ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | EN | M7)); /*HSUSB0_DATA7*/ +#else + MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)); /*GPIO_152*/ + /* - LCD_INI*/ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)); /*GPIO_153*/ + /* - LCD_ENVDD */ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)); /*GPIO_154*/ + /* - LCD_QVGA/nVGA */ + MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | DIS | M4)); /*GPIO_155*/ + /* - LCD_RESB */ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)); /*MCBSP1_CLKR */ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)); /*MCBSP1_FSR*/ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)); /*MCBSP1_DX*/ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)); /*MCBSP1_DR*/ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)); /*MCBSP_CLKS */ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)); /*MCBSP1_FSX*/ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)); /*MCBSP1_CLKX */ + /*Serial Interface*/ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)); /*UART3_CTS_*/ + /* RCTX*/ + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)); /*UART3_RTS_SD */ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); /*UART3_RX_IRRX*/ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); /*UART3_TX_IRTX*/ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)); /*HSUSB0_CLK*/ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)); /*HSUSB0_STP*/ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)); /*HSUSB0_DIR*/ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)); /*HSUSB0_NXT*/ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA0*/ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA1*/ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA2*/ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA3*/ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA4*/ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA5*/ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA6*/ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA7*/ +#endif + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); /*I2C1_SCL*/ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); /*I2C1_SDA*/ +#ifdef SAFE_MODE_PINS_5 + MUX_VAL(CP(I2C2_SCL), (IEN | PTD | EN | M7)); /*I2C2_SCL*/ + MUX_VAL(CP(I2C2_SDA), (IEN | PTD | EN | M7)); /*I2C2_SDA*/ + MUX_VAL(CP(I2C3_SCL), (IEN | PTD | EN | M7)); /*I2C3_SCL*/ + MUX_VAL(CP(I2C3_SDA), (IEN | PTD | EN | M7)); /*I2C3_SDA*/ + MUX_VAL(CP(I2C4_SCL), (IEN | PTD | EN | M7)); /*I2C4_SCL*/ + MUX_VAL(CP(I2C4_SDA), (IEN | PTD | EN | M7)); /*I2C4_SDA*/ +#else + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); /*I2C2_SCL*/ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); /*I2C2_SDA*/ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); /*I2C3_SCL*/ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); /*I2C3_SDA*/ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)); /*I2C4_SCL*/ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)); /*I2C4_SDA*/ +#endif + MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); /*HDQ_SIO*/ +#ifdef SAFE_MODE_PINS_5A + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | EN | M7)); /*McSPI1_CLK*/ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | EN | M7)); /*McSPI1_SIMO */ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M7)); /*McSPI1_SOMI */ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M7)); /*McSPI1_CS0*/ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M7)); /*GPIO_175*/ + /* TS_PEN_IRQ */ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M7)); /*GPIO_176*/ + /* - LAN_INTR*/ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M7)); /*McSPI1_CS3*/ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M7)); /*McSPI2_CLK*/ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M7)); /*McSPI2_SIMO*/ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M7)); /*McSPI2_SOMI*/ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M7)); /*McSPI2_CS0*/ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M7)); /*McSPI2_CS1*/ +#else + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)); /*McSPI1_CLK*/ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)); /*McSPI1_SIMO */ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)); /*McSPI1_SOMI */ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)); /*McSPI1_CS0*/ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)); /*GPIO_175*/ + /* TS_PEN_IRQ */ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)); /*GPIO_176*/ + /* - LAN_INTR*/ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)); /*McSPI1_CS3*/ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)); /*McSPI2_CLK*/ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)); /*McSPI2_SIMO*/ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)); /*McSPI2_SOMI*/ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)); /*McSPI2_CS0*/ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)); /*McSPI2_CS1*/ +#endif + /*Control and debug */ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)); /*SYS_32K*/ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)); /*SYS_CLKREQ*/ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); /*SYS_nIRQ*/ +#ifdef SAFE_MODE_PINS_6 + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | EN | M7)); /*GPIO_2*/ + /* - PEN_IRQ */ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | EN | M7)); /*GPIO_3 */ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | EN | M7)); /*GPIO_4*/ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | EN | M7)); /*GPIO_5*/ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | EN | M7)); /*GPIO_6*/ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | EN | M7)); /*GPIO_7*/ +#if 1 + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTU | DIS | M4)); /*SOM BACKLIGHT PWR*/ +#else + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | EN | M7)); /*GPIO_8*/ +#endif +#else + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)); /*GPIO_2*/ + /* - PEN_IRQ */ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)); /*GPIO_3 */ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)); /*GPIO_4*/ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)); /*GPIO_5*/ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)); /*GPIO_6*/ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)); /*GPIO_7*/ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)); /*GPIO_8*/ +#endif /* - VIO_1V8*/ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); /*SYS_OFF_MODE*/ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); /*SYS_CLKOUT1*/ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); /*SYS_CLKOUT2*/ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)); /*JTAG_nTRST*/ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)); /*JTAG_TCK*/ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)); /*JTAG_TMS*/ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)); /*JTAG_TDI*/ + MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)); /*JTAG_EMU0*/ + MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)); /*JTAG_EMU1*/ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)); /*ETK_CLK*/ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)); /*ETK_CTL*/ + MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D0*/ + MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D1*/ + MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | EN | M0)); /*ETK_D2*/ + MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D3*/ + MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D4*/ + MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D5*/ + MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D6*/ + MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D7*/ + MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D8*/ + MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)); /*ETK_D9*/ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)); /*ETK_D10*/ + MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)); /*ETK_D11*/ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)); /*ETK_D12*/ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)); /*ETK_D13*/ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)); /*ETK_D14*/ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)); /*ETK_D15*/ + /*Die to Die */ + MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)); /*d2d_mcad1*/ + MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)); /*d2d_mcad2*/ + MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)); /*d2d_mcad3*/ + MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)); /*d2d_mcad4*/ + MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)); /*d2d_mcad5*/ + MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)); /*d2d_mcad6*/ + MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)); /*d2d_mcad7*/ + MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)); /*d2d_mcad8*/ + MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)); /*d2d_mcad9*/ + MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)); /*d2d_mcad10*/ + MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)); /*d2d_mcad11*/ + MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)); /*d2d_mcad12*/ + MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)); /*d2d_mcad13*/ + MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)); /*d2d_mcad14*/ + MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)); /*d2d_mcad15*/ + MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)); /*d2d_mcad16*/ + MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)); /*d2d_mcad17*/ + MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)); /*d2d_mcad18*/ + MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)); /*d2d_mcad19*/ + MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)); /*d2d_mcad20*/ + MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)); /*d2d_mcad21*/ + MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)); /*d2d_mcad22*/ + MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)); /*d2d_mcad23*/ + MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)); /*d2d_mcad24*/ + MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)); /*d2d_mcad25*/ + MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)); /*d2d_mcad26*/ + MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)); /*d2d_mcad27*/ + MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)); /*d2d_mcad28*/ + MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)); /*d2d_mcad29*/ + MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)); /*d2d_mcad30*/ + MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)); /*d2d_mcad31*/ + MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)); /*d2d_mcad32*/ + MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)); /*d2d_mcad33*/ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)); /*d2d_mcad34*/ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)); /*d2d_mcad35*/ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)); /*d2d_mcad36*/ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)); /*d2d_clk26mi*/ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)); /*d2d_nrespwron*/ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)); /*d2d_nreswarm */ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)); /*d2d_arm9nirq */ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)); /*d2d_uma2p6fiq*/ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)); /*d2d_spint*/ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)); /*d2d_frint*/ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)); /*d2d_dmareq0*/ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)); /*d2d_dmareq1*/ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)); /*d2d_dmareq2*/ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)); /*d2d_dmareq3*/ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)); /*d2d_n3gtrst*/ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)); /*d2d_n3gtdi*/ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)); /*d2d_n3gtdo*/ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)); /*d2d_n3gtms*/ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)); /*d2d_n3gtck*/ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)); /*d2d_n3grtck*/ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)); /*d2d_mstdby*/ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)); /*d2d_swakeup*/ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)); /*d2d_idlereq*/ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)); /*d2d_idleack*/ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)); /*d2d_mwrite*/ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)); /*d2d_swrite*/ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)); /*d2d_mread*/ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)); /*d2d_sread*/ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_mbusflag*/ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_sbusflag*/ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*sdrc_cke0*/ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*sdrc_cke1*/ +} diff --git a/board/ti/logic/logic.h b/board/ti/logic/logic.h new file mode 100644 index 00000000000..a880281e0e2 --- /dev/null +++ b/board/ti/logic/logic.h @@ -0,0 +1,412 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * + * Author: + * Peter Barada <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _EVM_H_ +#define _EVM_H_ + +const omap3_sysinfo sysinfo = { + DDR_DISCRETE, + "Logic DM37x/OMAP35x reference board", +#if defined(CONFIG_ENV_IS_IN_ONENAND) + "OneNAND", +#else + "NAND", +#endif +}; + +/* + * OMAP35x EVM revision + * Run time detection of EVM revision is done by reading Ethernet + * PHY ID - + * GEN_1 = 0x01150000 + * GEN_2 = 0x92200000 + */ +enum { + OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */ + OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */ +}; + +u32 get_omap3_evm_rev(void); + +#if defined(CONFIG_CMD_NET) +static void setup_net_chip(void); +#endif + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_EVM() \ + /*SDRC*/\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ + /*GPMC*/\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)) /*GPMC_nCS4*/\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) /*GPMC_nBE0_CLE*/\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) /*GPMC_nBE1*/\ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ + /* - ETH_nRESET*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\ + /*DSS*/\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ + /*CAMERA*/\ + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ + /* - CAM_RESET*/\ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\ + /*Audio Interface */\ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ + MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ + /*Expansion card */\ + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ + /*Wireless LAN */\ + MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)) /*MMC2_CLK*/\ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M0)) /*MMC2_DAT4*/\ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M0)) /*MMC2_DAT5*/\ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M0)) /*MMC2_DAT6 */\ + MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)) /*MMC2_DAT7*/\ + /*Bluetooth*/\ + MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX */\ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /*UART2_RX*/\ + /*Modem Interface */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ + MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ + MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_152*/\ + /* - LCD_INI*/\ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ + /* - LCD_ENVDD */\ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ + /* - LCD_QVGA/nVGA */\ + MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_155*/\ + /* - LCD_RESB */\ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKR */\ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) /*MCBSP1_FSR*/\ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) /*MCBSP1_DX*/\ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) /*MCBSP1_DR*/\ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*MCBSP_CLKS */\ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*MCBSP1_FSX*/\ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKX */\ + /*Serial Interface*/\ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_*/\ + /* RCTX*/\ + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ + MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO*/\ + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ + /* TS_PEN_IRQ */\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\ + /* - LAN_INTR*/\ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\ + /*Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + /* - PEN_IRQ */\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ + /* - VIO_1V8*/\ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) /*SYS_CLKOUT2*/\ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ + MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\ + MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)) /*ETK_CLK*/\ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)) /*ETK_CTL*/\ + MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D0*/\ + MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D1*/\ + MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | EN | M0)) /*ETK_D2*/\ + MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D3*/\ + MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D4*/\ + MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D5*/\ + MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D6*/\ + MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\ + MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\ + MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\ + MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\ + /*Die to Die */\ + MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ + MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ + MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ + MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ + MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ + MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ + MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ + MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ + MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ + MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ + MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ + MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ + MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ + MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ + MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ + MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ + MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ + MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ + MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ + MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ + MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ + MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ + MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ + MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ + MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ + MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ + MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ + MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ + MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ + MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ + MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ + MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ + MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/\ + +#endif diff --git a/board/ti/logic/prod-id/crc-15.c b/board/ti/logic/prod-id/crc-15.c new file mode 100644 index 00000000000..344fdaad9ea --- /dev/null +++ b/board/ti/logic/prod-id/crc-15.c @@ -0,0 +1,31 @@ +#include "crc-15.h" + +/* + * Calculate a CRC-15 of a data buffer passed in + */ + +void crc_15_step(unsigned short *crc, unsigned char byte) +{ + int i; + unsigned short crcnext; + + for (i=0; i<7; ++i) { + crcnext = (byte & 1) ^ (*crc>>14); + *crc = (*crc << 1) & 0x7fff; + if (crcnext) + *crc ^= 0x4599; + byte >>= 1; + } +} + +unsigned short crc_15(void *buf, int len) +{ + unsigned char *p = buf; + unsigned short xsum = 0; + int i; + + for (i=0; i<len; ++i) { + crc_15_step(&xsum, p[i]); + } + return xsum; +} diff --git a/board/ti/logic/prod-id/crc-15.h b/board/ti/logic/prod-id/crc-15.h new file mode 100644 index 00000000000..15a891e3872 --- /dev/null +++ b/board/ti/logic/prod-id/crc-15.h @@ -0,0 +1,3 @@ +extern unsigned short crc_15(void *byte, int len); + +extern void crc_15_step(unsigned short *crc, unsigned char byte); diff --git a/board/ti/logic/prod-id/debug.h b/board/ti/logic/prod-id/debug.h new file mode 100644 index 00000000000..38dc9c3b96d --- /dev/null +++ b/board/ti/logic/prod-id/debug.h @@ -0,0 +1,12 @@ +#ifndef __DEBUG_H__ +#define __DEBUG_H__ + +#undef DEBUG + +#ifdef DEBUG +#define DPRINTF(fmt, args...) printf(fmt, ## args) +#else +#define DPRINTF(fmt, ...) +#endif + +#endif diff --git a/board/ti/logic/prod-id/dict.c b/board/ti/logic/prod-id/dict.c new file mode 100644 index 00000000000..dde08790d4b --- /dev/null +++ b/board/ti/logic/prod-id/dict.c @@ -0,0 +1,47 @@ +#include "interface.h" +#include "internals.h" +#include "id-errno.h" + +int id_dict_size(struct id_data *data, struct id_cookie *cookie) +{ + idenum_t type; + int err; + int count = 0; + unsigned int size, keyval; + struct id_cookie d_cookie; + + d_cookie = *cookie; + + /* It has to be a dictionary */ + err = id_whatis(&d_cookie, &type); + if (type != IDENUM_DICT) + return -ID_EINVAL; + + size = extract_unsigned_pnum(&d_cookie, 5, &err); + if (err != ID_EOK) + return err; + + d_cookie.size = size; + d_cookie.start_offset = d_cookie.offset; + while (d_cookie.offset < d_cookie.start_offset+d_cookie.size) { + /* It has to be a key */ + err = id_whatis(&d_cookie, &type); + if (type != IDENUM_KEY) + return -ID_EINVAL; + keyval = extract_unsigned_pnum(&d_cookie, 5, &err); + if (err != ID_EOK) + return err; + + /* Get the size of the object */ + size = id_extract_size(&d_cookie, &err); + if (err != ID_EOK) + return err; + + /* Move the offset forward by the object size */ + d_cookie.offset += size; + + /* Increment the count */ + count++; + } + return count; +} diff --git a/board/ti/logic/prod-id/extract.c b/board/ti/logic/prod-id/extract.c new file mode 100644 index 00000000000..09c7bedd7ff --- /dev/null +++ b/board/ti/logic/prod-id/extract.c @@ -0,0 +1,70 @@ +#include "interface.h" +#include "internals.h" +#include "id-errno.h" +#include "debug.h" + +unsigned int extract_unsigned_pnum(struct id_cookie *cookie, int start_bit, int *err) +{ + unsigned int value=0; + unsigned int bit_offset=0; + unsigned char bits; + unsigned char ch; + int oor; + + *err = ID_EOK; + for (;;) { + ch = id_fetch_byte(cookie->mem_ptr, cookie->offset++, &oor); + if (oor != ID_EOK) { + *err = oor; + id_error("extract runs oor"); + return 0; + } + if (ch & (1<<(start_bit-1))) { + /* more to go, accumulate bits */ + bits = ch & ((1<<(start_bit - 1)) - 1); + value |= (bits << bit_offset); + bit_offset += start_bit-1; + start_bit = 8; + } else { + /* last byte of number */ + bits = ch & ((1<<(start_bit - 1)) - 1); + value |= (bits << bit_offset); + break; + } + } + return value; +} + +int extract_signed_pnum(struct id_cookie *cookie, int start_bit, int *err) +{ + int value=0; + unsigned int bit_offset=0; + unsigned char bits; + unsigned char ch; + int oor; + + *err = ID_EOK; + for (;;) { + ch = id_fetch_byte(cookie->mem_ptr, cookie->offset++, &oor); + if (oor != ID_EOK) { + *err = oor; + id_error("extract runs oor"); + return 0; + } + if (ch & (1<<(start_bit-1))) { + /* more to go, accumulate bits */ + bits = ch & ((1<<(start_bit - 1)) - 1); + value |= (bits << bit_offset); + bit_offset += start_bit-1; + start_bit = 8; + } else { + /* last byte of number */ + bits = ch & ((1<<(start_bit - 2)) - 1); + value |= (bits << bit_offset); + if (ch & (1<<(start_bit - 2))) + value = -value; + break; + } + } + return value; +} diff --git a/board/ti/logic/prod-id/id-errno.h b/board/ti/logic/prod-id/id-errno.h new file mode 100644 index 00000000000..a9a85e98aa4 --- /dev/null +++ b/board/ti/logic/prod-id/id-errno.h @@ -0,0 +1,10 @@ +#define ID_EOK 0 /* Okay */ +#define ID_ENOENT 2 /* No such key */ +#define ID_ENOMEM 12 /* Out of memory */ +#define ID_EACCES 13 /* Permission denied */ +#define ID_ENODEV 19 /* No such device */ +#define ID_EINVAL 22 /* Invalid arcument */ +#define ID_EDOM 33 /* argument out of domain of func */ +#define ID_ERANGE 34 /* Out of range */ +#define ID_EL2NSYNC 45 /* Level 2 not synchronized */ +#define ID_ENOMEDIUM 123 /* No medium found */ diff --git a/board/ti/logic/prod-id/interface.h b/board/ti/logic/prod-id/interface.h new file mode 100644 index 00000000000..2646df24ed2 --- /dev/null +++ b/board/ti/logic/prod-id/interface.h @@ -0,0 +1,105 @@ +/* + * Header file that interfaces to environment to access data + */ + +/* Create the enum list of keys, not strings! */ +#undef ID_KEY_STRINGS +#define ID_KEY_ENUMS +#include "keys.h" + + +typedef enum { + /* Number */ + IDENUM_NEG_NUM = 0, + IDENUM_POS_NUM, + + /* String/Hex String */ + IDENUM_STR, + IDENUM_HEXSTR, + + /* Array */ + IDENUM_ARRAY, + + /* Dictionary */ + IDENUM_DICT, + + /* Key */ + IDENUM_KEY, + + /* Any string */ + IDENUM_ANY_STRING, + + /* Any number */ + IDENUM_ANY_NUMBER, + +} idenum_t; + +/* structure of builtin keys */ +struct id_key { + unsigned char *ptr; + unsigned int size; +}; + + +/* + * return a byte from the ID data at offset 'offset' and set *oor to zero + * if offset is in range of the device. If offset is out of range then + * set *oor to non-zero. If mem_ptr is non-NULL use it as a pointer to + * a cached copy of the ID data */ +extern unsigned char id_fetch_byte(unsigned char *mem_ptr, int offset, int *oor); + +struct id_data { + /* mem_ptr is a pointer to read the initial ID data into, then if not + * null used to read a cached copy of the ID data from */ + unsigned char *mem_ptr; + unsigned int root_size; + unsigned int root_offset; +}; + +/* Function to do the intial startup (i.e. figure out how much data, offset of + * key table, etc */ +extern int id_startup(struct id_data *data); +/* + * Functions provided back to callers for use in accessing data + */ + +/* ID data "cookie" used to access data; ultimately this will be opaque + * to the callers as they don't need to know whats in it, just pass it around + */ +struct id_cookie { + unsigned char *mem_ptr; /* cache pointer to ID data */ + unsigned int start_offset; /* start offset from beginning of data */ + unsigned int size; /* size of data in bytes */ + unsigned int offset; /* current read offset */ +}; + +/* Initialize the cookie to cover the whole root dictionary */ +extern int id_init_cookie(struct id_data *data, struct id_cookie *cookie); + +/* What is the read pointer cookie is pointing at */ +extern int id_whatis(struct id_cookie *cookie, idenum_t *type); + +/* Given a string, return the key code (or -1 if not found) */ +extern int id_data_get_key(char *key_name); + + +/* ID error routine to handle malformed data */ +extern void id_error(const char *fmt, ...); + +/* Ouptut routine */ +extern int id_printf(const char *format, ...); + + +/* User interface functions */ +extern int id_dict_size(struct id_data *data, struct id_cookie *cookie); +extern int id_array_size(struct id_data *data, struct id_cookie *cookie); + +extern int id_dict_find_key(struct id_cookie *cookie, id_keys_t key); +extern int id_find_dict(struct id_cookie *cookie, id_keys_t key, idenum_t type); +extern int id_find_string(struct id_cookie *cookie, id_keys_t key, unsigned char *str_ptr, unsigned int *str_size); +extern int id_find_number(struct id_cookie *cookie, id_keys_t key, int *num); +extern int id_find_numbers(struct id_cookie *cookie, id_keys_t *key, int key_size, int *nums); + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(var) sizeof(var)/sizeof((var)[0]) +#endif diff --git a/board/ti/logic/prod-id/internals.h b/board/ti/logic/prod-id/internals.h new file mode 100644 index 00000000000..95e9654b0eb --- /dev/null +++ b/board/ti/logic/prod-id/internals.h @@ -0,0 +1,19 @@ +/* + * Extract an unsigned packed number, first byte is in 'pack_bits' + * of first byte, starting at offset 'offset' */ +extern unsigned int extract_unsigned_pnum(struct id_cookie *cookie, int pack_bits, int *err); +extern int extract_signed_pnum(struct id_cookie *cookie, int pack_bits, int *err); + + + +// extern struct id_data id_data; + +extern int id_read_keys(struct id_data *data); +extern int id_verify_builtin_keys(struct id_data *data); + +#define ID_MAX_KEY_SIZE 32 + +extern int id_get_key(struct id_data *data, int keyval, struct id_key *key); +extern int id_iterate_dict(struct id_data *data, struct id_cookie *cookie); + +extern int id_extract_size(struct id_cookie *cookie, int *err); diff --git a/board/ti/logic/prod-id/keys.h b/board/ti/logic/prod-id/keys.h new file mode 100644 index 00000000000..fcd58817728 --- /dev/null +++ b/board/ti/logic/prod-id/keys.h @@ -0,0 +1,95 @@ + +#undef ID_KEY_START +#undef ID_KEY_ENTRY +#undef ID_KEY_END + +#if defined(ID_KEY_STRINGS) +/* This is the usage to build the keys for the compiler; we define + * an array of strings whose index is the value */ +#define ID_KEY_START static char *id_keys[] = { +#define ID_KEY_ENTRY(XX) #XX , +#define ID_KEY_END }; +#elif defined(ID_KEY_ENUMS) +/* This is the usage by people using the library to access the data */ +#define ID_KEY_START typedef enum { +#define ID_KEY_ENTRY(XX) ID_KEY_ ## XX, +#define ID_KEY_END } id_keys_t; +#else +#error "Need either ID_KEY_INTERFACE or ID_KEY_COMPILER defined!" +#endif + + +/* There are some implied conventions here: */ +/* - names of keys that contain other keys (dictionaries) end in "_group" */ +/* - names of keys that provide a register setting end in "_reg" */ +/* - any keys that specify a unit of measure, include units in the name (ie. _mhz, _degf, _bytes) */ + +ID_KEY_START + +/* Manufacturing unique data for each SOM */ +ID_KEY_ENTRY(serialization_group) +ID_KEY_ENTRY(serial_number) +ID_KEY_ENTRY(wifi_ethaddr1) +ID_KEY_ENTRY(wifi_ethaddr2) +ID_KEY_ENTRY(wifi_ethaddr3) +ID_KEY_ENTRY(wifi_ethaddr4) +ID_KEY_ENTRY(nvs) + +/* BOM Model number infromation */ +ID_KEY_ENTRY(model_group) +ID_KEY_ENTRY(model_name) +ID_KEY_ENTRY(part_number) +ID_KEY_ENTRY(version_code) +ID_KEY_ENTRY(hardware_platform) + +/* CPU specific information */ +ID_KEY_ENTRY(cpu0_group) +ID_KEY_ENTRY(type) +ID_KEY_ENTRY(number) +ID_KEY_ENTRY(speed_mhz) +ID_KEY_ENTRY(temp_class) + +/* CPU bus information */ +ID_KEY_ENTRY(cpu0_bus_group) + +/* DRAM bus information */ +ID_KEY_ENTRY(dram_bus_group) +ID_KEY_ENTRY(sysconfig_reg) +ID_KEY_ENTRY(sharing_reg) +ID_KEY_ENTRY(dlla_ctrl_reg) +ID_KEY_ENTRY(cs_cfg_reg) +// ID_KEY_ENTRY(cs0_group) Used in the dram_bus_group, but key defined below after local_bus_group +// ID_KEY_ENTRY(cs1_group) Used in the dram_bus_group, but key defined below after local_bus_group +ID_KEY_ENTRY(mcfg_reg) +ID_KEY_ENTRY(mr_reg) +ID_KEY_ENTRY(rfr_ctrl_reg) +ID_KEY_ENTRY(emr2_reg) +ID_KEY_ENTRY(actim_ctrla_reg) +ID_KEY_ENTRY(actim_ctrlb_reg) +ID_KEY_ENTRY(power_reg) + +/* GPMC keys */ +ID_KEY_ENTRY(local_bus_group) +ID_KEY_ENTRY(cs0_group) +ID_KEY_ENTRY(cs1_group) +ID_KEY_ENTRY(cs2_group) +ID_KEY_ENTRY(cs3_group) +ID_KEY_ENTRY(cs4_group) +ID_KEY_ENTRY(cs5_group) +ID_KEY_ENTRY(cs6_group) +ID_KEY_ENTRY(config1_reg) +ID_KEY_ENTRY(config2_reg) +ID_KEY_ENTRY(config3_reg) +ID_KEY_ENTRY(config4_reg) +ID_KEY_ENTRY(config5_reg) +ID_KEY_ENTRY(config6_reg) +ID_KEY_ENTRY(config7_reg) + +/* Manufacturing unique data for each SOM */ +ID_KEY_ENTRY(lan_ethaddr1) +ID_KEY_ENTRY(lan_ethaddr2) +ID_KEY_ENTRY(lan_ethaddr3) +ID_KEY_ENTRY(lan_ethaddr4) + +/* End of keys */ +ID_KEY_END diff --git a/board/ti/logic/prod-id/query.c b/board/ti/logic/prod-id/query.c new file mode 100644 index 00000000000..14290392206 --- /dev/null +++ b/board/ti/logic/prod-id/query.c @@ -0,0 +1,184 @@ +#include "interface.h" +#include "internals.h" +#include "id-errno.h" + +static int id_extract_key(struct id_cookie *cookie, id_keys_t *key) +{ + int err; + id_keys_t keyval; + + keyval = (id_keys_t)extract_unsigned_pnum(cookie, 5, &err); + if (err != ID_EOK) + return err; + *key = keyval; + return ID_EOK; +} + +/* in dictionary that cookie points to find key "key"; if found + * update cookie to associated "key" entry and return ID_EOK; + * else return -ID_ENOENT */ +int id_dict_find_key(struct id_cookie *cookie, id_keys_t key) +{ + int err; + unsigned int size; + id_keys_t d_key; + idenum_t type; + struct id_cookie d_cookie = *cookie; + struct id_cookie t_cookie; + + err = id_whatis(cookie, &type); + if (err != ID_EOK) + return err; + + /* Header has to be a dictionary */ + if (type != IDENUM_DICT) + return -ID_EINVAL; + + /* Extract size of dictionary */ + size = extract_unsigned_pnum(&d_cookie, 5, &err); + if (err != ID_EOK) + return err; + + d_cookie.size = size; + d_cookie.start_offset = d_cookie.offset; + + /* cookie->offset is now at first key */ + while (d_cookie.offset < d_cookie.start_offset + d_cookie.size) { + /* Extract the key and move the cookie over key */ + err = id_extract_key(&d_cookie, &d_key); + if (err != ID_EOK) + return err; + t_cookie = d_cookie; + /* move forward over the value */ + size = id_extract_size(&d_cookie, &err); + if (err != ID_EOK) + return err; + if (key == d_key) { + d_cookie.size = size; + d_cookie.start_offset = t_cookie.offset; + d_cookie.offset = t_cookie.offset; + *cookie = d_cookie; + return ID_EOK; + } + d_cookie.offset += size; + } + return -ID_ENOENT; +} + +/* Are these two types a match? */ +static int id_match_type(idenum_t type_a, idenum_t type_b) +{ + idenum_t tmp; + + if (type_a == type_b) + return 1; + + /* Oder the types (so the "*ANY*" types are in type_b) */ + if ((int)type_a > (int)type_b) { + tmp = type_a; + type_a = type_b; + type_b = tmp; + } + if (type_b == IDENUM_ANY_STRING && (type_a == IDENUM_STR || type_a == IDENUM_HEXSTR)) + return 1; + + if (type_b == IDENUM_ANY_NUMBER && (type_a == IDENUM_NEG_NUM || type_a == IDENUM_POS_NUM)) + return 1; + + return 0; +} + +/* Find in dictionary (that cookie points to) key "key" that is type "type" */ +int id_find_dict(struct id_cookie *cookie, id_keys_t key, idenum_t type) +{ + int err; + struct id_cookie d_cookie = *cookie; + idenum_t l_type; + + err = id_dict_find_key(&d_cookie, key); + if (err != ID_EOK) + return err; + err = id_whatis(&d_cookie, &l_type); + if (err != ID_EOK) + return err; + if (!id_match_type(l_type, type)) + return -ID_EINVAL; + *cookie = d_cookie; + return ID_EOK; +} + +/* in dictionary pointed at by cookie, find the key "key"; verify its a + * string and copy its value */ +int id_find_string(struct id_cookie *cookie, id_keys_t key, unsigned char *str_ptr, unsigned int *str_size) +{ + int err, i; + unsigned char byte; + unsigned int size; + struct id_cookie d_cookie = *cookie; + + err = id_find_dict(&d_cookie, key, IDENUM_ANY_STRING); + + if (err != ID_EOK) + return err; + /* Extract the string size */ + size = extract_unsigned_pnum(&d_cookie, 5, &err); + if (err != ID_EOK) + return err; + + if (size > *str_size) + return -ID_ERANGE; + + for(i=0; i<size; ++i) { + byte = id_fetch_byte(d_cookie.mem_ptr, d_cookie.offset++, &err); + if (err) + return err; + str_ptr[i] = byte; + } + *str_size = size; + + return ID_EOK; +} + +/* in dictionary pointed at by cookie, find the key "key"; verify its a + * number (either pos/neg) and return its value through *num */ +int id_find_number(struct id_cookie *cookie, id_keys_t key, int *num) +{ + int err; + int l_num; + idenum_t l_type; + struct id_cookie d_cookie = *cookie; + + err = id_find_dict(&d_cookie, key, IDENUM_ANY_NUMBER); + + if (err != ID_EOK) + return err; + err = id_whatis(&d_cookie, &l_type); + if (err != ID_EOK) + return err; + /* Extract the number size */ + l_num = extract_unsigned_pnum(&d_cookie, 5, &err); + if (err != ID_EOK) + return err; + + if (l_type == IDENUM_NEG_NUM) + l_num = -l_num; + + *num = l_num; + return ID_EOK; +} + +/* in dictionary pointed at by cookie, find the list of keys; verify they are + * numbers (either pos/neg) and return their value through *nums */ +int id_find_numbers(struct id_cookie *cookie, id_keys_t *keys, int key_size, int *nums) +{ + int i, err; + struct id_cookie d_cookie; + + for (i=0;i<key_size; ++i) { + d_cookie = *cookie; + err = id_find_number(&d_cookie, keys[i], &nums[i]); + if (err != ID_EOK) + return err; + } + return ID_EOK; +} diff --git a/board/ti/logic/prod-id/size.c b/board/ti/logic/prod-id/size.c new file mode 100644 index 00000000000..c4aec4c6fea --- /dev/null +++ b/board/ti/logic/prod-id/size.c @@ -0,0 +1,49 @@ +#include "interface.h" +#include "internals.h" +#include "id-errno.h" + +int id_extract_size(struct id_cookie *cookie, int *err) +{ + idenum_t type; + struct id_cookie s_cookie; + int size; + + s_cookie = *cookie; + + *err = id_whatis(&s_cookie, &type); + if (*err != ID_EOK) + return *err; + + switch(type) { + case IDENUM_DICT: + size = extract_unsigned_pnum(&s_cookie, 5, err); + size += (s_cookie.offset - cookie->offset); + break; + case IDENUM_ARRAY: + size = extract_unsigned_pnum(&s_cookie, 5, err); + size += (s_cookie.offset - cookie->offset); + break; + case IDENUM_STR: + case IDENUM_HEXSTR: + size = extract_unsigned_pnum(&s_cookie, 5, err); + size += (s_cookie.offset - cookie->offset); + break; + case IDENUM_POS_NUM: + case IDENUM_NEG_NUM: + extract_signed_pnum(&s_cookie, 5, err); + size = (s_cookie.offset - cookie->offset); + break; + case IDENUM_KEY: + extract_unsigned_pnum(&s_cookie, 5, err); + size = (s_cookie.offset - cookie->offset); + break; + default: + *err = -ID_EDOM; + size = 0; + break; + } + if (*err != ID_EOK) + return *err; + + return size; +} diff --git a/board/ti/logic/prod-id/startup.c b/board/ti/logic/prod-id/startup.c new file mode 100644 index 00000000000..73dd74069d8 --- /dev/null +++ b/board/ti/logic/prod-id/startup.c @@ -0,0 +1,185 @@ +#include <linux/stddef.h> +#include <linux/string.h> +#include "interface.h" +#include "internals.h" +#include "id-errno.h" +#include "crc-15.h" + +/* struct id_data id_data; */ + +struct __attribute__ ((packed)) id_header { + unsigned char signature[4]; + unsigned char id_fmt_ver; + unsigned char unused0; + unsigned short data_length; +} ; + +struct __attribute__ ((packed)) id_checksums { + unsigned short header; + unsigned short data; +} ; + +int id_startup(struct id_data *data) +{ + int i, err; + struct id_cookie cookie; + unsigned char byte, *p; + char *header_tag= "LpId"; + unsigned short xsum; + struct id_header hdr; + struct id_checksums xsums; + unsigned char *mem_ptr = data->mem_ptr; + + /* Clear out data->mem_ptr since we want all the fetches to come + * from the AT24 chip. Once we've validated the CRCs, restore + * data->mem_ptr to allow id_fetch_byte to read from data->mem_ptr + * instead of the AT24 chip. Should speed up accesses dramatically */ + data->mem_ptr = NULL; + + memset(&cookie, 0, sizeof(cookie)); + /* Data starts with the header, should be 'LpId' */ + for (i=0; i<4; ++i) { + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + hdr.signature[i] = byte; + cookie.offset++; + if (err != ID_EOK) { + id_printf("%s[%u]\n", __FILE__, __LINE__); + goto err_ret; + } + if (hdr.signature[i] != header_tag[i]) { + id_printf("%s[%u]\n", __FILE__, __LINE__); + err = ID_ENODEV; + goto err_ret; + } + } + + /* First LE 8-bit value is ID format version */ + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + hdr.id_fmt_ver = byte; + cookie.offset++; + + /* Second LE 8-bit value is currently not used */ + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + hdr.unused0 = byte; + cookie.offset++; + + /* Next LE 16-bit value is length of data */ + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + hdr.data_length = byte; + cookie.offset++; + + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + hdr.data_length |= byte << 8; + cookie.offset++; + + /* Next LE 16-bit value is xsum of header */ + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + xsums.header = byte; + cookie.offset++; + + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + xsums.header |= byte << 8; + cookie.offset++; + + /* Checksum the header */ + xsum = 0; + p = (unsigned char *)&hdr; + for (i = 0; i < sizeof(hdr); ++i) + crc_15_step(&xsum, p[i]); + + if (xsum != xsums.header) { + id_printf("%s[%u] xsum: 0x%04x, xsums.header: 0x%04x\n", + __FILE__, __LINE__, xsum, xsums.header); + err = -ID_EL2NSYNC; + goto err_ret; + } + + /* Next LE 16-bit value is xsum of data */ + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + xsums.data = byte; + cookie.offset++; + + byte = id_fetch_byte(NULL, cookie.offset, &err); + if (mem_ptr) + mem_ptr[cookie.offset] = byte; + xsums.data |= byte << 8; + cookie.offset++; + + /* Checksum the data (next id_len bytes), must match xsums.data */ + xsum = 0; + for (i = 0; i < hdr.data_length; ++i) { + byte = id_fetch_byte(NULL, cookie.offset + i, &err); + if (mem_ptr) + mem_ptr[cookie.offset + i] = byte; + if (err != ID_EOK) { + id_printf("%s[%u]\n", __FILE__, __LINE__); + goto err_ret; + } + crc_15_step(&xsum, byte); + } + if (xsum != xsums.data) { + id_printf("%s[%u] xsum: 0x%04x, xsums.data: 0x%04x\n", + __FILE__, __LINE__, xsum, xsums.data); + err = -ID_EL2NSYNC; + goto err_ret; + } + + /* offset is now at the first byte of the root dictionary which + contains its span */ + data->root_offset = cookie.offset; + data->root_size = extract_unsigned_pnum(&cookie, 5, &err); + if (err != ID_EOK) { + id_printf("%s[%u]\n", __FILE__, __LINE__); + goto err_ret; + } + + data->root_size += cookie.offset - data->root_offset; + +#if 0 + id_printf("Data format version: %u\n", hdr.id_fmt_ver); +#endif + + /* Restore data->mem_ptr to allow id_fetch_byte to read + * from the cached data instead of the AT24 chip */ + data->mem_ptr = mem_ptr; + + return ID_EOK; + +err_ret: + + /* Error return - make sure signature in SRAM is invalid */ + if (mem_ptr) + mem_ptr[0] = 0; + + return err; +} + +/* + * Reset the cookie to cover the whole root dictionary + */ +int id_init_cookie(struct id_data *data, struct id_cookie *cookie) +{ + if (!cookie) + return -ID_EINVAL; + cookie->mem_ptr = data->mem_ptr; + cookie->start_offset = data->root_offset; + cookie->size = data->root_size; + cookie->offset = cookie->start_offset; + return ID_EOK; +} diff --git a/board/ti/logic/prod-id/type.c b/board/ti/logic/prod-id/type.c new file mode 100644 index 00000000000..57eda7f7343 --- /dev/null +++ b/board/ti/logic/prod-id/type.c @@ -0,0 +1,20 @@ +#include "interface.h" +#include "internals.h" +#include "id-errno.h" + +int id_whatis(struct id_cookie *cookie, idenum_t *type) +{ + unsigned char byte; + int oor; + if (!cookie) + return -ID_EINVAL; + + byte = id_fetch_byte(cookie->mem_ptr, cookie->offset, &oor); + if (oor != ID_EOK) + return -ID_ERANGE; + + byte >>= 5; + *type = (idenum_t)byte; + + return ID_EOK; +} diff --git a/board/ti/logic/product_id.h b/board/ti/logic/product_id.h new file mode 100644 index 00000000000..b8a1600656e --- /dev/null +++ b/board/ti/logic/product_id.h @@ -0,0 +1,160 @@ +/* + * (C) Copyright 2008, 2009, 2010 + * Logic Product Development, <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __PRODUCTID_H__ +#define __PRODUCTID_H__ + +#define LOGIC_HEADER_VERSION_0 0 +#define LOGIC_HEADER_VERSION_1 1 +#define LOGIC_HEADER_VERSION_2 2 +#define LOGIC_HEADER_VERSION_3 3 + +struct product_zone_0_rev_0 { + unsigned char header_version; // offset 0 + char part_number[11]; // offset 1 + char revision; // offset 12 + char sn_week; // offset 13 + char sn_year; // offset 14 + char sn_site; // offset 15 + int sn_cnt; // offset 16 + char maturity; // offset 20 +}; + +struct product_zone_0_rev_1 { + unsigned char header_version; // offset 0 + char part_number[11]; // offset 1 + char reserved; // revision removed after version 0 + char sn_week; // offset 13 + char sn_year; // offset 14 + char sn_site; // offset 15 + int sn_cnt; // offset 16 + char maturity; // offset 20 + char wifi_trim; // offset 21 +}; + + +struct product_zone_0_rev_2 { + unsigned char header_version; // offset 0 + char part_number[11]; // offset 1 + char revision; // offset 12 + char sn_week; // offset 13 + char sn_year; // offset 14 + char sn_site; // offset 15 + int sn_cnt; // offset 16 + char maturity; // offset 20 + char wifi_trim; // offset 21 + unsigned char full_mac[6]; // offset 22 +}; + +struct product_zone_2_rev_0 { + unsigned char mac0[3]; // offset 0 + unsigned char mac1[3]; // offset 3 + unsigned char mac2[3]; // offset 6 + unsigned char mac3[3]; // offset 9 + unsigned char nor0_size; // offset 12 + unsigned char nor1_size; // offset 13 + unsigned char nand0_size; // offset 14 + unsigned char nand1_size; // offset 15 + unsigned char sdram0_size; // offset 16 + unsigned char sdram1_size; // offset 17 + short processor_type; // offset 18 + int feature_bits; // offset 20 + int platform_bits; // offset 24 +}; + +struct product_zone_2_rev_2 { + unsigned char mac0[3]; // offset 0 + unsigned char mac1[3]; // offset 3 + unsigned char mac2[3]; // offset 6 + unsigned char mac3[3]; // offset 9 + unsigned char nor0_size; // offset 12 + unsigned char nor1_size; // offset 13 + unsigned char nand0_size; // offset 14 + unsigned char nand1_size; // offset 15 + unsigned char sdram0_size; // offset 16 + unsigned char sdram1_size; // offset 17 + short processor_type; // offset 18 + char reserved[4]; // offset 20 + int platform_bits; // offset 24 +}; + +struct product_zone_2_rev_3 { + unsigned char mac0[3]; // offset 0 + unsigned char mac1[3]; // offset 3 + unsigned char mac2[3]; // offset 6 + unsigned char mac3[3]; // offset 9 + unsigned char nor0_size; // offset 12 + unsigned char nor1_size; // offset 13 + unsigned char nand0_size; // offset 14 + unsigned char nand1_size; // offset 15 + unsigned char sdram0_size; // offset 16 + unsigned char sdram1_size; // offset 17 + short processor_type; // offset 18 + char reserved[4]; // offset 20 + int platform_bits; // offset 24 + int hardware_revision; // offset 28 +}; + + +struct product_id_data { + struct { + union { + struct product_zone_0_rev_0 pz_0r0; + struct product_zone_0_rev_1 pz_0r1; + struct product_zone_0_rev_2 pz_0r2; + } u_zone0; + + struct { + char model_revision; + char model_number[31]; + } zone1; + union { + struct product_zone_2_rev_0 pz_2r0; + struct product_zone_2_rev_2 pz_2r2; + struct product_zone_2_rev_3 pz_2r3; + } zone2; + struct { + unsigned char data[468]; + unsigned int valid; + } wifi_config_data; + } d; + unsigned int checksum; +}; + +// Only calculate across the data to checksum, compare to stored +// value(outside of checksummed range) +static inline int calculate_checksum(void *p, int len) +{ + unsigned char *buf = p; + unsigned int xsum = 0; + int i; + + for (i=0; i<len; ++i) + xsum = ((xsum << 3) || (xsum >> 29)) ^ buf[i]; + + return xsum; +} + +extern int fetch_production_data(void); +extern void dump_production_data(void); +extern void board_get_nth_enetaddr (unsigned char *enetaddr, int which, int position); + +#endif diff --git a/board/ti/logic/splash-332x57.h b/board/ti/logic/splash-332x57.h new file mode 100644 index 00000000000..d5b2e63d617 --- /dev/null +++ b/board/ti/logic/splash-332x57.h @@ -0,0 +1,367 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Splash Screen Image + * + * To update this image, perform the following steps to convert your + * image to RGB565, compress with gzip, and format as C code. + * 1) Open your image in GIMP + * 2) Select File -> Save as... + * 3) Enter splash.bmp and select Save + * 4) On the "Save as BMP" dialog, open the "Advanced Options" section + * 5) Select "R5 G6 B5" under the "16 bits" section and select Save + * 6) At a prompt, run the following commands: + * gzip splash.bmp + * xxd -i splash.bmp.gz > splash.h + * 7) Replace the code below with the contents of splash.h + * + * Note that this image originally came from a 800x600 logo image, cropped + * in gimp using a selection box originating at [234,212], and 332x57 large. + */ +unsigned char splash_bmp_gz[] = { + 0x1f, 0x8b, 0x08, 0x08, 0x95, 0xeb, 0x22, 0x4f, 0x00, 0x03, 0x73, 0x70, + 0x6c, 0x61, 0x73, 0x68, 0x32, 0x2e, 0x62, 0x6d, 0x70, 0x00, 0xed, 0x5d, + 0x4f, 0x48, 0xe3, 0x5e, 0x1e, 0xef, 0x8f, 0x2d, 0x6c, 0x60, 0x3d, 0x84, + 0x1d, 0x61, 0x02, 0xca, 0x6e, 0x02, 0x0a, 0x06, 0x1c, 0x68, 0x61, 0x0e, + 0x16, 0xbc, 0xb4, 0xd0, 0x05, 0xcb, 0x7a, 0xb0, 0xfc, 0x84, 0x51, 0xc6, + 0x83, 0x53, 0x1c, 0x90, 0xe2, 0x41, 0x8a, 0x07, 0x29, 0x5e, 0x4a, 0xf1, + 0x20, 0x65, 0x0e, 0x6e, 0x11, 0x46, 0xda, 0x39, 0x38, 0xe8, 0x80, 0x4b, + 0x3d, 0x08, 0xf5, 0x20, 0xd8, 0x8b, 0xd0, 0x1e, 0x84, 0x0a, 0x23, 0x74, + 0x96, 0x11, 0xda, 0x05, 0x85, 0x08, 0x2e, 0xe4, 0xe0, 0x21, 0x0b, 0x1e, + 0xdc, 0x3e, 0xf3, 0x8b, 0x7d, 0x2f, 0x7f, 0x5e, 0xde, 0x4b, 0xaa, 0xee, + 0xfc, 0x26, 0x9f, 0x87, 0xce, 0x80, 0x4d, 0xf2, 0x5e, 0xf2, 0xc9, 0xf7, + 0x7d, 0xff, 0x37, 0x32, 0xfe, 0x97, 0xbc, 0xef, 0x1e, 0x7f, 0x6b, 0xff, + 0x8c, 0xb4, 0x7f, 0xfe, 0xfe, 0x8b, 0xcf, 0x17, 0x6a, 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0xf0, 0x60, 0x06, + 0xf0, 0xed, 0x90, 0x4e, 0xe2, 0x6e, 0x33, 0xb2, 0x9c, 0xf6, 0x24, 0xa5, + 0x87, 0xc7, 0x41, 0x98, 0xa1, 0xf7, 0x07, 0x01, 0x4e, 0xee, 0xe7, 0xbd, + 0x6f, 0x7a, 0xf6, 0xf0, 0x78, 0xe0, 0x7d, 0x43, 0x11, 0x3a, 0x5b, 0x67, + 0x54, 0x5a, 0xcc, 0x75, 0xb3, 0xf7, 0x98, 0x07, 0x0f, 0xe6, 0x08, 0x13, + 0xee, 0xe4, 0x20, 0xc2, 0xf4, 0x21, 0xe5, 0xac, 0xea, 0xc2, 0x83, 0x07, + 0x27, 0x38, 0xe6, 0x40, 0x1f, 0x06, 0xf3, 0x7a, 0x9d, 0xd6, 0xdd, 0x5b, + 0x09, 0xc4, 0x45, 0xaf, 0xc2, 0xcf, 0xf5, 0x6d, 0xaa, 0x1e, 0x7e, 0x6e, + 0x5c, 0xf2, 0x63, 0xb1, 0xd3, 0xf4, 0x8b, 0xe2, 0x41, 0x59, 0x1d, 0xe0, + 0x7b, 0x02, 0x17, 0x92, 0x4c, 0xc4, 0x2f, 0xf0, 0xcf, 0x3d, 0x35, 0x0f, + 0x3f, 0x35, 0x78, 0xdf, 0x67, 0x2e, 0x2a, 0xae, 0x06, 0x77, 0xee, 0x87, + 0xda, 0x31, 0xf1, 0xb9, 0xe7, 0xe4, 0xe1, 0xc7, 0xc6, 0xff, 0x00, 0x2f, + 0x51, 0xc1, 0x57, 0x1e, 0x94, 0x00, 0x00 +}; +unsigned int splash_bmp_gz_len = 3859; diff --git a/board/ti/logic/splash-480x272.h b/board/ti/logic/splash-480x272.h new file mode 100644 index 00000000000..0d249e7936e --- /dev/null +++ b/board/ti/logic/splash-480x272.h @@ -0,0 +1,408 @@ +/* + * (C) Copyright 2011 + * Logic Product Development <www.logicpd.com> + * Peter Barada <peter.barada@logicpd.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Splash Screen Image + * + * To update this image, perform the following steps to convert your + * image to RGB565, compress with gzip, and format as C code. + * 1) Open your image in GIMP + * 2) Select File -> Save as... + * 3) Enter splash.bmp and select Save + * 4) On the "Save as BMP" dialog, open the "Advanced Options" section + * 5) Select "R5 G6 B5" under the "16 bits" section and select Save + * 6) At a prompt, run the following commands: + * gzip splash.bmp + * xxd -i splash.bmp.gz > splash.h + * 7) Replace the code below with the contents of splash.h + */ +unsigned char splash_bmp_gz[] = { + 0x1f, 0x8b, 0x08, 0x08, 0xbe, 0x32, 0x9b, 0x4e, 0x00, 0x03, 0x73, 0x70, + 0x6c, 0x61, 0x73, 0x68, 0x2e, 0x62, 0x6d, 0x70, 0x00, 0xed, 0xdd, 0x4f, + 0x48, 0x1b, 0x6b, 0xbf, 0xc0, 0xf1, 0xbc, 0x5c, 0xe1, 0x0e, 0xdc, 0x2e, + 0xc2, 0x6d, 0xa1, 0x81, 0x16, 0xde, 0x04, 0x2c, 0x18, 0xb0, 0x60, 0xa0, + 0x0b, 0x03, 0x6e, 0x12, 0xc8, 0x0b, 0x06, 0x5c, 0x34, 0x1c, 0xe1, 0x28, + 0xed, 0xc2, 0x23, 0x2d, 0x14, 0xe9, 0x42, 0xc4, 0x85, 0x04, 0x37, 0x41, + 0x5c, 0x88, 0x74, 0x21, 0x41, 0xa8, 0xc4, 0xb3, 0x68, 0xd1, 0x82, 0x97, + 0xb8, 0x28, 0xc4, 0x85, 0x60, 0x36, 0x42, 0x5c, 0x14, 0x22, 0x1c, 0x21, + 0x07, 0x5a, 0x48, 0x2e, 0xb4, 0x90, 0x42, 0x2f, 0x64, 0xe1, 0x22, 0x17, + 0xbc, 0xd0, 0x9b, 0x31, 0x67, 0x9a, 0x99, 0xc9, 0xfc, 0x79, 0x9e, 0x49, + 0xd4, 0xbe, 0x2f, 0xdf, 0xcf, 0xe0, 0xe1, 0x80, 0xf9, 0xf3, 0x8c, 0x9d, + 0xdf, 0x3c, 0xff, 0x7e, 0xcf, 0x33, 0xf1, 0x89, 0x7f, 0xfc, 0xdf, 0xbf, + 0xf9, 0x54, 0xff, 0x68, 0xfd, 0x8c, 0xb6, 0x7e, 0xfe, 0xfb, 0x6f, 0x3e, + 0x9f, 0xbf, 0xf5, 0xf3, 0x37, 0x9f, 0xdf, 0x77, 0xf9, 0x9b, 0xd6, 0xef, + 0xff, 0xf3, 0x3f, 0x7c, 0x97, 0x3f, 0x3f, 0xfc, 0x6f, 0xeb, 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