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-rw-r--r--board/korat/Kconfig9
-rw-r--r--board/korat/MAINTAINERS7
-rw-r--r--board/korat/Makefile9
-rw-r--r--board/korat/README64
-rw-r--r--board/korat/config.mk27
-rw-r--r--board/korat/init.S80
-rw-r--r--board/korat/korat.c633
-rw-r--r--board/korat/u-boot-F7FC.lds124
8 files changed, 0 insertions, 953 deletions
diff --git a/board/korat/Kconfig b/board/korat/Kconfig
deleted file mode 100644
index f434dea7f3b..00000000000
--- a/board/korat/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_KORAT
-
-config SYS_BOARD
- default "korat"
-
-config SYS_CONFIG_NAME
- default "korat"
-
-endif
diff --git a/board/korat/MAINTAINERS b/board/korat/MAINTAINERS
deleted file mode 100644
index 8b968461f25..00000000000
--- a/board/korat/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-KORAT BOARD
-M: Larry Johnson <lrj@acm.org>
-S: Maintained
-F: board/korat/
-F: include/configs/korat.h
-F: configs/korat_defconfig
-F: configs/korat_perm_defconfig
diff --git a/board/korat/Makefile b/board/korat/Makefile
deleted file mode 100644
index 63914bc13b8..00000000000
--- a/board/korat/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2002-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = korat.o
-extra-y += init.o
diff --git a/board/korat/README b/board/korat/README
deleted file mode 100644
index e059f788c46..00000000000
--- a/board/korat/README
+++ /dev/null
@@ -1,64 +0,0 @@
-The Korat board has two NOR flashes, FLASH0 and FLASH1, which are connected to
-chip select 0 and 1, respectively. FLASH0 contains 16 MiB, and is mapped to
-addresses 0xFF000000 - 0xFFFFFFFF as U-Boot Flash Bank #2. FLASH1 contains
-from 16 to 128 MiB, and is mapped to 0xF?000000 - 0xF7FFFFFF as U-Boot Flash
-Bank #1 (with the starting address depending on the flash size detected at
-runtime). The write-enable pin on FLASH0 is disabled, so the contents of FLASH0
-cannot be modified in the field. This also prevents FLASH0 from executing
-commands to return chip information, so its configuration is hard-coded in
-U-Boot.
-
-There are two versions of U-Boot for Korat: "permanent" and "upgradable". The
-permanent U-Boot is pre-programmed at the top of FLASH0, e.g., at addresses
-0xFFFA0000 - 0xFFFFFFFF for the current 384 KiB size. The upgradable U-Boot is
-located 256 KiB from the top of FLASH1, e.g. at addresses 0xF7F6000 - 0xF7FC0000
-for the current 384 KiB size. FLASH1 addresses 0xF7FE0000 - 0xF7FF0000 are
-used for the U-Boot environmental parameters, and addresses 0xF7FC0000 -
-0xF7FDFFFF are used for the redundant copy of the parameters. These locations
-are used by both versions of U-Boot.
-
-On booting, the permanent U-Boot in FLASH0 begins executing. After performing
-minimal setup, it monitors the state of the board's Reset switch (GPIO47). If
-the switch is sensed as open before a timeout period, then U-Boot branches to
-address 0xF7FBFFFC. This causes the upgradable U-Boot to execute from the
-beginning. If the switch remains closed thoughout the timeout period, the
-permanent U-Boot activates the on-board buzzer until the switch is sensed as
-opened. It then continues to execute without branching to FLASH1. The effect
-of this is that normally the Korat board boots its upgradable U-Boot, but, if
-this has been corrupted, the user can boot the permanent U-Boot, which can then
-be used to erase and reload FLASH1 as needed.
-
-Note that it is not necessary for the permanent U-Boot to have all the latest
-features, but only that it have sufficient functionality (working "tftp",
-"erase", "cp.b", etc.) to repair FLASH1. Also, the permanent U-Boot makes no
-assumptions about the size of FLASH1 or the size of the upgradable U-Boot: it is
-sufficient that the upgradable U-Boot can be started by a branch to 0xF7FBFFFC.
-
-The build sequence:
-
- make korat_perm_config
- make all
-
-builds the permanent U-Boot by selecting loader file "u-boot.lds" and defining
-preprocessor symbol "CONFIG_KORAT_PERMANENT". The default build:
-
- make korat_config
- make all
-
-creates the upgradable U-Boot by selecting loader file "u-boot-F7FC.lds" and
-leaving preprocessor symbol "CONFIG_KORAT_PERMANENT" undefined.
-
-2008-02-22, Larry Johnson <lrj@acm.org>
-
-
-The CompactFlash(R) controller on the Korat board provides a hi-speed USB
-interface. This may be connected to either a dedicated port on the on-board
-USB controller, or to a USB port on the PowerPC 440EPx processor. The U-Boot
-environment variable "korat_usbcf" can be used to specify which of these two
-USB host ports is used for CompactFlash. The valid setting for the variable are
-the strings "pci" and "ppc". If the variable defined and set to "ppc", then the
-PowerPC USB port is used. In all other cases the on-board USB controller is
-used, but if "korat_usbcf" is defined but is set to a string other than the two
-valid options, a warning is also issued.
-
-2009-01-28, Larry Johnson <lrj@acm.org>
diff --git a/board/korat/config.mk b/board/korat/config.mk
deleted file mode 100644
index 42e0060094d..00000000000
--- a/board/korat/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-#
-# Korat (PPC440EPx) board
-#
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(emul),1)
-PLATFORM_CPPFLAGS += -fno-schedule-insns -fno-schedule-insns2
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8CFF0000
-endif
-
-ifndef CONFIG_KORAT_PERMANENT
-LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot-F7FC.lds
-endif
diff --git a/board/korat/init.S b/board/korat/init.S
deleted file mode 100644
index 20c5bddf6be..00000000000
--- a/board/korat/init.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm-offsets.h>
-#include <ppc_asm.tmpl>
-#include <asm/mmu.h>
-#include <config.h>
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
-
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_RWX | SA_G )
-
- /*
- * TLB entries for SDRAM are not needed on this platform. They are
- * generated dynamically in the SPD DDR2 detection routine.
- */
-
-#ifdef CONFIG_SYS_INIT_RAM_DCACHE
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0,
- AC_RWX | SA_G )
-#endif
-
- /* TLB-entry for PCI Memory */
- tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x00000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_RW | SA_IG )
-
- tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x10000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_RW | SA_IG )
-
- tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x20000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_RW | SA_IG )
-
- tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x30000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_RW | SA_IG )
-
- /* TLB-entry for EBC */
- tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RW | SA_IG )
-
- /* TLB-entry for Internal Registers & OCM */
- /* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */
- tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_RWX | SA_I )
-
- /*TLB-entry PCI registers*/
- tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RW | SA_IG )
-
- /* TLB-entry for peripherals */
- tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RW | SA_IG)
-
- /* TLB-entry PCI IO Space - from sr@denx.de */
- tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RW | SA_IG)
-
- tlbtab_end
-
-#if defined(CONFIG_KORAT_PERMANENT)
- .globl korat_branch_absolute
-korat_branch_absolute:
- mtlr r3
- blr
-#endif
diff --git a/board/korat/korat.c b/board/korat/korat.c
deleted file mode 100644
index d9ab2fd4216..00000000000
--- a/board/korat/korat.c
+++ /dev/null
@@ -1,633 +0,0 @@
-/*
- * (C) Copyright 2007-2010
- * Larry Johnson, lrj@acm.org
- *
- * (C) Copyright 2006-2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2006
- * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
- * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <fdt_support.h>
-#include <i2c.h>
-#include <libfdt.h>
-#include <asm/ppc440.h>
-#include <asm/bitops.h>
-#include <asm/ppc4xx-gpio.h>
-#include <asm/io.h>
-#include <asm/ppc4xx-uic.h>
-#include <asm/processor.h>
-#include <asm/4xx_pci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-ulong flash_get_size(ulong base, int banknum);
-
-#if defined(CONFIG_KORAT_PERMANENT)
-void korat_buzzer(int const on)
-{
- if (on) {
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05,
- in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05) | 0x80);
- } else {
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05,
- in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05) & ~0x80);
- }
-}
-#endif
-
-int board_early_init_f(void)
-{
- uint32_t sdr0_pfc1, sdr0_pfc2;
- uint32_t reg;
- int eth;
-
-#if defined(CONFIG_KORAT_PERMANENT)
- unsigned mscount;
-
- extern void korat_branch_absolute(uint32_t addr);
-
- for (mscount = 0; mscount < CONFIG_SYS_KORAT_MAN_RESET_MS; ++mscount) {
- udelay(1000);
- if (gpio_read_in_bit(CONFIG_SYS_GPIO_RESET_PRESSED_)) {
- /* This call does not return. */
- korat_branch_absolute(
- CONFIG_SYS_FLASH1_TOP - 2 * CONFIG_ENV_SECT_SIZE - 4);
- }
- }
- korat_buzzer(1);
- while (!gpio_read_in_bit(CONFIG_SYS_GPIO_RESET_PRESSED_))
- udelay(1000);
-
- korat_buzzer(0);
-#endif
-
- mtdcr(EBC0_CFGADDR, EBC0_CFG);
- mtdcr(EBC0_CFGDATA, 0xb8400000);
-
- /*
- * Setup the interrupt controller polarities, triggers, etc.
- */
- mtdcr(UIC0SR, 0xffffffff); /* clear all */
- mtdcr(UIC0ER, 0x00000000); /* disable all */
- mtdcr(UIC0CR, 0x00000005); /* ATI & UIC1 crit are critical */
- mtdcr(UIC0PR, 0xfffff7ff); /* per ref-board manual */
- mtdcr(UIC0TR, 0x00000000); /* per ref-board manual */
- mtdcr(UIC0VR, 0x00000000); /* int31 highest, base=0x000 */
- mtdcr(UIC0SR, 0xffffffff); /* clear all */
-
- mtdcr(UIC1SR, 0xffffffff); /* clear all */
- mtdcr(UIC1ER, 0x00000000); /* disable all */
- mtdcr(UIC1CR, 0x00000000); /* all non-critical */
- mtdcr(UIC1PR, 0xffffffff); /* per ref-board manual */
- mtdcr(UIC1TR, 0x00000000); /* per ref-board manual */
- mtdcr(UIC1VR, 0x00000000); /* int31 highest, base=0x000 */
- mtdcr(UIC1SR, 0xffffffff); /* clear all */
-
- mtdcr(UIC2SR, 0xffffffff); /* clear all */
- mtdcr(UIC2ER, 0x00000000); /* disable all */
- mtdcr(UIC2CR, 0x00000000); /* all non-critical */
- mtdcr(UIC2PR, 0xffffffff); /* per ref-board manual */
- mtdcr(UIC2TR, 0x00000000); /* per ref-board manual */
- mtdcr(UIC2VR, 0x00000000); /* int31 highest, base=0x000 */
- mtdcr(UIC2SR, 0xffffffff); /* clear all */
-
- /*
- * Take sim card reader and CF controller out of reset. Also enable PHY
- * auto-detect until board-specific PHY resets are available.
- */
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02, 0xC0);
-
- /* Configure the two Ethernet PHYs. For each PHY, configure for fiber
- * if the SFP module is present, and for copper if it is not present.
- */
- for (eth = 0; eth < 2; ++eth) {
- if (gpio_read_in_bit(CONFIG_SYS_GPIO_SFP0_PRESENT_ + eth)) {
- /* SFP module not present: configure PHY for copper. */
- /* Set PHY to autonegotate 10 MB, 100MB, or 1 GB */
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03,
- in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03) |
- 0x06 << (4 * eth));
- } else {
- /* SFP module present: configure PHY for fiber and
- enable output */
- gpio_write_bit(CONFIG_SYS_GPIO_PHY0_FIBER_SEL + eth, 1);
- gpio_write_bit(CONFIG_SYS_GPIO_SFP0_TX_EN_ + eth, 0);
- }
- }
- /* enable Ethernet: set GPIO45 and GPIO46 to 1 */
- gpio_write_bit(CONFIG_SYS_GPIO_PHY0_EN, 1);
- gpio_write_bit(CONFIG_SYS_GPIO_PHY1_EN, 1);
-
- /* Wait 1 ms, then enable Fiber signal detect to PHYs. */
- udelay(1000);
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03,
- in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03) | 0x88);
-
- /* select Ethernet (and optionally IIC1) pins */
- mfsdr(SDR0_PFC1, sdr0_pfc1);
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SELECT_MASK) |
- SDR0_PFC1_SELECT_CONFIG_4;
-#ifdef CONFIG_I2C_MULTI_BUS
- sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL);
-#endif
- mfsdr(SDR0_PFC2, sdr0_pfc2);
- sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
- SDR0_PFC2_SELECT_CONFIG_4;
- mtsdr(SDR0_PFC2, sdr0_pfc2);
- mtsdr(SDR0_PFC1, sdr0_pfc1);
-
- /* PCI arbiter enabled */
- mfsdr(SDR0_PCI0, reg);
- mtsdr(SDR0_PCI0, 0x80000000 | reg);
-
- return 0;
-}
-
-/*
- * The boot flash on CS0 normally has its write-enable pin disabled, and so will
- * not respond to CFI commands. This routine therefore fills in the flash
- * information for the boot flash. (The flash at CS1 operates normally.)
- */
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
-{
- uint32_t addr;
- int i;
-
- if (1 != banknum)
- return 0;
-
- info->size = CONFIG_SYS_FLASH0_SIZE;
- info->sector_count = CONFIG_SYS_FLASH0_SIZE / 0x20000;
- info->flash_id = 0x01000000;
- info->portwidth = 2;
- info->chipwidth = 2;
- info->buffer_size = 32;
- info->erase_blk_tout = 16384;
- info->write_tout = 2;
- info->buffer_write_tout = 5;
- info->vendor = 2;
- info->cmd_reset = 0x00F0;
- info->interface = 2;
- info->legacy_unlock = 0;
- info->manufacturer_id = 1;
- info->device_id = 0x007E;
-
-#if CONFIG_SYS_FLASH0_SIZE == 0x01000000
- info->device_id2 = 0x2101;
-#elif CONFIG_SYS_FLASH0_SIZE == 0x04000000
- info->device_id2 = 0x2301;
-#else
-#error Unable to set device_id2 for current CONFIG_SYS_FLASH0_SIZE
-#endif
-
- info->ext_addr = 0x0040;
- info->cfi_version = 0x3133;
- info->cfi_offset = 0x0055;
- info->addr_unlock1 = 0x00000555;
- info->addr_unlock2 = 0x000002AA;
- info->name = "CFI conformant";
- for (i = 0, addr = -info->size;
- i < info->sector_count;
- ++i, addr += 0x20000) {
- info->start[i] = addr;
- info->protect[i] = 0x00;
- }
- return 1;
-}
-
-static int man_data_read(unsigned int addr)
-{
- /*
- * Read an octet of data from address "addr" in the manufacturer's
- * information serial EEPROM, or -1 on error.
- */
- u8 data[2];
-
- if (0 != i2c_probe(MAN_DATA_EEPROM_ADDR) ||
- 0 != i2c_read(MAN_DATA_EEPROM_ADDR, addr, 1, data, 1)) {
- debug("man_data_read(0x%02X) failed\n", addr);
- return -1;
- }
- debug("man_info_read(0x%02X) returned 0x%02X\n", addr, data[0]);
- return data[0];
-}
-
-static unsigned int man_data_field_addr(unsigned int const field)
-{
- /*
- * The manufacturer's information serial EEPROM contains a sequence of
- * zero-delimited fields. Return the starting address of field "field",
- * or 0 on error.
- */
- unsigned addr, i;
-
- if (0 == field || 'A' != man_data_read(0) || '\0' != man_data_read(1))
- /* Only format "A" is currently supported */
- return 0;
-
- for (addr = 2, i = 1; i < field && addr < 256; ++addr) {
- if ('\0' == man_data_read(addr))
- ++i;
- }
- return (addr < 256) ? addr : 0;
-}
-
-static char *man_data_read_field(char s[], unsigned const field,
- unsigned const length)
-{
- /*
- * Place the null-terminated contents of field "field" of length
- * "length" from the manufacturer's information serial EEPROM into
- * string "s[length + 1]" and return a pointer to s, or return 0 on
- * error. In either case the original contents of s[] is not preserved.
- */
- unsigned addr, i;
-
- addr = man_data_field_addr(field);
- if (0 == addr || addr + length >= 255)
- return 0;
-
- for (i = 0; i < length; ++i) {
- int const c = man_data_read(addr++);
-
- if (c <= 0)
- return 0;
-
- s[i] = (char)c;
- }
- if (0 != man_data_read(addr))
- return 0;
-
- s[i] = '\0';
- return s;
-}
-
-static void set_serial_number(void)
-{
- /*
- * If the environmental variable "serial#" is not set, try to set it
- * from the manufacturer's information serial EEPROM.
- */
- char s[MAN_INFO_LENGTH + MAN_MAC_ADDR_LENGTH + 2];
-
- if (getenv("serial#"))
- return;
-
- if (!man_data_read_field(s, MAN_INFO_FIELD, MAN_INFO_LENGTH))
- return;
-
- s[MAN_INFO_LENGTH] = '-';
- if (!man_data_read_field(s + MAN_INFO_LENGTH + 1, MAN_MAC_ADDR_FIELD,
- MAN_MAC_ADDR_LENGTH))
- return;
-
- setenv("serial#", s);
-}
-
-static void set_mac_addresses(void)
-{
- /*
- * If the environmental variables "ethaddr" and/or "eth1addr" are not
- * set, try to set them from the manufacturer's information serial
- * EEPROM.
- */
-
-#if MAN_MAC_ADDR_LENGTH % 2 != 0
-#error MAN_MAC_ADDR_LENGTH must be an even number
-#endif
-
- char s[(3 * MAN_MAC_ADDR_LENGTH) / 2];
- char *src;
- char *dst;
-
- if (0 != getenv("ethaddr") && 0 != getenv("eth1addr"))
- return;
-
- if (0 == man_data_read_field(s + (MAN_MAC_ADDR_LENGTH / 2) - 1,
- MAN_MAC_ADDR_FIELD, MAN_MAC_ADDR_LENGTH))
- return;
-
- for (src = s + (MAN_MAC_ADDR_LENGTH / 2) - 1, dst = s; src != dst;) {
- *dst++ = *src++;
- *dst++ = *src++;
- *dst++ = ':';
- }
- if (0 == getenv("ethaddr"))
- setenv("ethaddr", s);
-
- if (0 == getenv("eth1addr")) {
- ++s[((3 * MAN_MAC_ADDR_LENGTH) / 2) - 2];
- setenv("eth1addr", s);
- }
-}
-
-int misc_init_r(void)
-{
- uint32_t pbcr;
- int size_val;
- uint32_t reg;
- unsigned long usb2d0cr = 0;
- unsigned long usb2phy0cr, usb2h0cr = 0;
- unsigned long sdr0_pfc1;
- uint32_t const flash1_size = gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE;
- char const *const act = getenv("usbact");
- char const *const usbcf = getenv("korat_usbcf");
-
- /*
- * Re-do FLASH1 sizing and adjust flash start and offset.
- */
- gd->bd->bi_flashstart = CONFIG_SYS_FLASH1_TOP - flash1_size;
- gd->bd->bi_flashoffset = 0;
-
- mtdcr(EBC0_CFGADDR, PB1CR);
- pbcr = mfdcr(EBC0_CFGDATA);
- size_val = ffs(flash1_size) - 21;
- pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
- mtdcr(EBC0_CFGADDR, PB1CR);
- mtdcr(EBC0_CFGDATA, pbcr);
-
- /*
- * Re-check to get correct base address
- */
- flash_get_size(gd->bd->bi_flashstart, 0);
-
- /*
- * Re-do FLASH1 sizing and adjust flash offset to reserve space for
- * environment
- */
- gd->bd->bi_flashoffset =
- CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - CONFIG_SYS_FLASH1_ADDR;
-
- mtdcr(EBC0_CFGADDR, PB1CR);
- pbcr = mfdcr(EBC0_CFGDATA);
- size_val = ffs(gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE) - 21;
- pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
- mtdcr(EBC0_CFGADDR, PB1CR);
- mtdcr(EBC0_CFGDATA, pbcr);
-
- /* Monitor protection ON by default */
-#if defined(CONFIG_KORAT_PERMANENT)
- (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
- flash_info + 1);
-#else
- (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
- flash_info);
-#endif
- /* Env protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
- flash_info);
- (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
- CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
- flash_info);
-
- /*
- * USB suff...
- */
- /*
- * Select the USB controller on the 440EPx ("ppc") or on the PCI bus
- * ("pci") for the CompactFlash.
- */
- if (usbcf != NULL && (strcmp(usbcf, "ppc") == 0)) {
- /*
- * If environment variable "usbcf" is defined and set to "ppc",
- * then connect the CompactFlash controller to the PowerPC USB
- * port.
- */
- printf("Attaching CompactFlash controller to PPC USB\n");
- out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02,
- in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02) | 0x10);
- } else {
- if (usbcf != NULL && (strcmp(usbcf, "pci") != 0))
- printf("Warning: \"korat_usbcf\" is not set to a legal "
- "value (\"ppc\" or \"pci\")\n");
-
- printf("Attaching CompactFlash controller to PCI USB\n");
- }
- if (act == NULL || strcmp(act, "hostdev") == 0) {
- /* SDR Setting */
- mfsdr(SDR0_PFC1, sdr0_pfc1);
- mfsdr(SDR0_USB2D0CR, usb2d0cr);
- mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
- mfsdr(SDR0_USB2H0CR, usb2h0cr);
-
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
-
- /*
- * An 8-bit/60MHz interface is the only possible alternative
- * when connecting the Device to the PHY
- */
- usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
- usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ;
-
- /*
- * To enable the USB 2.0 Device function
- * through the UTMI interface
- */
- usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
- usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION;
-
- sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
- sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL;
-
- mtsdr(SDR0_PFC1, sdr0_pfc1);
- mtsdr(SDR0_USB2D0CR, usb2d0cr);
- mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
- mtsdr(SDR0_USB2H0CR, usb2h0cr);
-
- /* clear resets */
- udelay(1000);
- mtsdr(SDR0_SRST1, 0x00000000);
- udelay(1000);
- mtsdr(SDR0_SRST0, 0x00000000);
-
- printf("USB: Host(int phy) Device(ext phy)\n");
-
- } else if (strcmp(act, "dev") == 0) {
- /*-------------------PATCH-------------------------------*/
- mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
-
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
- mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
-
- udelay(1000);
- mtsdr(SDR0_SRST1, 0x672c6000);
-
- udelay(1000);
- mtsdr(SDR0_SRST0, 0x00000080);
-
- udelay(1000);
- mtsdr(SDR0_SRST1, 0x60206000);
-
- *(unsigned int *)(0xe0000350) = 0x00000001;
-
- udelay(1000);
- mtsdr(SDR0_SRST1, 0x60306000);
- /*-------------------PATCH-------------------------------*/
-
- /* SDR Setting */
- mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
- mfsdr(SDR0_USB2H0CR, usb2h0cr);
- mfsdr(SDR0_USB2D0CR, usb2d0cr);
- mfsdr(SDR0_PFC1, sdr0_pfc1);
-
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV;
- usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
- usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV;
-
- usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
- usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ;
-
- usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
- usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION;
-
- sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
- sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL;
-
- mtsdr(SDR0_USB2H0CR, usb2h0cr);
- mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
- mtsdr(SDR0_USB2D0CR, usb2d0cr);
- mtsdr(SDR0_PFC1, sdr0_pfc1);
-
- /* clear resets */
- udelay(1000);
- mtsdr(SDR0_SRST1, 0x00000000);
- udelay(1000);
- mtsdr(SDR0_SRST0, 0x00000000);
-
- printf("USB: Device(int phy)\n");
- }
-
- mfsdr(SDR0_SRST1, reg); /* enable security/kasumi engines */
- reg &= ~(SDR0_SRST1_CRYP0 | SDR0_SRST1_KASU0);
- mtsdr(SDR0_SRST1, reg);
-
- /*
- * Clear PLB4A0_ACR[WRP]
- * This fix will make the MAL burst disabling patch for the Linux
- * EMAC driver obsolete.
- */
- reg = mfdcr(PLB4A0_ACR) & ~PLB4Ax_ACR_WRP_MASK;
- mtdcr(PLB4A0_ACR, reg);
-
- set_serial_number();
- set_mac_addresses();
- gpio_write_bit(CONFIG_SYS_GPIO_ATMEGA_RESET_, 1);
-
- return 0;
-}
-
-int checkboard(void)
-{
- char const *const s = getenv("serial#");
- u8 const rev = in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0);
-
- printf("Board: Korat, Rev. %X", rev);
- if (s)
- printf(", serial# %s", s);
-
- printf(".\n Ethernet PHY 0: ");
- if (gpio_read_out_bit(CONFIG_SYS_GPIO_PHY0_FIBER_SEL))
- printf("fiber");
- else
- printf("copper");
-
- printf(", PHY 1: ");
- if (gpio_read_out_bit(CONFIG_SYS_GPIO_PHY1_FIBER_SEL))
- printf("fiber");
- else
- printf("copper");
-
- printf(".\n");
-#if defined(CONFIG_KORAT_PERMANENT)
- printf(" Executing permanent copy of U-Boot.\n");
-#endif
- return 0;
-}
-
-#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
-/*
- * Assign interrupts to PCI devices.
- */
-void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
-}
-#endif
-
-/*
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- */
-#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- /* First do 440EP(x) common setup */
- __pci_target_init(hose);
-
- /*
- * Set up Configuration registers for on-board NEC uPD720101 USB
- * controller.
- */
- pci_write_config_dword(PCI_BDF(0x0, 0xC, 0x0), 0xE4, 0x00000020);
-}
-#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
-{
- u32 val[4];
- int rc;
-
- ft_cpu_setup(blob, bd);
-
- /* Fixup NOR mapping */
- val[0] = 1; /* chip select number */
- val[1] = 0; /* always 0 */
- val[2] = gd->bd->bi_flashstart;
- val[3] = gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE;
- rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
- val, sizeof(val), 1);
- if (rc)
- printf("Unable to update property NOR mapping, err=%s\n",
- fdt_strerror(rc));
-
- return 0;
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds
deleted file mode 100644
index bee4d9a9a24..00000000000
--- a/board/korat/u-boot-F7FC.lds
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xF7FBFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xF7FBF000 :
- {
- arch/powerpc/cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- arch/powerpc/cpu/ppc4xx/start.o (.text)
-
- *(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- }
-
- __bss_end = . ;
- PROVIDE (end = .);
-}
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-05 18:59:11 +0000